[GitHub/mt8127/android_kernel_alcatel_ttab.git] / arch / x86 / pci / legacy.c

/*
 * legacy.c - traditional, old school PCI bus probing
 */
#include <linux/init.h>
#include <linux/pci.h>
#include <asm/pci_x86.h>

/*
 * Discover remaining PCI buses in case there are peer host bridges.
 * We use the number of last PCI bus provided by the PCI BIOS.
 */
static void __devinit pcibios_fixup_peer_bridges(void)
{
	int n, devfn;
	long node;

	if (pcibios_last_bus <= 0 || pcibios_last_bus > 0xff)
		return;
	DBG("PCI: Peer bridge fixup\n");

	for (n=0; n <= pcibios_last_bus; n++) {
		u32 l;
		if (pci_find_bus(0, n))
			continue;
		node = get_mp_bus_to_node(n);
		for (devfn = 0; devfn < 256; devfn += 8) {
			if (!raw_pci_read(0, n, devfn, PCI_VENDOR_ID, 2, &l) &&
			    l != 0x0000 && l != 0xffff) {
				DBG("Found device at %02x:%02x [%04x]\n", n, devfn, l);
				printk(KERN_INFO "PCI: Discovered peer bus %02x\n", n);
				pci_scan_bus_on_node(n, &pci_root_ops, node);
				break;
			}
		}
	}
}

static int __init pci_legacy_init(void)
{
	if (!raw_pci_ops) {
		printk("PCI: System does not support PCI\n");
		return 0;
	}

	if (pcibios_scanned++)
		return 0;

	printk("PCI: Probing PCI hardware\n");
	pci_root_bus = pcibios_scan_root(0);
	if (pci_root_bus)
		pci_bus_add_devices(pci_root_bus);

	pcibios_fixup_peer_bridges();

	return 0;
}

int __init pci_subsys_init(void)
{
#ifdef CONFIG_X86_NUMAQ
	pci_numaq_init();
#endif
#ifdef CONFIG_ACPI
	pci_acpi_init();
#endif
#ifdef CONFIG_X86_VISWS
	pci_visws_init();
#endif
	pci_legacy_init();
	pcibios_irq_init();
	pcibios_init();

	return 0;
}
subsys_initcall(pci_subsys_init);
Commit	Line	Data
1da177e4 LT	1	/*
	2	* legacy.c - traditional, old school PCI bus probing
	3	*/
	4	#include <linux/init.h>
	5	#include <linux/pci.h>
82487711	6	#include <asm/pci_x86.h>
1da177e4 LT	7
	8	/*
	9	* Discover remaining PCI buses in case there are peer host bridges.
	10	* We use the number of last PCI bus provided by the PCI BIOS.
	11	*/
	12	static void __devinit pcibios_fixup_peer_bridges(void)
	13	{
	14	int n, devfn;
871d5f8d	15	long node;
1da177e4	16
9dd1e9eb	17	if (pcibios_last_bus <= 0 \|\| pcibios_last_bus > 0xff)
1da177e4 LT	18	return;
	19	DBG("PCI: Peer bridge fixup\n");
	20
	21	for (n=0; n <= pcibios_last_bus; n++) {
	22	u32 l;
	23	if (pci_find_bus(0, n))
	24	continue;
871d5f8d	25	node = get_mp_bus_to_node(n);
1da177e4	26	for (devfn = 0; devfn < 256; devfn += 8) {
b6ce068a	27	if (!raw_pci_read(0, n, devfn, PCI_VENDOR_ID, 2, &l) &&
1da177e4 LT	28	l != 0x0000 && l != 0xffff) {
	29	DBG("Found device at %02x:%02x [%04x]\n", n, devfn, l);
	30	printk(KERN_INFO "PCI: Discovered peer bus %02x\n", n);
871d5f8d	31	pci_scan_bus_on_node(n, &pci_root_ops, node);
1da177e4 LT	32	break;
	33	}
	34	}
	35	}
	36	}
	37
	38	static int __init pci_legacy_init(void)
	39	{
	40	if (!raw_pci_ops) {
	41	printk("PCI: System does not support PCI\n");
	42	return 0;
	43	}
	44
	45	if (pcibios_scanned++)
	46	return 0;
	47
	48	printk("PCI: Probing PCI hardware\n");
	49	pci_root_bus = pcibios_scan_root(0);
c431ada4 RS	50	if (pci_root_bus)
c431ada4 RS	51	pci_bus_add_devices(pci_root_bus);
1da177e4 LT	52
	53	pcibios_fixup_peer_bridges();
	54
	55	return 0;
	56	}
	57
8dd779b1 RR	58	int __init pci_subsys_init(void)
8dd779b1 RR	59	{
060b9708	60	#ifdef CONFIG_X86_NUMAQ
e27cf3a2	61	pci_numaq_init();
060b9708	62	#endif
8dd779b1 RR	63	#ifdef CONFIG_ACPI
8dd779b1 RR	64	pci_acpi_init();
3cabf37f RR	65	#endif
	66	#ifdef CONFIG_X86_VISWS
	67	pci_visws_init();
8dd779b1 RR	68	#endif
	69	pci_legacy_init();
	70	pcibios_irq_init();
	71	pcibios_init();
3a62ed73 RR	72
3a62ed73 RR	73	return 0;
8dd779b1 RR	74	}
8dd779b1 RR	75	subsys_initcall(pci_subsys_init);