Merge tag 'v3.10.67' into update
[GitHub/mt8127/android_kernel_alcatel_ttab.git] / arch / x86 / mm / mmio-mod.c
CommitLineData
8b7d89d0
PP
1/*
2 * This program is free software; you can redistribute it and/or modify
3 * it under the terms of the GNU General Public License as published by
4 * the Free Software Foundation; either version 2 of the License, or
5 * (at your option) any later version.
6 *
7 * This program is distributed in the hope that it will be useful,
8 * but WITHOUT ANY WARRANTY; without even the implied warranty of
9 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
10 * GNU General Public License for more details.
11 *
12 * You should have received a copy of the GNU General Public License
13 * along with this program; if not, write to the Free Software
14 * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
15 *
16 * Copyright (C) IBM Corporation, 2005
17 * Jeff Muizelaar, 2006, 2007
18 * Pekka Paalanen, 2008 <pq@iki.fi>
19 *
20 * Derived from the read-mod example from relay-examples by Tom Zanussi.
21 */
3a0340be 22
eba11d6d 23#define pr_fmt(fmt) "mmiotrace: " fmt
3a0340be 24
d61fc448
PP
25#define DEBUG 1
26
8b7d89d0 27#include <linux/module.h>
8b7d89d0 28#include <linux/debugfs.h>
5a0e3ad6 29#include <linux/slab.h>
f984b51e 30#include <linux/uaccess.h>
970e6fa0 31#include <linux/io.h>
8b7d89d0
PP
32#include <linux/kallsyms.h>
33#include <asm/pgtable.h>
34#include <linux/mmiotrace.h>
35#include <asm/e820.h> /* for ISA_START_ADDRESS */
60063497 36#include <linux/atomic.h>
f5136380 37#include <linux/percpu.h>
7423d111 38#include <linux/cpu.h>
8b7d89d0 39
8b7d89d0
PP
40#include "pf_in.h"
41
8b7d89d0
PP
42struct trap_reason {
43 unsigned long addr;
44 unsigned long ip;
45 enum reason_type type;
46 int active_traces;
47};
48
d61fc448
PP
49struct remap_trace {
50 struct list_head list;
51 struct kmmio_probe probe;
dee310d0 52 resource_size_t phys;
d61fc448
PP
53 unsigned long id;
54};
55
fe1ffafa 56/* Accessed per-cpu. */
f5136380 57static DEFINE_PER_CPU(struct trap_reason, pf_reason);
bd8ac686 58static DEFINE_PER_CPU(struct mmiotrace_rw, cpu_trace);
8b7d89d0 59
d61fc448
PP
60static DEFINE_MUTEX(mmiotrace_mutex);
61static DEFINE_SPINLOCK(trace_lock);
62static atomic_t mmiotrace_enabled;
63static LIST_HEAD(trace_list); /* struct remap_trace */
d61fc448
PP
64
65/*
66 * Locking in this file:
67 * - mmiotrace_mutex enforces enable/disable_mmiotrace() critical sections.
68 * - mmiotrace_enabled may be modified only when holding mmiotrace_mutex
69 * and trace_lock.
70 * - Routines depending on is_enabled() must take trace_lock.
71 * - trace_list users must hold trace_lock.
9e57fb35 72 * - is_enabled() guarantees that mmio_trace_{rw,mapping} are allowed.
d61fc448
PP
73 * - pre/post callbacks assume the effect of is_enabled() being true.
74 */
8b7d89d0
PP
75
76/* module parameters */
d61fc448 77static unsigned long filter_offset;
476bc001
RR
78static bool nommiotrace;
79static bool trace_pc;
8b7d89d0 80
8b7d89d0
PP
81module_param(filter_offset, ulong, 0);
82module_param(nommiotrace, bool, 0);
8b7d89d0
PP
83module_param(trace_pc, bool, 0);
84
8b7d89d0
PP
85MODULE_PARM_DESC(filter_offset, "Start address of traced mappings.");
86MODULE_PARM_DESC(nommiotrace, "Disable actual MMIO tracing.");
8b7d89d0 87MODULE_PARM_DESC(trace_pc, "Record address of faulting instructions.");
d61fc448
PP
88
89static bool is_enabled(void)
90{
91 return atomic_read(&mmiotrace_enabled);
92}
8b7d89d0 93
8b7d89d0
PP
94static void print_pte(unsigned long address)
95{
790e2a29 96 unsigned int level;
75bb8835
PP
97 pte_t *pte = lookup_address(address, &level);
98
99 if (!pte) {
3a0340be
JP
100 pr_err("Error in %s: no pte for page 0x%08lx\n",
101 __func__, address);
75bb8835
PP
102 return;
103 }
104
105 if (level == PG_LEVEL_2M) {
3a0340be
JP
106 pr_emerg("4MB pages are not currently supported: 0x%08lx\n",
107 address);
8b7d89d0
PP
108 BUG();
109 }
3a0340be
JP
110 pr_info("pte for 0x%lx: 0x%llx 0x%llx\n",
111 address,
0663bb6c
RD
112 (unsigned long long)pte_val(*pte),
113 (unsigned long long)pte_val(*pte) & _PAGE_PRESENT);
8b7d89d0
PP
114}
115
116/*
117 * For some reason the pre/post pairs have been called in an
118 * unmatched order. Report and die.
119 */
120static void die_kmmio_nesting_error(struct pt_regs *regs, unsigned long addr)
121{
f5136380 122 const struct trap_reason *my_reason = &get_cpu_var(pf_reason);
3a0340be
JP
123 pr_emerg("unexpected fault for address: 0x%08lx, last fault for address: 0x%08lx\n",
124 addr, my_reason->addr);
8b7d89d0 125 print_pte(addr);
d61fc448
PP
126 print_symbol(KERN_EMERG "faulting IP is at %s\n", regs->ip);
127 print_symbol(KERN_EMERG "last faulting IP was at %s\n", my_reason->ip);
8b7d89d0 128#ifdef __i386__
0fd0e3da 129 pr_emerg("eax: %08lx ebx: %08lx ecx: %08lx edx: %08lx\n",
3a0340be 130 regs->ax, regs->bx, regs->cx, regs->dx);
0fd0e3da 131 pr_emerg("esi: %08lx edi: %08lx ebp: %08lx esp: %08lx\n",
3a0340be 132 regs->si, regs->di, regs->bp, regs->sp);
8b7d89d0 133#else
0fd0e3da 134 pr_emerg("rax: %016lx rcx: %016lx rdx: %016lx\n",
3a0340be 135 regs->ax, regs->cx, regs->dx);
0fd0e3da 136 pr_emerg("rsi: %016lx rdi: %016lx rbp: %016lx rsp: %016lx\n",
3a0340be 137 regs->si, regs->di, regs->bp, regs->sp);
8b7d89d0 138#endif
f5136380 139 put_cpu_var(pf_reason);
8b7d89d0
PP
140 BUG();
141}
142
143static void pre(struct kmmio_probe *p, struct pt_regs *regs,
144 unsigned long addr)
145{
f5136380 146 struct trap_reason *my_reason = &get_cpu_var(pf_reason);
bd8ac686 147 struct mmiotrace_rw *my_trace = &get_cpu_var(cpu_trace);
8b7d89d0
PP
148 const unsigned long instptr = instruction_pointer(regs);
149 const enum reason_type type = get_ins_type(instptr);
a50445d7 150 struct remap_trace *trace = p->private;
8b7d89d0
PP
151
152 /* it doesn't make sense to have more than one active trace per cpu */
f5136380 153 if (my_reason->active_traces)
8b7d89d0
PP
154 die_kmmio_nesting_error(regs, addr);
155 else
f5136380 156 my_reason->active_traces++;
8b7d89d0 157
f5136380
PP
158 my_reason->type = type;
159 my_reason->addr = addr;
160 my_reason->ip = instptr;
8b7d89d0 161
bd8ac686
PP
162 my_trace->phys = addr - trace->probe.addr + trace->phys;
163 my_trace->map_id = trace->id;
8b7d89d0
PP
164
165 /*
166 * Only record the program counter when requested.
167 * It may taint clean-room reverse engineering.
168 */
169 if (trace_pc)
bd8ac686 170 my_trace->pc = instptr;
8b7d89d0 171 else
bd8ac686 172 my_trace->pc = 0;
8b7d89d0 173
f984b51e
PP
174 /*
175 * XXX: the timestamp recorded will be *after* the tracing has been
176 * done, not at the time we hit the instruction. SMP implications
177 * on event ordering?
178 */
8b7d89d0
PP
179
180 switch (type) {
181 case REG_READ:
bd8ac686
PP
182 my_trace->opcode = MMIO_READ;
183 my_trace->width = get_ins_mem_width(instptr);
8b7d89d0
PP
184 break;
185 case REG_WRITE:
bd8ac686
PP
186 my_trace->opcode = MMIO_WRITE;
187 my_trace->width = get_ins_mem_width(instptr);
188 my_trace->value = get_ins_reg_val(instptr, regs);
8b7d89d0
PP
189 break;
190 case IMM_WRITE:
bd8ac686
PP
191 my_trace->opcode = MMIO_WRITE;
192 my_trace->width = get_ins_mem_width(instptr);
193 my_trace->value = get_ins_imm_val(instptr);
8b7d89d0
PP
194 break;
195 default:
196 {
197 unsigned char *ip = (unsigned char *)instptr;
bd8ac686
PP
198 my_trace->opcode = MMIO_UNKNOWN_OP;
199 my_trace->width = 0;
200 my_trace->value = (*ip) << 16 | *(ip + 1) << 8 |
f5136380 201 *(ip + 2);
8b7d89d0
PP
202 }
203 }
f5136380
PP
204 put_cpu_var(cpu_trace);
205 put_cpu_var(pf_reason);
8b7d89d0
PP
206}
207
208static void post(struct kmmio_probe *p, unsigned long condition,
209 struct pt_regs *regs)
210{
f5136380 211 struct trap_reason *my_reason = &get_cpu_var(pf_reason);
bd8ac686 212 struct mmiotrace_rw *my_trace = &get_cpu_var(cpu_trace);
8b7d89d0
PP
213
214 /* this should always return the active_trace count to 0 */
f5136380
PP
215 my_reason->active_traces--;
216 if (my_reason->active_traces) {
3a0340be 217 pr_emerg("unexpected post handler");
8b7d89d0
PP
218 BUG();
219 }
220
f5136380 221 switch (my_reason->type) {
8b7d89d0 222 case REG_READ:
bd8ac686 223 my_trace->value = get_ins_reg_val(my_reason->ip, regs);
8b7d89d0
PP
224 break;
225 default:
226 break;
227 }
f984b51e 228
bd8ac686 229 mmio_trace_rw(my_trace);
f5136380
PP
230 put_cpu_var(cpu_trace);
231 put_cpu_var(pf_reason);
8b7d89d0
PP
232}
233
dee310d0 234static void ioremap_trace_core(resource_size_t offset, unsigned long size,
8b7d89d0
PP
235 void __iomem *addr)
236{
d61fc448 237 static atomic_t next_id;
8b7d89d0 238 struct remap_trace *trace = kmalloc(sizeof(*trace), GFP_KERNEL);
87e547fe 239 /* These are page-unaligned. */
bd8ac686
PP
240 struct mmiotrace_map map = {
241 .phys = offset,
242 .virt = (unsigned long)addr,
243 .len = size,
244 .opcode = MMIO_PROBE
8b7d89d0 245 };
8b7d89d0 246
d61fc448 247 if (!trace) {
3a0340be 248 pr_err("kmalloc failed in ioremap\n");
d61fc448
PP
249 return;
250 }
251
8b7d89d0
PP
252 *trace = (struct remap_trace) {
253 .probe = {
254 .addr = (unsigned long)addr,
255 .len = size,
256 .pre_handler = pre,
257 .post_handler = post,
a50445d7 258 .private = trace
d61fc448
PP
259 },
260 .phys = offset,
261 .id = atomic_inc_return(&next_id)
8b7d89d0 262 };
bd8ac686 263 map.map_id = trace->id;
8b7d89d0 264
d61fc448 265 spin_lock_irq(&trace_lock);
bbe5c783
PP
266 if (!is_enabled()) {
267 kfree(trace);
d61fc448 268 goto not_enabled;
bbe5c783 269 }
d61fc448 270
bd8ac686 271 mmio_trace_mapping(&map);
8b7d89d0 272 list_add_tail(&trace->list, &trace_list);
8b7d89d0
PP
273 if (!nommiotrace)
274 register_kmmio_probe(&trace->probe);
d61fc448
PP
275
276not_enabled:
277 spin_unlock_irq(&trace_lock);
8b7d89d0
PP
278}
279
dee310d0
PP
280void mmiotrace_ioremap(resource_size_t offset, unsigned long size,
281 void __iomem *addr)
8b7d89d0 282{
d61fc448 283 if (!is_enabled()) /* recheck and proper locking in *_core() */
8b7d89d0
PP
284 return;
285
3a0340be
JP
286 pr_debug("ioremap_*(0x%llx, 0x%lx) = %p\n",
287 (unsigned long long)offset, size, addr);
d61fc448 288 if ((filter_offset) && (offset != filter_offset))
8b7d89d0 289 return;
d61fc448 290 ioremap_trace_core(offset, size, addr);
8b7d89d0 291}
8b7d89d0 292
d61fc448 293static void iounmap_trace_core(volatile void __iomem *addr)
8b7d89d0 294{
bd8ac686
PP
295 struct mmiotrace_map map = {
296 .phys = 0,
297 .virt = (unsigned long)addr,
298 .len = 0,
299 .opcode = MMIO_UNPROBE
8b7d89d0
PP
300 };
301 struct remap_trace *trace;
302 struct remap_trace *tmp;
d61fc448
PP
303 struct remap_trace *found_trace = NULL;
304
3a0340be 305 pr_debug("Unmapping %p.\n", addr);
8b7d89d0 306
d61fc448
PP
307 spin_lock_irq(&trace_lock);
308 if (!is_enabled())
309 goto not_enabled;
310
8b7d89d0
PP
311 list_for_each_entry_safe(trace, tmp, &trace_list, list) {
312 if ((unsigned long)addr == trace->probe.addr) {
313 if (!nommiotrace)
314 unregister_kmmio_probe(&trace->probe);
315 list_del(&trace->list);
d61fc448 316 found_trace = trace;
8b7d89d0
PP
317 break;
318 }
319 }
bd8ac686
PP
320 map.map_id = (found_trace) ? found_trace->id : -1;
321 mmio_trace_mapping(&map);
d61fc448
PP
322
323not_enabled:
324 spin_unlock_irq(&trace_lock);
325 if (found_trace) {
326 synchronize_rcu(); /* unregister_kmmio_probe() requirement */
327 kfree(found_trace);
328 }
329}
330
331void mmiotrace_iounmap(volatile void __iomem *addr)
332{
333 might_sleep();
334 if (is_enabled()) /* recheck and proper locking in *_core() */
335 iounmap_trace_core(addr);
8b7d89d0 336}
8b7d89d0 337
9e57fb35
PP
338int mmiotrace_printk(const char *fmt, ...)
339{
340 int ret = 0;
341 va_list args;
342 unsigned long flags;
343 va_start(args, fmt);
344
345 spin_lock_irqsave(&trace_lock, flags);
346 if (is_enabled())
347 ret = mmio_trace_printk(fmt, args);
348 spin_unlock_irqrestore(&trace_lock, flags);
349
350 va_end(args);
351 return ret;
352}
353EXPORT_SYMBOL(mmiotrace_printk);
354
8b7d89d0
PP
355static void clear_trace_list(void)
356{
357 struct remap_trace *trace;
358 struct remap_trace *tmp;
359
d61fc448
PP
360 /*
361 * No locking required, because the caller ensures we are in a
362 * critical section via mutex, and is_enabled() is false,
363 * i.e. nothing can traverse or modify this list.
364 * Caller also ensures is_enabled() cannot change.
365 */
366 list_for_each_entry(trace, &trace_list, list) {
3a0340be
JP
367 pr_notice("purging non-iounmapped trace @0x%08lx, size 0x%lx.\n",
368 trace->probe.addr, trace->probe.len);
8b7d89d0
PP
369 if (!nommiotrace)
370 unregister_kmmio_probe(&trace->probe);
d61fc448
PP
371 }
372 synchronize_rcu(); /* unregister_kmmio_probe() requirement */
373
374 list_for_each_entry_safe(trace, tmp, &trace_list, list) {
8b7d89d0
PP
375 list_del(&trace->list);
376 kfree(trace);
d61fc448
PP
377 }
378}
379
7423d111 380#ifdef CONFIG_HOTPLUG_CPU
c38da569 381static cpumask_var_t downed_cpus;
7423d111
PP
382
383static void enter_uniprocessor(void)
384{
385 int cpu;
386 int err;
387
c38da569
RR
388 if (downed_cpus == NULL &&
389 !alloc_cpumask_var(&downed_cpus, GFP_KERNEL)) {
3a0340be 390 pr_notice("Failed to allocate mask\n");
c38da569
RR
391 goto out;
392 }
393
7423d111 394 get_online_cpus();
c38da569
RR
395 cpumask_copy(downed_cpus, cpu_online_mask);
396 cpumask_clear_cpu(cpumask_first(cpu_online_mask), downed_cpus);
7423d111 397 if (num_online_cpus() > 1)
3a0340be 398 pr_notice("Disabling non-boot CPUs...\n");
7423d111
PP
399 put_online_cpus();
400
c38da569 401 for_each_cpu(cpu, downed_cpus) {
7423d111 402 err = cpu_down(cpu);
970e6fa0 403 if (!err)
3a0340be 404 pr_info("CPU%d is down.\n", cpu);
970e6fa0 405 else
3a0340be 406 pr_err("Error taking CPU%d down: %d\n", cpu, err);
7423d111 407 }
c38da569 408out:
7423d111 409 if (num_online_cpus() > 1)
3a0340be 410 pr_warning("multiple CPUs still online, may miss events.\n");
7423d111
PP
411}
412
7701e8c5
MS
413/* __ref because leave_uniprocessor calls cpu_up which is __cpuinit,
414 but this whole function is ifdefed CONFIG_HOTPLUG_CPU */
415static void __ref leave_uniprocessor(void)
7423d111
PP
416{
417 int cpu;
418 int err;
419
c38da569 420 if (downed_cpus == NULL || cpumask_weight(downed_cpus) == 0)
7423d111 421 return;
3a0340be 422 pr_notice("Re-enabling CPUs...\n");
c38da569 423 for_each_cpu(cpu, downed_cpus) {
7423d111
PP
424 err = cpu_up(cpu);
425 if (!err)
3a0340be 426 pr_info("enabled CPU%d.\n", cpu);
7423d111 427 else
3a0340be 428 pr_err("cannot re-enable CPU%d: %d\n", cpu, err);
7423d111
PP
429 }
430}
431
432#else /* !CONFIG_HOTPLUG_CPU */
433static void enter_uniprocessor(void)
434{
435 if (num_online_cpus() > 1)
3a0340be
JP
436 pr_warning("multiple CPUs are online, may miss events. "
437 "Suggest booting with maxcpus=1 kernel argument.\n");
7423d111
PP
438}
439
440static void leave_uniprocessor(void)
441{
442}
443#endif
444
f984b51e 445void enable_mmiotrace(void)
d61fc448
PP
446{
447 mutex_lock(&mmiotrace_mutex);
448 if (is_enabled())
449 goto out;
450
d61fc448 451 if (nommiotrace)
3a0340be 452 pr_info("MMIO tracing disabled.\n");
0f9a623d 453 kmmio_init();
7423d111 454 enter_uniprocessor();
d61fc448
PP
455 spin_lock_irq(&trace_lock);
456 atomic_inc(&mmiotrace_enabled);
457 spin_unlock_irq(&trace_lock);
3a0340be 458 pr_info("enabled.\n");
d61fc448
PP
459out:
460 mutex_unlock(&mmiotrace_mutex);
461}
462
f984b51e 463void disable_mmiotrace(void)
d61fc448
PP
464{
465 mutex_lock(&mmiotrace_mutex);
466 if (!is_enabled())
467 goto out;
468
469 spin_lock_irq(&trace_lock);
470 atomic_dec(&mmiotrace_enabled);
471 BUG_ON(is_enabled());
472 spin_unlock_irq(&trace_lock);
473
474 clear_trace_list(); /* guarantees: no more kmmio callbacks */
7423d111 475 leave_uniprocessor();
0f9a623d 476 kmmio_cleanup();
3a0340be 477 pr_info("disabled.\n");
d61fc448
PP
478out:
479 mutex_unlock(&mmiotrace_mutex);
8b7d89d0 480}