Commit | Line | Data |
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6aa8b732 AK |
1 | /* |
2 | * Kernel-based Virtual Machine driver for Linux | |
3 | * | |
4 | * This module enables machines with Intel VT-x extensions to run virtual | |
5 | * machines without emulation or binary translation. | |
6 | * | |
7 | * MMU support | |
8 | * | |
9 | * Copyright (C) 2006 Qumranet, Inc. | |
10 | * | |
11 | * Authors: | |
12 | * Yaniv Kamay <yaniv@qumranet.com> | |
13 | * Avi Kivity <avi@qumranet.com> | |
14 | * | |
15 | * This work is licensed under the terms of the GNU GPL, version 2. See | |
16 | * the COPYING file in the top-level directory. | |
17 | * | |
18 | */ | |
e495606d AK |
19 | |
20 | #include "vmx.h" | |
1d737c8a | 21 | #include "mmu.h" |
e495606d | 22 | |
edf88417 | 23 | #include <linux/kvm_host.h> |
6aa8b732 AK |
24 | #include <linux/types.h> |
25 | #include <linux/string.h> | |
6aa8b732 AK |
26 | #include <linux/mm.h> |
27 | #include <linux/highmem.h> | |
28 | #include <linux/module.h> | |
448353ca | 29 | #include <linux/swap.h> |
05da4558 | 30 | #include <linux/hugetlb.h> |
2f333bcb | 31 | #include <linux/compiler.h> |
6aa8b732 | 32 | |
e495606d AK |
33 | #include <asm/page.h> |
34 | #include <asm/cmpxchg.h> | |
4e542370 | 35 | #include <asm/io.h> |
6aa8b732 | 36 | |
18552672 JR |
37 | /* |
38 | * When setting this variable to true it enables Two-Dimensional-Paging | |
39 | * where the hardware walks 2 page tables: | |
40 | * 1. the guest-virtual to guest-physical | |
41 | * 2. while doing 1. it walks guest-physical to host-physical | |
42 | * If the hardware supports that we don't need to do shadow paging. | |
43 | */ | |
2f333bcb | 44 | bool tdp_enabled = false; |
18552672 | 45 | |
37a7d8b0 AK |
46 | #undef MMU_DEBUG |
47 | ||
48 | #undef AUDIT | |
49 | ||
50 | #ifdef AUDIT | |
51 | static void kvm_mmu_audit(struct kvm_vcpu *vcpu, const char *msg); | |
52 | #else | |
53 | static void kvm_mmu_audit(struct kvm_vcpu *vcpu, const char *msg) {} | |
54 | #endif | |
55 | ||
56 | #ifdef MMU_DEBUG | |
57 | ||
58 | #define pgprintk(x...) do { if (dbg) printk(x); } while (0) | |
59 | #define rmap_printk(x...) do { if (dbg) printk(x); } while (0) | |
60 | ||
61 | #else | |
62 | ||
63 | #define pgprintk(x...) do { } while (0) | |
64 | #define rmap_printk(x...) do { } while (0) | |
65 | ||
66 | #endif | |
67 | ||
68 | #if defined(MMU_DEBUG) || defined(AUDIT) | |
6ada8cca AK |
69 | static int dbg = 0; |
70 | module_param(dbg, bool, 0644); | |
37a7d8b0 | 71 | #endif |
6aa8b732 | 72 | |
d6c69ee9 YD |
73 | #ifndef MMU_DEBUG |
74 | #define ASSERT(x) do { } while (0) | |
75 | #else | |
6aa8b732 AK |
76 | #define ASSERT(x) \ |
77 | if (!(x)) { \ | |
78 | printk(KERN_WARNING "assertion failed %s:%d: %s\n", \ | |
79 | __FILE__, __LINE__, #x); \ | |
80 | } | |
d6c69ee9 | 81 | #endif |
6aa8b732 | 82 | |
6aa8b732 AK |
83 | #define PT_FIRST_AVAIL_BITS_SHIFT 9 |
84 | #define PT64_SECOND_AVAIL_BITS_SHIFT 52 | |
85 | ||
6aa8b732 AK |
86 | #define VALID_PAGE(x) ((x) != INVALID_PAGE) |
87 | ||
88 | #define PT64_LEVEL_BITS 9 | |
89 | ||
90 | #define PT64_LEVEL_SHIFT(level) \ | |
d77c26fc | 91 | (PAGE_SHIFT + (level - 1) * PT64_LEVEL_BITS) |
6aa8b732 AK |
92 | |
93 | #define PT64_LEVEL_MASK(level) \ | |
94 | (((1ULL << PT64_LEVEL_BITS) - 1) << PT64_LEVEL_SHIFT(level)) | |
95 | ||
96 | #define PT64_INDEX(address, level)\ | |
97 | (((address) >> PT64_LEVEL_SHIFT(level)) & ((1 << PT64_LEVEL_BITS) - 1)) | |
98 | ||
99 | ||
100 | #define PT32_LEVEL_BITS 10 | |
101 | ||
102 | #define PT32_LEVEL_SHIFT(level) \ | |
d77c26fc | 103 | (PAGE_SHIFT + (level - 1) * PT32_LEVEL_BITS) |
6aa8b732 AK |
104 | |
105 | #define PT32_LEVEL_MASK(level) \ | |
106 | (((1ULL << PT32_LEVEL_BITS) - 1) << PT32_LEVEL_SHIFT(level)) | |
107 | ||
108 | #define PT32_INDEX(address, level)\ | |
109 | (((address) >> PT32_LEVEL_SHIFT(level)) & ((1 << PT32_LEVEL_BITS) - 1)) | |
110 | ||
111 | ||
27aba766 | 112 | #define PT64_BASE_ADDR_MASK (((1ULL << 52) - 1) & ~(u64)(PAGE_SIZE-1)) |
6aa8b732 AK |
113 | #define PT64_DIR_BASE_ADDR_MASK \ |
114 | (PT64_BASE_ADDR_MASK & ~((1ULL << (PAGE_SHIFT + PT64_LEVEL_BITS)) - 1)) | |
115 | ||
116 | #define PT32_BASE_ADDR_MASK PAGE_MASK | |
117 | #define PT32_DIR_BASE_ADDR_MASK \ | |
118 | (PAGE_MASK & ~((1ULL << (PAGE_SHIFT + PT32_LEVEL_BITS)) - 1)) | |
119 | ||
79539cec AK |
120 | #define PT64_PERM_MASK (PT_PRESENT_MASK | PT_WRITABLE_MASK | PT_USER_MASK \ |
121 | | PT64_NX_MASK) | |
6aa8b732 AK |
122 | |
123 | #define PFERR_PRESENT_MASK (1U << 0) | |
124 | #define PFERR_WRITE_MASK (1U << 1) | |
125 | #define PFERR_USER_MASK (1U << 2) | |
73b1087e | 126 | #define PFERR_FETCH_MASK (1U << 4) |
6aa8b732 | 127 | |
6aa8b732 AK |
128 | #define PT_DIRECTORY_LEVEL 2 |
129 | #define PT_PAGE_TABLE_LEVEL 1 | |
130 | ||
cd4a4e53 AK |
131 | #define RMAP_EXT 4 |
132 | ||
fe135d2c AK |
133 | #define ACC_EXEC_MASK 1 |
134 | #define ACC_WRITE_MASK PT_WRITABLE_MASK | |
135 | #define ACC_USER_MASK PT_USER_MASK | |
136 | #define ACC_ALL (ACC_EXEC_MASK | ACC_WRITE_MASK | ACC_USER_MASK) | |
137 | ||
2f333bcb MT |
138 | struct kvm_pv_mmu_op_buffer { |
139 | void *ptr; | |
140 | unsigned len; | |
141 | unsigned processed; | |
142 | char buf[512] __aligned(sizeof(long)); | |
143 | }; | |
144 | ||
cd4a4e53 AK |
145 | struct kvm_rmap_desc { |
146 | u64 *shadow_ptes[RMAP_EXT]; | |
147 | struct kvm_rmap_desc *more; | |
148 | }; | |
149 | ||
b5a33a75 AK |
150 | static struct kmem_cache *pte_chain_cache; |
151 | static struct kmem_cache *rmap_desc_cache; | |
d3d25b04 | 152 | static struct kmem_cache *mmu_page_header_cache; |
b5a33a75 | 153 | |
c7addb90 AK |
154 | static u64 __read_mostly shadow_trap_nonpresent_pte; |
155 | static u64 __read_mostly shadow_notrap_nonpresent_pte; | |
7b52345e SY |
156 | static u64 __read_mostly shadow_base_present_pte; |
157 | static u64 __read_mostly shadow_nx_mask; | |
158 | static u64 __read_mostly shadow_x_mask; /* mutual exclusive with nx_mask */ | |
159 | static u64 __read_mostly shadow_user_mask; | |
160 | static u64 __read_mostly shadow_accessed_mask; | |
161 | static u64 __read_mostly shadow_dirty_mask; | |
c7addb90 AK |
162 | |
163 | void kvm_mmu_set_nonpresent_ptes(u64 trap_pte, u64 notrap_pte) | |
164 | { | |
165 | shadow_trap_nonpresent_pte = trap_pte; | |
166 | shadow_notrap_nonpresent_pte = notrap_pte; | |
167 | } | |
168 | EXPORT_SYMBOL_GPL(kvm_mmu_set_nonpresent_ptes); | |
169 | ||
7b52345e SY |
170 | void kvm_mmu_set_base_ptes(u64 base_pte) |
171 | { | |
172 | shadow_base_present_pte = base_pte; | |
173 | } | |
174 | EXPORT_SYMBOL_GPL(kvm_mmu_set_base_ptes); | |
175 | ||
176 | void kvm_mmu_set_mask_ptes(u64 user_mask, u64 accessed_mask, | |
177 | u64 dirty_mask, u64 nx_mask, u64 x_mask) | |
178 | { | |
179 | shadow_user_mask = user_mask; | |
180 | shadow_accessed_mask = accessed_mask; | |
181 | shadow_dirty_mask = dirty_mask; | |
182 | shadow_nx_mask = nx_mask; | |
183 | shadow_x_mask = x_mask; | |
184 | } | |
185 | EXPORT_SYMBOL_GPL(kvm_mmu_set_mask_ptes); | |
186 | ||
6aa8b732 AK |
187 | static int is_write_protection(struct kvm_vcpu *vcpu) |
188 | { | |
ad312c7c | 189 | return vcpu->arch.cr0 & X86_CR0_WP; |
6aa8b732 AK |
190 | } |
191 | ||
192 | static int is_cpuid_PSE36(void) | |
193 | { | |
194 | return 1; | |
195 | } | |
196 | ||
73b1087e AK |
197 | static int is_nx(struct kvm_vcpu *vcpu) |
198 | { | |
ad312c7c | 199 | return vcpu->arch.shadow_efer & EFER_NX; |
73b1087e AK |
200 | } |
201 | ||
6aa8b732 AK |
202 | static int is_present_pte(unsigned long pte) |
203 | { | |
204 | return pte & PT_PRESENT_MASK; | |
205 | } | |
206 | ||
c7addb90 AK |
207 | static int is_shadow_present_pte(u64 pte) |
208 | { | |
c7addb90 AK |
209 | return pte != shadow_trap_nonpresent_pte |
210 | && pte != shadow_notrap_nonpresent_pte; | |
211 | } | |
212 | ||
05da4558 MT |
213 | static int is_large_pte(u64 pte) |
214 | { | |
215 | return pte & PT_PAGE_SIZE_MASK; | |
216 | } | |
217 | ||
6aa8b732 AK |
218 | static int is_writeble_pte(unsigned long pte) |
219 | { | |
220 | return pte & PT_WRITABLE_MASK; | |
221 | } | |
222 | ||
e3c5e7ec AK |
223 | static int is_dirty_pte(unsigned long pte) |
224 | { | |
7b52345e | 225 | return pte & shadow_dirty_mask; |
e3c5e7ec AK |
226 | } |
227 | ||
cd4a4e53 AK |
228 | static int is_rmap_pte(u64 pte) |
229 | { | |
4b1a80fa | 230 | return is_shadow_present_pte(pte); |
cd4a4e53 AK |
231 | } |
232 | ||
35149e21 | 233 | static pfn_t spte_to_pfn(u64 pte) |
0b49ea86 | 234 | { |
35149e21 | 235 | return (pte & PT64_BASE_ADDR_MASK) >> PAGE_SHIFT; |
0b49ea86 AK |
236 | } |
237 | ||
da928521 AK |
238 | static gfn_t pse36_gfn_delta(u32 gpte) |
239 | { | |
240 | int shift = 32 - PT32_DIR_PSE36_SHIFT - PAGE_SHIFT; | |
241 | ||
242 | return (gpte & PT32_DIR_PSE36_MASK) << shift; | |
243 | } | |
244 | ||
e663ee64 AK |
245 | static void set_shadow_pte(u64 *sptep, u64 spte) |
246 | { | |
247 | #ifdef CONFIG_X86_64 | |
248 | set_64bit((unsigned long *)sptep, spte); | |
249 | #else | |
250 | set_64bit((unsigned long long *)sptep, spte); | |
251 | #endif | |
252 | } | |
253 | ||
e2dec939 | 254 | static int mmu_topup_memory_cache(struct kvm_mmu_memory_cache *cache, |
2e3e5882 | 255 | struct kmem_cache *base_cache, int min) |
714b93da AK |
256 | { |
257 | void *obj; | |
258 | ||
259 | if (cache->nobjs >= min) | |
e2dec939 | 260 | return 0; |
714b93da | 261 | while (cache->nobjs < ARRAY_SIZE(cache->objects)) { |
2e3e5882 | 262 | obj = kmem_cache_zalloc(base_cache, GFP_KERNEL); |
714b93da | 263 | if (!obj) |
e2dec939 | 264 | return -ENOMEM; |
714b93da AK |
265 | cache->objects[cache->nobjs++] = obj; |
266 | } | |
e2dec939 | 267 | return 0; |
714b93da AK |
268 | } |
269 | ||
270 | static void mmu_free_memory_cache(struct kvm_mmu_memory_cache *mc) | |
271 | { | |
272 | while (mc->nobjs) | |
273 | kfree(mc->objects[--mc->nobjs]); | |
274 | } | |
275 | ||
c1158e63 | 276 | static int mmu_topup_memory_cache_page(struct kvm_mmu_memory_cache *cache, |
2e3e5882 | 277 | int min) |
c1158e63 AK |
278 | { |
279 | struct page *page; | |
280 | ||
281 | if (cache->nobjs >= min) | |
282 | return 0; | |
283 | while (cache->nobjs < ARRAY_SIZE(cache->objects)) { | |
2e3e5882 | 284 | page = alloc_page(GFP_KERNEL); |
c1158e63 AK |
285 | if (!page) |
286 | return -ENOMEM; | |
287 | set_page_private(page, 0); | |
288 | cache->objects[cache->nobjs++] = page_address(page); | |
289 | } | |
290 | return 0; | |
291 | } | |
292 | ||
293 | static void mmu_free_memory_cache_page(struct kvm_mmu_memory_cache *mc) | |
294 | { | |
295 | while (mc->nobjs) | |
c4d198d5 | 296 | free_page((unsigned long)mc->objects[--mc->nobjs]); |
c1158e63 AK |
297 | } |
298 | ||
2e3e5882 | 299 | static int mmu_topup_memory_caches(struct kvm_vcpu *vcpu) |
714b93da | 300 | { |
e2dec939 AK |
301 | int r; |
302 | ||
ad312c7c | 303 | r = mmu_topup_memory_cache(&vcpu->arch.mmu_pte_chain_cache, |
2e3e5882 | 304 | pte_chain_cache, 4); |
e2dec939 AK |
305 | if (r) |
306 | goto out; | |
ad312c7c | 307 | r = mmu_topup_memory_cache(&vcpu->arch.mmu_rmap_desc_cache, |
2e3e5882 | 308 | rmap_desc_cache, 1); |
d3d25b04 AK |
309 | if (r) |
310 | goto out; | |
ad312c7c | 311 | r = mmu_topup_memory_cache_page(&vcpu->arch.mmu_page_cache, 8); |
d3d25b04 AK |
312 | if (r) |
313 | goto out; | |
ad312c7c | 314 | r = mmu_topup_memory_cache(&vcpu->arch.mmu_page_header_cache, |
2e3e5882 | 315 | mmu_page_header_cache, 4); |
e2dec939 AK |
316 | out: |
317 | return r; | |
714b93da AK |
318 | } |
319 | ||
320 | static void mmu_free_memory_caches(struct kvm_vcpu *vcpu) | |
321 | { | |
ad312c7c ZX |
322 | mmu_free_memory_cache(&vcpu->arch.mmu_pte_chain_cache); |
323 | mmu_free_memory_cache(&vcpu->arch.mmu_rmap_desc_cache); | |
324 | mmu_free_memory_cache_page(&vcpu->arch.mmu_page_cache); | |
325 | mmu_free_memory_cache(&vcpu->arch.mmu_page_header_cache); | |
714b93da AK |
326 | } |
327 | ||
328 | static void *mmu_memory_cache_alloc(struct kvm_mmu_memory_cache *mc, | |
329 | size_t size) | |
330 | { | |
331 | void *p; | |
332 | ||
333 | BUG_ON(!mc->nobjs); | |
334 | p = mc->objects[--mc->nobjs]; | |
335 | memset(p, 0, size); | |
336 | return p; | |
337 | } | |
338 | ||
714b93da AK |
339 | static struct kvm_pte_chain *mmu_alloc_pte_chain(struct kvm_vcpu *vcpu) |
340 | { | |
ad312c7c | 341 | return mmu_memory_cache_alloc(&vcpu->arch.mmu_pte_chain_cache, |
714b93da AK |
342 | sizeof(struct kvm_pte_chain)); |
343 | } | |
344 | ||
90cb0529 | 345 | static void mmu_free_pte_chain(struct kvm_pte_chain *pc) |
714b93da | 346 | { |
90cb0529 | 347 | kfree(pc); |
714b93da AK |
348 | } |
349 | ||
350 | static struct kvm_rmap_desc *mmu_alloc_rmap_desc(struct kvm_vcpu *vcpu) | |
351 | { | |
ad312c7c | 352 | return mmu_memory_cache_alloc(&vcpu->arch.mmu_rmap_desc_cache, |
714b93da AK |
353 | sizeof(struct kvm_rmap_desc)); |
354 | } | |
355 | ||
90cb0529 | 356 | static void mmu_free_rmap_desc(struct kvm_rmap_desc *rd) |
714b93da | 357 | { |
90cb0529 | 358 | kfree(rd); |
714b93da AK |
359 | } |
360 | ||
05da4558 MT |
361 | /* |
362 | * Return the pointer to the largepage write count for a given | |
363 | * gfn, handling slots that are not large page aligned. | |
364 | */ | |
365 | static int *slot_largepage_idx(gfn_t gfn, struct kvm_memory_slot *slot) | |
366 | { | |
367 | unsigned long idx; | |
368 | ||
369 | idx = (gfn / KVM_PAGES_PER_HPAGE) - | |
370 | (slot->base_gfn / KVM_PAGES_PER_HPAGE); | |
371 | return &slot->lpage_info[idx].write_count; | |
372 | } | |
373 | ||
374 | static void account_shadowed(struct kvm *kvm, gfn_t gfn) | |
375 | { | |
376 | int *write_count; | |
377 | ||
378 | write_count = slot_largepage_idx(gfn, gfn_to_memslot(kvm, gfn)); | |
379 | *write_count += 1; | |
05da4558 MT |
380 | } |
381 | ||
382 | static void unaccount_shadowed(struct kvm *kvm, gfn_t gfn) | |
383 | { | |
384 | int *write_count; | |
385 | ||
386 | write_count = slot_largepage_idx(gfn, gfn_to_memslot(kvm, gfn)); | |
387 | *write_count -= 1; | |
388 | WARN_ON(*write_count < 0); | |
389 | } | |
390 | ||
391 | static int has_wrprotected_page(struct kvm *kvm, gfn_t gfn) | |
392 | { | |
393 | struct kvm_memory_slot *slot = gfn_to_memslot(kvm, gfn); | |
394 | int *largepage_idx; | |
395 | ||
396 | if (slot) { | |
397 | largepage_idx = slot_largepage_idx(gfn, slot); | |
398 | return *largepage_idx; | |
399 | } | |
400 | ||
401 | return 1; | |
402 | } | |
403 | ||
404 | static int host_largepage_backed(struct kvm *kvm, gfn_t gfn) | |
405 | { | |
406 | struct vm_area_struct *vma; | |
407 | unsigned long addr; | |
408 | ||
409 | addr = gfn_to_hva(kvm, gfn); | |
410 | if (kvm_is_error_hva(addr)) | |
411 | return 0; | |
412 | ||
413 | vma = find_vma(current->mm, addr); | |
414 | if (vma && is_vm_hugetlb_page(vma)) | |
415 | return 1; | |
416 | ||
417 | return 0; | |
418 | } | |
419 | ||
420 | static int is_largepage_backed(struct kvm_vcpu *vcpu, gfn_t large_gfn) | |
421 | { | |
422 | struct kvm_memory_slot *slot; | |
423 | ||
424 | if (has_wrprotected_page(vcpu->kvm, large_gfn)) | |
425 | return 0; | |
426 | ||
427 | if (!host_largepage_backed(vcpu->kvm, large_gfn)) | |
428 | return 0; | |
429 | ||
430 | slot = gfn_to_memslot(vcpu->kvm, large_gfn); | |
431 | if (slot && slot->dirty_bitmap) | |
432 | return 0; | |
433 | ||
434 | return 1; | |
435 | } | |
436 | ||
290fc38d IE |
437 | /* |
438 | * Take gfn and return the reverse mapping to it. | |
439 | * Note: gfn must be unaliased before this function get called | |
440 | */ | |
441 | ||
05da4558 | 442 | static unsigned long *gfn_to_rmap(struct kvm *kvm, gfn_t gfn, int lpage) |
290fc38d IE |
443 | { |
444 | struct kvm_memory_slot *slot; | |
05da4558 | 445 | unsigned long idx; |
290fc38d IE |
446 | |
447 | slot = gfn_to_memslot(kvm, gfn); | |
05da4558 MT |
448 | if (!lpage) |
449 | return &slot->rmap[gfn - slot->base_gfn]; | |
450 | ||
451 | idx = (gfn / KVM_PAGES_PER_HPAGE) - | |
452 | (slot->base_gfn / KVM_PAGES_PER_HPAGE); | |
453 | ||
454 | return &slot->lpage_info[idx].rmap_pde; | |
290fc38d IE |
455 | } |
456 | ||
cd4a4e53 AK |
457 | /* |
458 | * Reverse mapping data structures: | |
459 | * | |
290fc38d IE |
460 | * If rmapp bit zero is zero, then rmapp point to the shadw page table entry |
461 | * that points to page_address(page). | |
cd4a4e53 | 462 | * |
290fc38d IE |
463 | * If rmapp bit zero is one, (then rmap & ~1) points to a struct kvm_rmap_desc |
464 | * containing more mappings. | |
cd4a4e53 | 465 | */ |
05da4558 | 466 | static void rmap_add(struct kvm_vcpu *vcpu, u64 *spte, gfn_t gfn, int lpage) |
cd4a4e53 | 467 | { |
4db35314 | 468 | struct kvm_mmu_page *sp; |
cd4a4e53 | 469 | struct kvm_rmap_desc *desc; |
290fc38d | 470 | unsigned long *rmapp; |
cd4a4e53 AK |
471 | int i; |
472 | ||
473 | if (!is_rmap_pte(*spte)) | |
474 | return; | |
290fc38d | 475 | gfn = unalias_gfn(vcpu->kvm, gfn); |
4db35314 AK |
476 | sp = page_header(__pa(spte)); |
477 | sp->gfns[spte - sp->spt] = gfn; | |
05da4558 | 478 | rmapp = gfn_to_rmap(vcpu->kvm, gfn, lpage); |
290fc38d | 479 | if (!*rmapp) { |
cd4a4e53 | 480 | rmap_printk("rmap_add: %p %llx 0->1\n", spte, *spte); |
290fc38d IE |
481 | *rmapp = (unsigned long)spte; |
482 | } else if (!(*rmapp & 1)) { | |
cd4a4e53 | 483 | rmap_printk("rmap_add: %p %llx 1->many\n", spte, *spte); |
714b93da | 484 | desc = mmu_alloc_rmap_desc(vcpu); |
290fc38d | 485 | desc->shadow_ptes[0] = (u64 *)*rmapp; |
cd4a4e53 | 486 | desc->shadow_ptes[1] = spte; |
290fc38d | 487 | *rmapp = (unsigned long)desc | 1; |
cd4a4e53 AK |
488 | } else { |
489 | rmap_printk("rmap_add: %p %llx many->many\n", spte, *spte); | |
290fc38d | 490 | desc = (struct kvm_rmap_desc *)(*rmapp & ~1ul); |
cd4a4e53 AK |
491 | while (desc->shadow_ptes[RMAP_EXT-1] && desc->more) |
492 | desc = desc->more; | |
493 | if (desc->shadow_ptes[RMAP_EXT-1]) { | |
714b93da | 494 | desc->more = mmu_alloc_rmap_desc(vcpu); |
cd4a4e53 AK |
495 | desc = desc->more; |
496 | } | |
497 | for (i = 0; desc->shadow_ptes[i]; ++i) | |
498 | ; | |
499 | desc->shadow_ptes[i] = spte; | |
500 | } | |
501 | } | |
502 | ||
290fc38d | 503 | static void rmap_desc_remove_entry(unsigned long *rmapp, |
cd4a4e53 AK |
504 | struct kvm_rmap_desc *desc, |
505 | int i, | |
506 | struct kvm_rmap_desc *prev_desc) | |
507 | { | |
508 | int j; | |
509 | ||
510 | for (j = RMAP_EXT - 1; !desc->shadow_ptes[j] && j > i; --j) | |
511 | ; | |
512 | desc->shadow_ptes[i] = desc->shadow_ptes[j]; | |
11718b4d | 513 | desc->shadow_ptes[j] = NULL; |
cd4a4e53 AK |
514 | if (j != 0) |
515 | return; | |
516 | if (!prev_desc && !desc->more) | |
290fc38d | 517 | *rmapp = (unsigned long)desc->shadow_ptes[0]; |
cd4a4e53 AK |
518 | else |
519 | if (prev_desc) | |
520 | prev_desc->more = desc->more; | |
521 | else | |
290fc38d | 522 | *rmapp = (unsigned long)desc->more | 1; |
90cb0529 | 523 | mmu_free_rmap_desc(desc); |
cd4a4e53 AK |
524 | } |
525 | ||
290fc38d | 526 | static void rmap_remove(struct kvm *kvm, u64 *spte) |
cd4a4e53 | 527 | { |
cd4a4e53 AK |
528 | struct kvm_rmap_desc *desc; |
529 | struct kvm_rmap_desc *prev_desc; | |
4db35314 | 530 | struct kvm_mmu_page *sp; |
35149e21 | 531 | pfn_t pfn; |
290fc38d | 532 | unsigned long *rmapp; |
cd4a4e53 AK |
533 | int i; |
534 | ||
535 | if (!is_rmap_pte(*spte)) | |
536 | return; | |
4db35314 | 537 | sp = page_header(__pa(spte)); |
35149e21 | 538 | pfn = spte_to_pfn(*spte); |
7b52345e | 539 | if (*spte & shadow_accessed_mask) |
35149e21 | 540 | kvm_set_pfn_accessed(pfn); |
b4231d61 | 541 | if (is_writeble_pte(*spte)) |
35149e21 | 542 | kvm_release_pfn_dirty(pfn); |
b4231d61 | 543 | else |
35149e21 | 544 | kvm_release_pfn_clean(pfn); |
05da4558 | 545 | rmapp = gfn_to_rmap(kvm, sp->gfns[spte - sp->spt], is_large_pte(*spte)); |
290fc38d | 546 | if (!*rmapp) { |
cd4a4e53 AK |
547 | printk(KERN_ERR "rmap_remove: %p %llx 0->BUG\n", spte, *spte); |
548 | BUG(); | |
290fc38d | 549 | } else if (!(*rmapp & 1)) { |
cd4a4e53 | 550 | rmap_printk("rmap_remove: %p %llx 1->0\n", spte, *spte); |
290fc38d | 551 | if ((u64 *)*rmapp != spte) { |
cd4a4e53 AK |
552 | printk(KERN_ERR "rmap_remove: %p %llx 1->BUG\n", |
553 | spte, *spte); | |
554 | BUG(); | |
555 | } | |
290fc38d | 556 | *rmapp = 0; |
cd4a4e53 AK |
557 | } else { |
558 | rmap_printk("rmap_remove: %p %llx many->many\n", spte, *spte); | |
290fc38d | 559 | desc = (struct kvm_rmap_desc *)(*rmapp & ~1ul); |
cd4a4e53 AK |
560 | prev_desc = NULL; |
561 | while (desc) { | |
562 | for (i = 0; i < RMAP_EXT && desc->shadow_ptes[i]; ++i) | |
563 | if (desc->shadow_ptes[i] == spte) { | |
290fc38d | 564 | rmap_desc_remove_entry(rmapp, |
714b93da | 565 | desc, i, |
cd4a4e53 AK |
566 | prev_desc); |
567 | return; | |
568 | } | |
569 | prev_desc = desc; | |
570 | desc = desc->more; | |
571 | } | |
572 | BUG(); | |
573 | } | |
574 | } | |
575 | ||
98348e95 | 576 | static u64 *rmap_next(struct kvm *kvm, unsigned long *rmapp, u64 *spte) |
374cbac0 | 577 | { |
374cbac0 | 578 | struct kvm_rmap_desc *desc; |
98348e95 IE |
579 | struct kvm_rmap_desc *prev_desc; |
580 | u64 *prev_spte; | |
581 | int i; | |
582 | ||
583 | if (!*rmapp) | |
584 | return NULL; | |
585 | else if (!(*rmapp & 1)) { | |
586 | if (!spte) | |
587 | return (u64 *)*rmapp; | |
588 | return NULL; | |
589 | } | |
590 | desc = (struct kvm_rmap_desc *)(*rmapp & ~1ul); | |
591 | prev_desc = NULL; | |
592 | prev_spte = NULL; | |
593 | while (desc) { | |
594 | for (i = 0; i < RMAP_EXT && desc->shadow_ptes[i]; ++i) { | |
595 | if (prev_spte == spte) | |
596 | return desc->shadow_ptes[i]; | |
597 | prev_spte = desc->shadow_ptes[i]; | |
598 | } | |
599 | desc = desc->more; | |
600 | } | |
601 | return NULL; | |
602 | } | |
603 | ||
604 | static void rmap_write_protect(struct kvm *kvm, u64 gfn) | |
605 | { | |
290fc38d | 606 | unsigned long *rmapp; |
374cbac0 | 607 | u64 *spte; |
caa5b8a5 | 608 | int write_protected = 0; |
374cbac0 | 609 | |
4a4c9924 | 610 | gfn = unalias_gfn(kvm, gfn); |
05da4558 | 611 | rmapp = gfn_to_rmap(kvm, gfn, 0); |
374cbac0 | 612 | |
98348e95 IE |
613 | spte = rmap_next(kvm, rmapp, NULL); |
614 | while (spte) { | |
374cbac0 | 615 | BUG_ON(!spte); |
374cbac0 | 616 | BUG_ON(!(*spte & PT_PRESENT_MASK)); |
374cbac0 | 617 | rmap_printk("rmap_write_protect: spte %p %llx\n", spte, *spte); |
caa5b8a5 | 618 | if (is_writeble_pte(*spte)) { |
9647c14c | 619 | set_shadow_pte(spte, *spte & ~PT_WRITABLE_MASK); |
caa5b8a5 ED |
620 | write_protected = 1; |
621 | } | |
9647c14c | 622 | spte = rmap_next(kvm, rmapp, spte); |
374cbac0 | 623 | } |
855149aa | 624 | if (write_protected) { |
35149e21 | 625 | pfn_t pfn; |
855149aa IE |
626 | |
627 | spte = rmap_next(kvm, rmapp, NULL); | |
35149e21 AL |
628 | pfn = spte_to_pfn(*spte); |
629 | kvm_set_pfn_dirty(pfn); | |
855149aa IE |
630 | } |
631 | ||
05da4558 MT |
632 | /* check for huge page mappings */ |
633 | rmapp = gfn_to_rmap(kvm, gfn, 1); | |
634 | spte = rmap_next(kvm, rmapp, NULL); | |
635 | while (spte) { | |
636 | BUG_ON(!spte); | |
637 | BUG_ON(!(*spte & PT_PRESENT_MASK)); | |
638 | BUG_ON((*spte & (PT_PAGE_SIZE_MASK|PT_PRESENT_MASK)) != (PT_PAGE_SIZE_MASK|PT_PRESENT_MASK)); | |
639 | pgprintk("rmap_write_protect(large): spte %p %llx %lld\n", spte, *spte, gfn); | |
640 | if (is_writeble_pte(*spte)) { | |
641 | rmap_remove(kvm, spte); | |
642 | --kvm->stat.lpages; | |
643 | set_shadow_pte(spte, shadow_trap_nonpresent_pte); | |
6597ca09 | 644 | spte = NULL; |
05da4558 MT |
645 | write_protected = 1; |
646 | } | |
647 | spte = rmap_next(kvm, rmapp, spte); | |
648 | } | |
649 | ||
caa5b8a5 ED |
650 | if (write_protected) |
651 | kvm_flush_remote_tlbs(kvm); | |
05da4558 MT |
652 | |
653 | account_shadowed(kvm, gfn); | |
374cbac0 AK |
654 | } |
655 | ||
e930bffe AA |
656 | static int kvm_unmap_rmapp(struct kvm *kvm, unsigned long *rmapp) |
657 | { | |
658 | u64 *spte; | |
659 | int need_tlb_flush = 0; | |
660 | ||
661 | while ((spte = rmap_next(kvm, rmapp, NULL))) { | |
662 | BUG_ON(!(*spte & PT_PRESENT_MASK)); | |
663 | rmap_printk("kvm_rmap_unmap_hva: spte %p %llx\n", spte, *spte); | |
664 | rmap_remove(kvm, spte); | |
665 | set_shadow_pte(spte, shadow_trap_nonpresent_pte); | |
666 | need_tlb_flush = 1; | |
667 | } | |
668 | return need_tlb_flush; | |
669 | } | |
670 | ||
671 | static int kvm_handle_hva(struct kvm *kvm, unsigned long hva, | |
672 | int (*handler)(struct kvm *kvm, unsigned long *rmapp)) | |
673 | { | |
674 | int i; | |
675 | int retval = 0; | |
676 | ||
677 | /* | |
678 | * If mmap_sem isn't taken, we can look the memslots with only | |
679 | * the mmu_lock by skipping over the slots with userspace_addr == 0. | |
680 | */ | |
681 | for (i = 0; i < kvm->nmemslots; i++) { | |
682 | struct kvm_memory_slot *memslot = &kvm->memslots[i]; | |
683 | unsigned long start = memslot->userspace_addr; | |
684 | unsigned long end; | |
685 | ||
686 | /* mmu_lock protects userspace_addr */ | |
687 | if (!start) | |
688 | continue; | |
689 | ||
690 | end = start + (memslot->npages << PAGE_SHIFT); | |
691 | if (hva >= start && hva < end) { | |
692 | gfn_t gfn_offset = (hva - start) >> PAGE_SHIFT; | |
693 | retval |= handler(kvm, &memslot->rmap[gfn_offset]); | |
694 | retval |= handler(kvm, | |
695 | &memslot->lpage_info[ | |
696 | gfn_offset / | |
697 | KVM_PAGES_PER_HPAGE].rmap_pde); | |
698 | } | |
699 | } | |
700 | ||
701 | return retval; | |
702 | } | |
703 | ||
704 | int kvm_unmap_hva(struct kvm *kvm, unsigned long hva) | |
705 | { | |
706 | return kvm_handle_hva(kvm, hva, kvm_unmap_rmapp); | |
707 | } | |
708 | ||
709 | static int kvm_age_rmapp(struct kvm *kvm, unsigned long *rmapp) | |
710 | { | |
711 | u64 *spte; | |
712 | int young = 0; | |
713 | ||
534e38b4 SY |
714 | /* always return old for EPT */ |
715 | if (!shadow_accessed_mask) | |
716 | return 0; | |
717 | ||
e930bffe AA |
718 | spte = rmap_next(kvm, rmapp, NULL); |
719 | while (spte) { | |
720 | int _young; | |
721 | u64 _spte = *spte; | |
722 | BUG_ON(!(_spte & PT_PRESENT_MASK)); | |
723 | _young = _spte & PT_ACCESSED_MASK; | |
724 | if (_young) { | |
725 | young = 1; | |
726 | clear_bit(PT_ACCESSED_SHIFT, (unsigned long *)spte); | |
727 | } | |
728 | spte = rmap_next(kvm, rmapp, spte); | |
729 | } | |
730 | return young; | |
731 | } | |
732 | ||
733 | int kvm_age_hva(struct kvm *kvm, unsigned long hva) | |
734 | { | |
735 | return kvm_handle_hva(kvm, hva, kvm_age_rmapp); | |
736 | } | |
737 | ||
d6c69ee9 | 738 | #ifdef MMU_DEBUG |
47ad8e68 | 739 | static int is_empty_shadow_page(u64 *spt) |
6aa8b732 | 740 | { |
139bdb2d AK |
741 | u64 *pos; |
742 | u64 *end; | |
743 | ||
47ad8e68 | 744 | for (pos = spt, end = pos + PAGE_SIZE / sizeof(u64); pos != end; pos++) |
3c915510 | 745 | if (is_shadow_present_pte(*pos)) { |
b8688d51 | 746 | printk(KERN_ERR "%s: %p %llx\n", __func__, |
139bdb2d | 747 | pos, *pos); |
6aa8b732 | 748 | return 0; |
139bdb2d | 749 | } |
6aa8b732 AK |
750 | return 1; |
751 | } | |
d6c69ee9 | 752 | #endif |
6aa8b732 | 753 | |
4db35314 | 754 | static void kvm_mmu_free_page(struct kvm *kvm, struct kvm_mmu_page *sp) |
260746c0 | 755 | { |
4db35314 AK |
756 | ASSERT(is_empty_shadow_page(sp->spt)); |
757 | list_del(&sp->link); | |
758 | __free_page(virt_to_page(sp->spt)); | |
759 | __free_page(virt_to_page(sp->gfns)); | |
760 | kfree(sp); | |
f05e70ac | 761 | ++kvm->arch.n_free_mmu_pages; |
260746c0 AK |
762 | } |
763 | ||
cea0f0e7 AK |
764 | static unsigned kvm_page_table_hashfn(gfn_t gfn) |
765 | { | |
1ae0a13d | 766 | return gfn & ((1 << KVM_MMU_HASH_SHIFT) - 1); |
cea0f0e7 AK |
767 | } |
768 | ||
25c0de2c AK |
769 | static struct kvm_mmu_page *kvm_mmu_alloc_page(struct kvm_vcpu *vcpu, |
770 | u64 *parent_pte) | |
6aa8b732 | 771 | { |
4db35314 | 772 | struct kvm_mmu_page *sp; |
6aa8b732 | 773 | |
ad312c7c ZX |
774 | sp = mmu_memory_cache_alloc(&vcpu->arch.mmu_page_header_cache, sizeof *sp); |
775 | sp->spt = mmu_memory_cache_alloc(&vcpu->arch.mmu_page_cache, PAGE_SIZE); | |
776 | sp->gfns = mmu_memory_cache_alloc(&vcpu->arch.mmu_page_cache, PAGE_SIZE); | |
4db35314 | 777 | set_page_private(virt_to_page(sp->spt), (unsigned long)sp); |
f05e70ac | 778 | list_add(&sp->link, &vcpu->kvm->arch.active_mmu_pages); |
4db35314 AK |
779 | ASSERT(is_empty_shadow_page(sp->spt)); |
780 | sp->slot_bitmap = 0; | |
781 | sp->multimapped = 0; | |
782 | sp->parent_pte = parent_pte; | |
f05e70ac | 783 | --vcpu->kvm->arch.n_free_mmu_pages; |
4db35314 | 784 | return sp; |
6aa8b732 AK |
785 | } |
786 | ||
714b93da | 787 | static void mmu_page_add_parent_pte(struct kvm_vcpu *vcpu, |
4db35314 | 788 | struct kvm_mmu_page *sp, u64 *parent_pte) |
cea0f0e7 AK |
789 | { |
790 | struct kvm_pte_chain *pte_chain; | |
791 | struct hlist_node *node; | |
792 | int i; | |
793 | ||
794 | if (!parent_pte) | |
795 | return; | |
4db35314 AK |
796 | if (!sp->multimapped) { |
797 | u64 *old = sp->parent_pte; | |
cea0f0e7 AK |
798 | |
799 | if (!old) { | |
4db35314 | 800 | sp->parent_pte = parent_pte; |
cea0f0e7 AK |
801 | return; |
802 | } | |
4db35314 | 803 | sp->multimapped = 1; |
714b93da | 804 | pte_chain = mmu_alloc_pte_chain(vcpu); |
4db35314 AK |
805 | INIT_HLIST_HEAD(&sp->parent_ptes); |
806 | hlist_add_head(&pte_chain->link, &sp->parent_ptes); | |
cea0f0e7 AK |
807 | pte_chain->parent_ptes[0] = old; |
808 | } | |
4db35314 | 809 | hlist_for_each_entry(pte_chain, node, &sp->parent_ptes, link) { |
cea0f0e7 AK |
810 | if (pte_chain->parent_ptes[NR_PTE_CHAIN_ENTRIES-1]) |
811 | continue; | |
812 | for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i) | |
813 | if (!pte_chain->parent_ptes[i]) { | |
814 | pte_chain->parent_ptes[i] = parent_pte; | |
815 | return; | |
816 | } | |
817 | } | |
714b93da | 818 | pte_chain = mmu_alloc_pte_chain(vcpu); |
cea0f0e7 | 819 | BUG_ON(!pte_chain); |
4db35314 | 820 | hlist_add_head(&pte_chain->link, &sp->parent_ptes); |
cea0f0e7 AK |
821 | pte_chain->parent_ptes[0] = parent_pte; |
822 | } | |
823 | ||
4db35314 | 824 | static void mmu_page_remove_parent_pte(struct kvm_mmu_page *sp, |
cea0f0e7 AK |
825 | u64 *parent_pte) |
826 | { | |
827 | struct kvm_pte_chain *pte_chain; | |
828 | struct hlist_node *node; | |
829 | int i; | |
830 | ||
4db35314 AK |
831 | if (!sp->multimapped) { |
832 | BUG_ON(sp->parent_pte != parent_pte); | |
833 | sp->parent_pte = NULL; | |
cea0f0e7 AK |
834 | return; |
835 | } | |
4db35314 | 836 | hlist_for_each_entry(pte_chain, node, &sp->parent_ptes, link) |
cea0f0e7 AK |
837 | for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i) { |
838 | if (!pte_chain->parent_ptes[i]) | |
839 | break; | |
840 | if (pte_chain->parent_ptes[i] != parent_pte) | |
841 | continue; | |
697fe2e2 AK |
842 | while (i + 1 < NR_PTE_CHAIN_ENTRIES |
843 | && pte_chain->parent_ptes[i + 1]) { | |
cea0f0e7 AK |
844 | pte_chain->parent_ptes[i] |
845 | = pte_chain->parent_ptes[i + 1]; | |
846 | ++i; | |
847 | } | |
848 | pte_chain->parent_ptes[i] = NULL; | |
697fe2e2 AK |
849 | if (i == 0) { |
850 | hlist_del(&pte_chain->link); | |
90cb0529 | 851 | mmu_free_pte_chain(pte_chain); |
4db35314 AK |
852 | if (hlist_empty(&sp->parent_ptes)) { |
853 | sp->multimapped = 0; | |
854 | sp->parent_pte = NULL; | |
697fe2e2 AK |
855 | } |
856 | } | |
cea0f0e7 AK |
857 | return; |
858 | } | |
859 | BUG(); | |
860 | } | |
861 | ||
d761a501 AK |
862 | static void nonpaging_prefetch_page(struct kvm_vcpu *vcpu, |
863 | struct kvm_mmu_page *sp) | |
864 | { | |
865 | int i; | |
866 | ||
867 | for (i = 0; i < PT64_ENT_PER_PAGE; ++i) | |
868 | sp->spt[i] = shadow_trap_nonpresent_pte; | |
869 | } | |
870 | ||
4db35314 | 871 | static struct kvm_mmu_page *kvm_mmu_lookup_page(struct kvm *kvm, gfn_t gfn) |
cea0f0e7 AK |
872 | { |
873 | unsigned index; | |
874 | struct hlist_head *bucket; | |
4db35314 | 875 | struct kvm_mmu_page *sp; |
cea0f0e7 AK |
876 | struct hlist_node *node; |
877 | ||
b8688d51 | 878 | pgprintk("%s: looking for gfn %lx\n", __func__, gfn); |
1ae0a13d | 879 | index = kvm_page_table_hashfn(gfn); |
f05e70ac | 880 | bucket = &kvm->arch.mmu_page_hash[index]; |
4db35314 | 881 | hlist_for_each_entry(sp, node, bucket, hash_link) |
2e53d63a MT |
882 | if (sp->gfn == gfn && !sp->role.metaphysical |
883 | && !sp->role.invalid) { | |
cea0f0e7 | 884 | pgprintk("%s: found role %x\n", |
b8688d51 | 885 | __func__, sp->role.word); |
4db35314 | 886 | return sp; |
cea0f0e7 AK |
887 | } |
888 | return NULL; | |
889 | } | |
890 | ||
891 | static struct kvm_mmu_page *kvm_mmu_get_page(struct kvm_vcpu *vcpu, | |
892 | gfn_t gfn, | |
893 | gva_t gaddr, | |
894 | unsigned level, | |
895 | int metaphysical, | |
41074d07 | 896 | unsigned access, |
f7d9c7b7 | 897 | u64 *parent_pte) |
cea0f0e7 AK |
898 | { |
899 | union kvm_mmu_page_role role; | |
900 | unsigned index; | |
901 | unsigned quadrant; | |
902 | struct hlist_head *bucket; | |
4db35314 | 903 | struct kvm_mmu_page *sp; |
cea0f0e7 AK |
904 | struct hlist_node *node; |
905 | ||
906 | role.word = 0; | |
ad312c7c | 907 | role.glevels = vcpu->arch.mmu.root_level; |
cea0f0e7 AK |
908 | role.level = level; |
909 | role.metaphysical = metaphysical; | |
41074d07 | 910 | role.access = access; |
ad312c7c | 911 | if (vcpu->arch.mmu.root_level <= PT32_ROOT_LEVEL) { |
cea0f0e7 AK |
912 | quadrant = gaddr >> (PAGE_SHIFT + (PT64_PT_BITS * level)); |
913 | quadrant &= (1 << ((PT32_PT_BITS - PT64_PT_BITS) * level)) - 1; | |
914 | role.quadrant = quadrant; | |
915 | } | |
b8688d51 | 916 | pgprintk("%s: looking gfn %lx role %x\n", __func__, |
cea0f0e7 | 917 | gfn, role.word); |
1ae0a13d | 918 | index = kvm_page_table_hashfn(gfn); |
f05e70ac | 919 | bucket = &vcpu->kvm->arch.mmu_page_hash[index]; |
4db35314 AK |
920 | hlist_for_each_entry(sp, node, bucket, hash_link) |
921 | if (sp->gfn == gfn && sp->role.word == role.word) { | |
922 | mmu_page_add_parent_pte(vcpu, sp, parent_pte); | |
b8688d51 | 923 | pgprintk("%s: found\n", __func__); |
4db35314 | 924 | return sp; |
cea0f0e7 | 925 | } |
dfc5aa00 | 926 | ++vcpu->kvm->stat.mmu_cache_miss; |
4db35314 AK |
927 | sp = kvm_mmu_alloc_page(vcpu, parent_pte); |
928 | if (!sp) | |
929 | return sp; | |
b8688d51 | 930 | pgprintk("%s: adding gfn %lx role %x\n", __func__, gfn, role.word); |
4db35314 AK |
931 | sp->gfn = gfn; |
932 | sp->role = role; | |
933 | hlist_add_head(&sp->hash_link, bucket); | |
374cbac0 | 934 | if (!metaphysical) |
4a4c9924 | 935 | rmap_write_protect(vcpu->kvm, gfn); |
131d8279 AK |
936 | if (shadow_trap_nonpresent_pte != shadow_notrap_nonpresent_pte) |
937 | vcpu->arch.mmu.prefetch_page(vcpu, sp); | |
938 | else | |
939 | nonpaging_prefetch_page(vcpu, sp); | |
4db35314 | 940 | return sp; |
cea0f0e7 AK |
941 | } |
942 | ||
90cb0529 | 943 | static void kvm_mmu_page_unlink_children(struct kvm *kvm, |
4db35314 | 944 | struct kvm_mmu_page *sp) |
a436036b | 945 | { |
697fe2e2 AK |
946 | unsigned i; |
947 | u64 *pt; | |
948 | u64 ent; | |
949 | ||
4db35314 | 950 | pt = sp->spt; |
697fe2e2 | 951 | |
4db35314 | 952 | if (sp->role.level == PT_PAGE_TABLE_LEVEL) { |
697fe2e2 | 953 | for (i = 0; i < PT64_ENT_PER_PAGE; ++i) { |
c7addb90 | 954 | if (is_shadow_present_pte(pt[i])) |
290fc38d | 955 | rmap_remove(kvm, &pt[i]); |
c7addb90 | 956 | pt[i] = shadow_trap_nonpresent_pte; |
697fe2e2 AK |
957 | } |
958 | return; | |
959 | } | |
960 | ||
961 | for (i = 0; i < PT64_ENT_PER_PAGE; ++i) { | |
962 | ent = pt[i]; | |
963 | ||
05da4558 MT |
964 | if (is_shadow_present_pte(ent)) { |
965 | if (!is_large_pte(ent)) { | |
966 | ent &= PT64_BASE_ADDR_MASK; | |
967 | mmu_page_remove_parent_pte(page_header(ent), | |
968 | &pt[i]); | |
969 | } else { | |
970 | --kvm->stat.lpages; | |
971 | rmap_remove(kvm, &pt[i]); | |
972 | } | |
973 | } | |
c7addb90 | 974 | pt[i] = shadow_trap_nonpresent_pte; |
697fe2e2 | 975 | } |
a436036b AK |
976 | } |
977 | ||
4db35314 | 978 | static void kvm_mmu_put_page(struct kvm_mmu_page *sp, u64 *parent_pte) |
cea0f0e7 | 979 | { |
4db35314 | 980 | mmu_page_remove_parent_pte(sp, parent_pte); |
a436036b AK |
981 | } |
982 | ||
12b7d28f AK |
983 | static void kvm_mmu_reset_last_pte_updated(struct kvm *kvm) |
984 | { | |
985 | int i; | |
986 | ||
987 | for (i = 0; i < KVM_MAX_VCPUS; ++i) | |
988 | if (kvm->vcpus[i]) | |
ad312c7c | 989 | kvm->vcpus[i]->arch.last_pte_updated = NULL; |
12b7d28f AK |
990 | } |
991 | ||
31aa2b44 | 992 | static void kvm_mmu_unlink_parents(struct kvm *kvm, struct kvm_mmu_page *sp) |
a436036b AK |
993 | { |
994 | u64 *parent_pte; | |
995 | ||
4db35314 AK |
996 | while (sp->multimapped || sp->parent_pte) { |
997 | if (!sp->multimapped) | |
998 | parent_pte = sp->parent_pte; | |
a436036b AK |
999 | else { |
1000 | struct kvm_pte_chain *chain; | |
1001 | ||
4db35314 | 1002 | chain = container_of(sp->parent_ptes.first, |
a436036b AK |
1003 | struct kvm_pte_chain, link); |
1004 | parent_pte = chain->parent_ptes[0]; | |
1005 | } | |
697fe2e2 | 1006 | BUG_ON(!parent_pte); |
4db35314 | 1007 | kvm_mmu_put_page(sp, parent_pte); |
c7addb90 | 1008 | set_shadow_pte(parent_pte, shadow_trap_nonpresent_pte); |
a436036b | 1009 | } |
31aa2b44 AK |
1010 | } |
1011 | ||
1012 | static void kvm_mmu_zap_page(struct kvm *kvm, struct kvm_mmu_page *sp) | |
1013 | { | |
1014 | ++kvm->stat.mmu_shadow_zapped; | |
4db35314 | 1015 | kvm_mmu_page_unlink_children(kvm, sp); |
31aa2b44 | 1016 | kvm_mmu_unlink_parents(kvm, sp); |
5b5c6a5a AK |
1017 | kvm_flush_remote_tlbs(kvm); |
1018 | if (!sp->role.invalid && !sp->role.metaphysical) | |
1019 | unaccount_shadowed(kvm, sp->gfn); | |
4db35314 AK |
1020 | if (!sp->root_count) { |
1021 | hlist_del(&sp->hash_link); | |
1022 | kvm_mmu_free_page(kvm, sp); | |
2e53d63a | 1023 | } else { |
2e53d63a | 1024 | sp->role.invalid = 1; |
5b5c6a5a | 1025 | list_move(&sp->link, &kvm->arch.active_mmu_pages); |
2e53d63a MT |
1026 | kvm_reload_remote_mmus(kvm); |
1027 | } | |
12b7d28f | 1028 | kvm_mmu_reset_last_pte_updated(kvm); |
a436036b AK |
1029 | } |
1030 | ||
82ce2c96 IE |
1031 | /* |
1032 | * Changing the number of mmu pages allocated to the vm | |
1033 | * Note: if kvm_nr_mmu_pages is too small, you will get dead lock | |
1034 | */ | |
1035 | void kvm_mmu_change_mmu_pages(struct kvm *kvm, unsigned int kvm_nr_mmu_pages) | |
1036 | { | |
1037 | /* | |
1038 | * If we set the number of mmu pages to be smaller be than the | |
1039 | * number of actived pages , we must to free some mmu pages before we | |
1040 | * change the value | |
1041 | */ | |
1042 | ||
f05e70ac | 1043 | if ((kvm->arch.n_alloc_mmu_pages - kvm->arch.n_free_mmu_pages) > |
82ce2c96 | 1044 | kvm_nr_mmu_pages) { |
f05e70ac ZX |
1045 | int n_used_mmu_pages = kvm->arch.n_alloc_mmu_pages |
1046 | - kvm->arch.n_free_mmu_pages; | |
82ce2c96 IE |
1047 | |
1048 | while (n_used_mmu_pages > kvm_nr_mmu_pages) { | |
1049 | struct kvm_mmu_page *page; | |
1050 | ||
f05e70ac | 1051 | page = container_of(kvm->arch.active_mmu_pages.prev, |
82ce2c96 IE |
1052 | struct kvm_mmu_page, link); |
1053 | kvm_mmu_zap_page(kvm, page); | |
1054 | n_used_mmu_pages--; | |
1055 | } | |
f05e70ac | 1056 | kvm->arch.n_free_mmu_pages = 0; |
82ce2c96 IE |
1057 | } |
1058 | else | |
f05e70ac ZX |
1059 | kvm->arch.n_free_mmu_pages += kvm_nr_mmu_pages |
1060 | - kvm->arch.n_alloc_mmu_pages; | |
82ce2c96 | 1061 | |
f05e70ac | 1062 | kvm->arch.n_alloc_mmu_pages = kvm_nr_mmu_pages; |
82ce2c96 IE |
1063 | } |
1064 | ||
f67a46f4 | 1065 | static int kvm_mmu_unprotect_page(struct kvm *kvm, gfn_t gfn) |
a436036b AK |
1066 | { |
1067 | unsigned index; | |
1068 | struct hlist_head *bucket; | |
4db35314 | 1069 | struct kvm_mmu_page *sp; |
a436036b AK |
1070 | struct hlist_node *node, *n; |
1071 | int r; | |
1072 | ||
b8688d51 | 1073 | pgprintk("%s: looking for gfn %lx\n", __func__, gfn); |
a436036b | 1074 | r = 0; |
1ae0a13d | 1075 | index = kvm_page_table_hashfn(gfn); |
f05e70ac | 1076 | bucket = &kvm->arch.mmu_page_hash[index]; |
4db35314 AK |
1077 | hlist_for_each_entry_safe(sp, node, n, bucket, hash_link) |
1078 | if (sp->gfn == gfn && !sp->role.metaphysical) { | |
b8688d51 | 1079 | pgprintk("%s: gfn %lx role %x\n", __func__, gfn, |
4db35314 AK |
1080 | sp->role.word); |
1081 | kvm_mmu_zap_page(kvm, sp); | |
a436036b AK |
1082 | r = 1; |
1083 | } | |
1084 | return r; | |
cea0f0e7 AK |
1085 | } |
1086 | ||
f67a46f4 | 1087 | static void mmu_unshadow(struct kvm *kvm, gfn_t gfn) |
97a0a01e | 1088 | { |
4db35314 | 1089 | struct kvm_mmu_page *sp; |
97a0a01e | 1090 | |
4db35314 | 1091 | while ((sp = kvm_mmu_lookup_page(kvm, gfn)) != NULL) { |
b8688d51 | 1092 | pgprintk("%s: zap %lx %x\n", __func__, gfn, sp->role.word); |
4db35314 | 1093 | kvm_mmu_zap_page(kvm, sp); |
97a0a01e AK |
1094 | } |
1095 | } | |
1096 | ||
38c335f1 | 1097 | static void page_header_update_slot(struct kvm *kvm, void *pte, gfn_t gfn) |
6aa8b732 | 1098 | { |
38c335f1 | 1099 | int slot = memslot_id(kvm, gfn_to_memslot(kvm, gfn)); |
4db35314 | 1100 | struct kvm_mmu_page *sp = page_header(__pa(pte)); |
6aa8b732 | 1101 | |
4db35314 | 1102 | __set_bit(slot, &sp->slot_bitmap); |
6aa8b732 AK |
1103 | } |
1104 | ||
039576c0 AK |
1105 | struct page *gva_to_page(struct kvm_vcpu *vcpu, gva_t gva) |
1106 | { | |
72dc67a6 IE |
1107 | struct page *page; |
1108 | ||
ad312c7c | 1109 | gpa_t gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, gva); |
039576c0 AK |
1110 | |
1111 | if (gpa == UNMAPPED_GVA) | |
1112 | return NULL; | |
72dc67a6 IE |
1113 | |
1114 | down_read(¤t->mm->mmap_sem); | |
1115 | page = gfn_to_page(vcpu->kvm, gpa >> PAGE_SHIFT); | |
1116 | up_read(¤t->mm->mmap_sem); | |
1117 | ||
1118 | return page; | |
039576c0 AK |
1119 | } |
1120 | ||
1c4f1fd6 AK |
1121 | static void mmu_set_spte(struct kvm_vcpu *vcpu, u64 *shadow_pte, |
1122 | unsigned pt_access, unsigned pte_access, | |
1123 | int user_fault, int write_fault, int dirty, | |
05da4558 | 1124 | int *ptwrite, int largepage, gfn_t gfn, |
35149e21 | 1125 | pfn_t pfn, bool speculative) |
1c4f1fd6 AK |
1126 | { |
1127 | u64 spte; | |
15aaa819 | 1128 | int was_rmapped = 0; |
75e68e60 | 1129 | int was_writeble = is_writeble_pte(*shadow_pte); |
1c4f1fd6 | 1130 | |
bc750ba8 | 1131 | pgprintk("%s: spte %llx access %x write_fault %d" |
1c4f1fd6 | 1132 | " user_fault %d gfn %lx\n", |
b8688d51 | 1133 | __func__, *shadow_pte, pt_access, |
1c4f1fd6 AK |
1134 | write_fault, user_fault, gfn); |
1135 | ||
15aaa819 | 1136 | if (is_rmap_pte(*shadow_pte)) { |
05da4558 MT |
1137 | /* |
1138 | * If we overwrite a PTE page pointer with a 2MB PMD, unlink | |
1139 | * the parent of the now unreachable PTE. | |
1140 | */ | |
1141 | if (largepage && !is_large_pte(*shadow_pte)) { | |
1142 | struct kvm_mmu_page *child; | |
1143 | u64 pte = *shadow_pte; | |
1144 | ||
1145 | child = page_header(pte & PT64_BASE_ADDR_MASK); | |
1146 | mmu_page_remove_parent_pte(child, shadow_pte); | |
35149e21 | 1147 | } else if (pfn != spte_to_pfn(*shadow_pte)) { |
15aaa819 | 1148 | pgprintk("hfn old %lx new %lx\n", |
35149e21 | 1149 | spte_to_pfn(*shadow_pte), pfn); |
15aaa819 | 1150 | rmap_remove(vcpu->kvm, shadow_pte); |
05da4558 MT |
1151 | } else { |
1152 | if (largepage) | |
1153 | was_rmapped = is_large_pte(*shadow_pte); | |
1154 | else | |
1155 | was_rmapped = 1; | |
15aaa819 | 1156 | } |
15aaa819 MT |
1157 | } |
1158 | ||
1c4f1fd6 AK |
1159 | /* |
1160 | * We don't set the accessed bit, since we sometimes want to see | |
1161 | * whether the guest actually used the pte (in order to detect | |
1162 | * demand paging). | |
1163 | */ | |
7b52345e | 1164 | spte = shadow_base_present_pte | shadow_dirty_mask; |
947da538 AK |
1165 | if (!speculative) |
1166 | pte_access |= PT_ACCESSED_MASK; | |
1c4f1fd6 AK |
1167 | if (!dirty) |
1168 | pte_access &= ~ACC_WRITE_MASK; | |
7b52345e SY |
1169 | if (pte_access & ACC_EXEC_MASK) |
1170 | spte |= shadow_x_mask; | |
1171 | else | |
1172 | spte |= shadow_nx_mask; | |
1c4f1fd6 | 1173 | if (pte_access & ACC_USER_MASK) |
7b52345e | 1174 | spte |= shadow_user_mask; |
05da4558 MT |
1175 | if (largepage) |
1176 | spte |= PT_PAGE_SIZE_MASK; | |
1c4f1fd6 | 1177 | |
35149e21 | 1178 | spte |= (u64)pfn << PAGE_SHIFT; |
1c4f1fd6 AK |
1179 | |
1180 | if ((pte_access & ACC_WRITE_MASK) | |
1181 | || (write_fault && !is_write_protection(vcpu) && !user_fault)) { | |
1182 | struct kvm_mmu_page *shadow; | |
1183 | ||
1184 | spte |= PT_WRITABLE_MASK; | |
1c4f1fd6 AK |
1185 | |
1186 | shadow = kvm_mmu_lookup_page(vcpu->kvm, gfn); | |
05da4558 MT |
1187 | if (shadow || |
1188 | (largepage && has_wrprotected_page(vcpu->kvm, gfn))) { | |
1c4f1fd6 | 1189 | pgprintk("%s: found shadow page for %lx, marking ro\n", |
b8688d51 | 1190 | __func__, gfn); |
1c4f1fd6 AK |
1191 | pte_access &= ~ACC_WRITE_MASK; |
1192 | if (is_writeble_pte(spte)) { | |
1193 | spte &= ~PT_WRITABLE_MASK; | |
1194 | kvm_x86_ops->tlb_flush(vcpu); | |
1195 | } | |
1196 | if (write_fault) | |
1197 | *ptwrite = 1; | |
1198 | } | |
1199 | } | |
1200 | ||
1c4f1fd6 AK |
1201 | if (pte_access & ACC_WRITE_MASK) |
1202 | mark_page_dirty(vcpu->kvm, gfn); | |
1203 | ||
b8688d51 | 1204 | pgprintk("%s: setting spte %llx\n", __func__, spte); |
db475c39 | 1205 | pgprintk("instantiating %s PTE (%s) at %ld (%llx) addr %p\n", |
05da4558 MT |
1206 | (spte&PT_PAGE_SIZE_MASK)? "2MB" : "4kB", |
1207 | (spte&PT_WRITABLE_MASK)?"RW":"R", gfn, spte, shadow_pte); | |
1c4f1fd6 | 1208 | set_shadow_pte(shadow_pte, spte); |
05da4558 MT |
1209 | if (!was_rmapped && (spte & PT_PAGE_SIZE_MASK) |
1210 | && (spte & PT_PRESENT_MASK)) | |
1211 | ++vcpu->kvm->stat.lpages; | |
1212 | ||
1c4f1fd6 AK |
1213 | page_header_update_slot(vcpu->kvm, shadow_pte, gfn); |
1214 | if (!was_rmapped) { | |
05da4558 | 1215 | rmap_add(vcpu, shadow_pte, gfn, largepage); |
1c4f1fd6 | 1216 | if (!is_rmap_pte(*shadow_pte)) |
35149e21 | 1217 | kvm_release_pfn_clean(pfn); |
75e68e60 IE |
1218 | } else { |
1219 | if (was_writeble) | |
35149e21 | 1220 | kvm_release_pfn_dirty(pfn); |
75e68e60 | 1221 | else |
35149e21 | 1222 | kvm_release_pfn_clean(pfn); |
1c4f1fd6 | 1223 | } |
1b7fcd32 | 1224 | if (speculative) { |
ad312c7c | 1225 | vcpu->arch.last_pte_updated = shadow_pte; |
1b7fcd32 AK |
1226 | vcpu->arch.last_pte_gfn = gfn; |
1227 | } | |
1c4f1fd6 AK |
1228 | } |
1229 | ||
6aa8b732 AK |
1230 | static void nonpaging_new_cr3(struct kvm_vcpu *vcpu) |
1231 | { | |
1232 | } | |
1233 | ||
4d9976bb | 1234 | static int __direct_map(struct kvm_vcpu *vcpu, gpa_t v, int write, |
35149e21 | 1235 | int largepage, gfn_t gfn, pfn_t pfn, |
05da4558 | 1236 | int level) |
6aa8b732 | 1237 | { |
ad312c7c | 1238 | hpa_t table_addr = vcpu->arch.mmu.root_hpa; |
e833240f | 1239 | int pt_write = 0; |
6aa8b732 AK |
1240 | |
1241 | for (; ; level--) { | |
1242 | u32 index = PT64_INDEX(v, level); | |
1243 | u64 *table; | |
1244 | ||
1245 | ASSERT(VALID_PAGE(table_addr)); | |
1246 | table = __va(table_addr); | |
1247 | ||
1248 | if (level == 1) { | |
e833240f | 1249 | mmu_set_spte(vcpu, &table[index], ACC_ALL, ACC_ALL, |
35149e21 | 1250 | 0, write, 1, &pt_write, 0, gfn, pfn, false); |
05da4558 MT |
1251 | return pt_write; |
1252 | } | |
1253 | ||
1254 | if (largepage && level == 2) { | |
1255 | mmu_set_spte(vcpu, &table[index], ACC_ALL, ACC_ALL, | |
35149e21 | 1256 | 0, write, 1, &pt_write, 1, gfn, pfn, false); |
d196e343 | 1257 | return pt_write; |
6aa8b732 AK |
1258 | } |
1259 | ||
c7addb90 | 1260 | if (table[index] == shadow_trap_nonpresent_pte) { |
25c0de2c | 1261 | struct kvm_mmu_page *new_table; |
cea0f0e7 | 1262 | gfn_t pseudo_gfn; |
6aa8b732 | 1263 | |
cea0f0e7 AK |
1264 | pseudo_gfn = (v & PT64_DIR_BASE_ADDR_MASK) |
1265 | >> PAGE_SHIFT; | |
1266 | new_table = kvm_mmu_get_page(vcpu, pseudo_gfn, | |
1267 | v, level - 1, | |
f7d9c7b7 | 1268 | 1, ACC_ALL, &table[index]); |
25c0de2c | 1269 | if (!new_table) { |
6aa8b732 | 1270 | pgprintk("nonpaging_map: ENOMEM\n"); |
35149e21 | 1271 | kvm_release_pfn_clean(pfn); |
6aa8b732 AK |
1272 | return -ENOMEM; |
1273 | } | |
1274 | ||
722c05f2 AK |
1275 | set_shadow_pte(&table[index], |
1276 | __pa(new_table->spt) | |
1277 | | PT_PRESENT_MASK | PT_WRITABLE_MASK | |
1278 | | shadow_user_mask | shadow_x_mask); | |
6aa8b732 AK |
1279 | } |
1280 | table_addr = table[index] & PT64_BASE_ADDR_MASK; | |
1281 | } | |
1282 | } | |
1283 | ||
10589a46 MT |
1284 | static int nonpaging_map(struct kvm_vcpu *vcpu, gva_t v, int write, gfn_t gfn) |
1285 | { | |
1286 | int r; | |
05da4558 | 1287 | int largepage = 0; |
35149e21 | 1288 | pfn_t pfn; |
e930bffe | 1289 | unsigned long mmu_seq; |
aaee2c94 MT |
1290 | |
1291 | down_read(¤t->mm->mmap_sem); | |
05da4558 MT |
1292 | if (is_largepage_backed(vcpu, gfn & ~(KVM_PAGES_PER_HPAGE-1))) { |
1293 | gfn &= ~(KVM_PAGES_PER_HPAGE-1); | |
1294 | largepage = 1; | |
1295 | } | |
1296 | ||
e930bffe AA |
1297 | mmu_seq = vcpu->kvm->mmu_notifier_seq; |
1298 | /* implicit mb(), we'll read before PT lock is unlocked */ | |
35149e21 | 1299 | pfn = gfn_to_pfn(vcpu->kvm, gfn); |
72dc67a6 | 1300 | up_read(¤t->mm->mmap_sem); |
aaee2c94 | 1301 | |
d196e343 | 1302 | /* mmio */ |
35149e21 AL |
1303 | if (is_error_pfn(pfn)) { |
1304 | kvm_release_pfn_clean(pfn); | |
d196e343 AK |
1305 | return 1; |
1306 | } | |
1307 | ||
aaee2c94 | 1308 | spin_lock(&vcpu->kvm->mmu_lock); |
e930bffe AA |
1309 | if (mmu_notifier_retry(vcpu, mmu_seq)) |
1310 | goto out_unlock; | |
eb787d10 | 1311 | kvm_mmu_free_some_pages(vcpu); |
35149e21 | 1312 | r = __direct_map(vcpu, v, write, largepage, gfn, pfn, |
05da4558 | 1313 | PT32E_ROOT_LEVEL); |
aaee2c94 MT |
1314 | spin_unlock(&vcpu->kvm->mmu_lock); |
1315 | ||
aaee2c94 | 1316 | |
10589a46 | 1317 | return r; |
e930bffe AA |
1318 | |
1319 | out_unlock: | |
1320 | spin_unlock(&vcpu->kvm->mmu_lock); | |
1321 | kvm_release_pfn_clean(pfn); | |
1322 | return 0; | |
10589a46 MT |
1323 | } |
1324 | ||
1325 | ||
17ac10ad AK |
1326 | static void mmu_free_roots(struct kvm_vcpu *vcpu) |
1327 | { | |
1328 | int i; | |
4db35314 | 1329 | struct kvm_mmu_page *sp; |
17ac10ad | 1330 | |
ad312c7c | 1331 | if (!VALID_PAGE(vcpu->arch.mmu.root_hpa)) |
7b53aa56 | 1332 | return; |
aaee2c94 | 1333 | spin_lock(&vcpu->kvm->mmu_lock); |
ad312c7c ZX |
1334 | if (vcpu->arch.mmu.shadow_root_level == PT64_ROOT_LEVEL) { |
1335 | hpa_t root = vcpu->arch.mmu.root_hpa; | |
17ac10ad | 1336 | |
4db35314 AK |
1337 | sp = page_header(root); |
1338 | --sp->root_count; | |
2e53d63a MT |
1339 | if (!sp->root_count && sp->role.invalid) |
1340 | kvm_mmu_zap_page(vcpu->kvm, sp); | |
ad312c7c | 1341 | vcpu->arch.mmu.root_hpa = INVALID_PAGE; |
aaee2c94 | 1342 | spin_unlock(&vcpu->kvm->mmu_lock); |
17ac10ad AK |
1343 | return; |
1344 | } | |
17ac10ad | 1345 | for (i = 0; i < 4; ++i) { |
ad312c7c | 1346 | hpa_t root = vcpu->arch.mmu.pae_root[i]; |
17ac10ad | 1347 | |
417726a3 | 1348 | if (root) { |
417726a3 | 1349 | root &= PT64_BASE_ADDR_MASK; |
4db35314 AK |
1350 | sp = page_header(root); |
1351 | --sp->root_count; | |
2e53d63a MT |
1352 | if (!sp->root_count && sp->role.invalid) |
1353 | kvm_mmu_zap_page(vcpu->kvm, sp); | |
417726a3 | 1354 | } |
ad312c7c | 1355 | vcpu->arch.mmu.pae_root[i] = INVALID_PAGE; |
17ac10ad | 1356 | } |
aaee2c94 | 1357 | spin_unlock(&vcpu->kvm->mmu_lock); |
ad312c7c | 1358 | vcpu->arch.mmu.root_hpa = INVALID_PAGE; |
17ac10ad AK |
1359 | } |
1360 | ||
1361 | static void mmu_alloc_roots(struct kvm_vcpu *vcpu) | |
1362 | { | |
1363 | int i; | |
cea0f0e7 | 1364 | gfn_t root_gfn; |
4db35314 | 1365 | struct kvm_mmu_page *sp; |
fb72d167 | 1366 | int metaphysical = 0; |
3bb65a22 | 1367 | |
ad312c7c | 1368 | root_gfn = vcpu->arch.cr3 >> PAGE_SHIFT; |
17ac10ad | 1369 | |
ad312c7c ZX |
1370 | if (vcpu->arch.mmu.shadow_root_level == PT64_ROOT_LEVEL) { |
1371 | hpa_t root = vcpu->arch.mmu.root_hpa; | |
17ac10ad AK |
1372 | |
1373 | ASSERT(!VALID_PAGE(root)); | |
fb72d167 JR |
1374 | if (tdp_enabled) |
1375 | metaphysical = 1; | |
4db35314 | 1376 | sp = kvm_mmu_get_page(vcpu, root_gfn, 0, |
fb72d167 JR |
1377 | PT64_ROOT_LEVEL, metaphysical, |
1378 | ACC_ALL, NULL); | |
4db35314 AK |
1379 | root = __pa(sp->spt); |
1380 | ++sp->root_count; | |
ad312c7c | 1381 | vcpu->arch.mmu.root_hpa = root; |
17ac10ad AK |
1382 | return; |
1383 | } | |
fb72d167 JR |
1384 | metaphysical = !is_paging(vcpu); |
1385 | if (tdp_enabled) | |
1386 | metaphysical = 1; | |
17ac10ad | 1387 | for (i = 0; i < 4; ++i) { |
ad312c7c | 1388 | hpa_t root = vcpu->arch.mmu.pae_root[i]; |
17ac10ad AK |
1389 | |
1390 | ASSERT(!VALID_PAGE(root)); | |
ad312c7c ZX |
1391 | if (vcpu->arch.mmu.root_level == PT32E_ROOT_LEVEL) { |
1392 | if (!is_present_pte(vcpu->arch.pdptrs[i])) { | |
1393 | vcpu->arch.mmu.pae_root[i] = 0; | |
417726a3 AK |
1394 | continue; |
1395 | } | |
ad312c7c ZX |
1396 | root_gfn = vcpu->arch.pdptrs[i] >> PAGE_SHIFT; |
1397 | } else if (vcpu->arch.mmu.root_level == 0) | |
cea0f0e7 | 1398 | root_gfn = 0; |
4db35314 | 1399 | sp = kvm_mmu_get_page(vcpu, root_gfn, i << 30, |
fb72d167 | 1400 | PT32_ROOT_LEVEL, metaphysical, |
f7d9c7b7 | 1401 | ACC_ALL, NULL); |
4db35314 AK |
1402 | root = __pa(sp->spt); |
1403 | ++sp->root_count; | |
ad312c7c | 1404 | vcpu->arch.mmu.pae_root[i] = root | PT_PRESENT_MASK; |
17ac10ad | 1405 | } |
ad312c7c | 1406 | vcpu->arch.mmu.root_hpa = __pa(vcpu->arch.mmu.pae_root); |
17ac10ad AK |
1407 | } |
1408 | ||
6aa8b732 AK |
1409 | static gpa_t nonpaging_gva_to_gpa(struct kvm_vcpu *vcpu, gva_t vaddr) |
1410 | { | |
1411 | return vaddr; | |
1412 | } | |
1413 | ||
1414 | static int nonpaging_page_fault(struct kvm_vcpu *vcpu, gva_t gva, | |
3f3e7124 | 1415 | u32 error_code) |
6aa8b732 | 1416 | { |
e833240f | 1417 | gfn_t gfn; |
e2dec939 | 1418 | int r; |
6aa8b732 | 1419 | |
b8688d51 | 1420 | pgprintk("%s: gva %lx error %x\n", __func__, gva, error_code); |
e2dec939 AK |
1421 | r = mmu_topup_memory_caches(vcpu); |
1422 | if (r) | |
1423 | return r; | |
714b93da | 1424 | |
6aa8b732 | 1425 | ASSERT(vcpu); |
ad312c7c | 1426 | ASSERT(VALID_PAGE(vcpu->arch.mmu.root_hpa)); |
6aa8b732 | 1427 | |
e833240f | 1428 | gfn = gva >> PAGE_SHIFT; |
6aa8b732 | 1429 | |
e833240f AK |
1430 | return nonpaging_map(vcpu, gva & PAGE_MASK, |
1431 | error_code & PFERR_WRITE_MASK, gfn); | |
6aa8b732 AK |
1432 | } |
1433 | ||
fb72d167 JR |
1434 | static int tdp_page_fault(struct kvm_vcpu *vcpu, gva_t gpa, |
1435 | u32 error_code) | |
1436 | { | |
35149e21 | 1437 | pfn_t pfn; |
fb72d167 | 1438 | int r; |
05da4558 MT |
1439 | int largepage = 0; |
1440 | gfn_t gfn = gpa >> PAGE_SHIFT; | |
e930bffe | 1441 | unsigned long mmu_seq; |
fb72d167 JR |
1442 | |
1443 | ASSERT(vcpu); | |
1444 | ASSERT(VALID_PAGE(vcpu->arch.mmu.root_hpa)); | |
1445 | ||
1446 | r = mmu_topup_memory_caches(vcpu); | |
1447 | if (r) | |
1448 | return r; | |
1449 | ||
1450 | down_read(¤t->mm->mmap_sem); | |
05da4558 MT |
1451 | if (is_largepage_backed(vcpu, gfn & ~(KVM_PAGES_PER_HPAGE-1))) { |
1452 | gfn &= ~(KVM_PAGES_PER_HPAGE-1); | |
1453 | largepage = 1; | |
1454 | } | |
e930bffe AA |
1455 | mmu_seq = vcpu->kvm->mmu_notifier_seq; |
1456 | /* implicit mb(), we'll read before PT lock is unlocked */ | |
35149e21 | 1457 | pfn = gfn_to_pfn(vcpu->kvm, gfn); |
3200f405 | 1458 | up_read(¤t->mm->mmap_sem); |
35149e21 AL |
1459 | if (is_error_pfn(pfn)) { |
1460 | kvm_release_pfn_clean(pfn); | |
fb72d167 JR |
1461 | return 1; |
1462 | } | |
1463 | spin_lock(&vcpu->kvm->mmu_lock); | |
e930bffe AA |
1464 | if (mmu_notifier_retry(vcpu, mmu_seq)) |
1465 | goto out_unlock; | |
fb72d167 JR |
1466 | kvm_mmu_free_some_pages(vcpu); |
1467 | r = __direct_map(vcpu, gpa, error_code & PFERR_WRITE_MASK, | |
67253af5 | 1468 | largepage, gfn, pfn, kvm_x86_ops->get_tdp_level()); |
fb72d167 | 1469 | spin_unlock(&vcpu->kvm->mmu_lock); |
fb72d167 JR |
1470 | |
1471 | return r; | |
e930bffe AA |
1472 | |
1473 | out_unlock: | |
1474 | spin_unlock(&vcpu->kvm->mmu_lock); | |
1475 | kvm_release_pfn_clean(pfn); | |
1476 | return 0; | |
fb72d167 JR |
1477 | } |
1478 | ||
6aa8b732 AK |
1479 | static void nonpaging_free(struct kvm_vcpu *vcpu) |
1480 | { | |
17ac10ad | 1481 | mmu_free_roots(vcpu); |
6aa8b732 AK |
1482 | } |
1483 | ||
1484 | static int nonpaging_init_context(struct kvm_vcpu *vcpu) | |
1485 | { | |
ad312c7c | 1486 | struct kvm_mmu *context = &vcpu->arch.mmu; |
6aa8b732 AK |
1487 | |
1488 | context->new_cr3 = nonpaging_new_cr3; | |
1489 | context->page_fault = nonpaging_page_fault; | |
6aa8b732 AK |
1490 | context->gva_to_gpa = nonpaging_gva_to_gpa; |
1491 | context->free = nonpaging_free; | |
c7addb90 | 1492 | context->prefetch_page = nonpaging_prefetch_page; |
cea0f0e7 | 1493 | context->root_level = 0; |
6aa8b732 | 1494 | context->shadow_root_level = PT32E_ROOT_LEVEL; |
17c3ba9d | 1495 | context->root_hpa = INVALID_PAGE; |
6aa8b732 AK |
1496 | return 0; |
1497 | } | |
1498 | ||
d835dfec | 1499 | void kvm_mmu_flush_tlb(struct kvm_vcpu *vcpu) |
6aa8b732 | 1500 | { |
1165f5fe | 1501 | ++vcpu->stat.tlb_flush; |
cbdd1bea | 1502 | kvm_x86_ops->tlb_flush(vcpu); |
6aa8b732 AK |
1503 | } |
1504 | ||
1505 | static void paging_new_cr3(struct kvm_vcpu *vcpu) | |
1506 | { | |
b8688d51 | 1507 | pgprintk("%s: cr3 %lx\n", __func__, vcpu->arch.cr3); |
cea0f0e7 | 1508 | mmu_free_roots(vcpu); |
6aa8b732 AK |
1509 | } |
1510 | ||
6aa8b732 AK |
1511 | static void inject_page_fault(struct kvm_vcpu *vcpu, |
1512 | u64 addr, | |
1513 | u32 err_code) | |
1514 | { | |
c3c91fee | 1515 | kvm_inject_page_fault(vcpu, addr, err_code); |
6aa8b732 AK |
1516 | } |
1517 | ||
6aa8b732 AK |
1518 | static void paging_free(struct kvm_vcpu *vcpu) |
1519 | { | |
1520 | nonpaging_free(vcpu); | |
1521 | } | |
1522 | ||
1523 | #define PTTYPE 64 | |
1524 | #include "paging_tmpl.h" | |
1525 | #undef PTTYPE | |
1526 | ||
1527 | #define PTTYPE 32 | |
1528 | #include "paging_tmpl.h" | |
1529 | #undef PTTYPE | |
1530 | ||
17ac10ad | 1531 | static int paging64_init_context_common(struct kvm_vcpu *vcpu, int level) |
6aa8b732 | 1532 | { |
ad312c7c | 1533 | struct kvm_mmu *context = &vcpu->arch.mmu; |
6aa8b732 AK |
1534 | |
1535 | ASSERT(is_pae(vcpu)); | |
1536 | context->new_cr3 = paging_new_cr3; | |
1537 | context->page_fault = paging64_page_fault; | |
6aa8b732 | 1538 | context->gva_to_gpa = paging64_gva_to_gpa; |
c7addb90 | 1539 | context->prefetch_page = paging64_prefetch_page; |
6aa8b732 | 1540 | context->free = paging_free; |
17ac10ad AK |
1541 | context->root_level = level; |
1542 | context->shadow_root_level = level; | |
17c3ba9d | 1543 | context->root_hpa = INVALID_PAGE; |
6aa8b732 AK |
1544 | return 0; |
1545 | } | |
1546 | ||
17ac10ad AK |
1547 | static int paging64_init_context(struct kvm_vcpu *vcpu) |
1548 | { | |
1549 | return paging64_init_context_common(vcpu, PT64_ROOT_LEVEL); | |
1550 | } | |
1551 | ||
6aa8b732 AK |
1552 | static int paging32_init_context(struct kvm_vcpu *vcpu) |
1553 | { | |
ad312c7c | 1554 | struct kvm_mmu *context = &vcpu->arch.mmu; |
6aa8b732 AK |
1555 | |
1556 | context->new_cr3 = paging_new_cr3; | |
1557 | context->page_fault = paging32_page_fault; | |
6aa8b732 AK |
1558 | context->gva_to_gpa = paging32_gva_to_gpa; |
1559 | context->free = paging_free; | |
c7addb90 | 1560 | context->prefetch_page = paging32_prefetch_page; |
6aa8b732 AK |
1561 | context->root_level = PT32_ROOT_LEVEL; |
1562 | context->shadow_root_level = PT32E_ROOT_LEVEL; | |
17c3ba9d | 1563 | context->root_hpa = INVALID_PAGE; |
6aa8b732 AK |
1564 | return 0; |
1565 | } | |
1566 | ||
1567 | static int paging32E_init_context(struct kvm_vcpu *vcpu) | |
1568 | { | |
17ac10ad | 1569 | return paging64_init_context_common(vcpu, PT32E_ROOT_LEVEL); |
6aa8b732 AK |
1570 | } |
1571 | ||
fb72d167 JR |
1572 | static int init_kvm_tdp_mmu(struct kvm_vcpu *vcpu) |
1573 | { | |
1574 | struct kvm_mmu *context = &vcpu->arch.mmu; | |
1575 | ||
1576 | context->new_cr3 = nonpaging_new_cr3; | |
1577 | context->page_fault = tdp_page_fault; | |
1578 | context->free = nonpaging_free; | |
1579 | context->prefetch_page = nonpaging_prefetch_page; | |
67253af5 | 1580 | context->shadow_root_level = kvm_x86_ops->get_tdp_level(); |
fb72d167 JR |
1581 | context->root_hpa = INVALID_PAGE; |
1582 | ||
1583 | if (!is_paging(vcpu)) { | |
1584 | context->gva_to_gpa = nonpaging_gva_to_gpa; | |
1585 | context->root_level = 0; | |
1586 | } else if (is_long_mode(vcpu)) { | |
1587 | context->gva_to_gpa = paging64_gva_to_gpa; | |
1588 | context->root_level = PT64_ROOT_LEVEL; | |
1589 | } else if (is_pae(vcpu)) { | |
1590 | context->gva_to_gpa = paging64_gva_to_gpa; | |
1591 | context->root_level = PT32E_ROOT_LEVEL; | |
1592 | } else { | |
1593 | context->gva_to_gpa = paging32_gva_to_gpa; | |
1594 | context->root_level = PT32_ROOT_LEVEL; | |
1595 | } | |
1596 | ||
1597 | return 0; | |
1598 | } | |
1599 | ||
1600 | static int init_kvm_softmmu(struct kvm_vcpu *vcpu) | |
6aa8b732 AK |
1601 | { |
1602 | ASSERT(vcpu); | |
ad312c7c | 1603 | ASSERT(!VALID_PAGE(vcpu->arch.mmu.root_hpa)); |
6aa8b732 AK |
1604 | |
1605 | if (!is_paging(vcpu)) | |
1606 | return nonpaging_init_context(vcpu); | |
a9058ecd | 1607 | else if (is_long_mode(vcpu)) |
6aa8b732 AK |
1608 | return paging64_init_context(vcpu); |
1609 | else if (is_pae(vcpu)) | |
1610 | return paging32E_init_context(vcpu); | |
1611 | else | |
1612 | return paging32_init_context(vcpu); | |
1613 | } | |
1614 | ||
fb72d167 JR |
1615 | static int init_kvm_mmu(struct kvm_vcpu *vcpu) |
1616 | { | |
35149e21 AL |
1617 | vcpu->arch.update_pte.pfn = bad_pfn; |
1618 | ||
fb72d167 JR |
1619 | if (tdp_enabled) |
1620 | return init_kvm_tdp_mmu(vcpu); | |
1621 | else | |
1622 | return init_kvm_softmmu(vcpu); | |
1623 | } | |
1624 | ||
6aa8b732 AK |
1625 | static void destroy_kvm_mmu(struct kvm_vcpu *vcpu) |
1626 | { | |
1627 | ASSERT(vcpu); | |
ad312c7c ZX |
1628 | if (VALID_PAGE(vcpu->arch.mmu.root_hpa)) { |
1629 | vcpu->arch.mmu.free(vcpu); | |
1630 | vcpu->arch.mmu.root_hpa = INVALID_PAGE; | |
6aa8b732 AK |
1631 | } |
1632 | } | |
1633 | ||
1634 | int kvm_mmu_reset_context(struct kvm_vcpu *vcpu) | |
17c3ba9d AK |
1635 | { |
1636 | destroy_kvm_mmu(vcpu); | |
1637 | return init_kvm_mmu(vcpu); | |
1638 | } | |
8668a3c4 | 1639 | EXPORT_SYMBOL_GPL(kvm_mmu_reset_context); |
17c3ba9d AK |
1640 | |
1641 | int kvm_mmu_load(struct kvm_vcpu *vcpu) | |
6aa8b732 | 1642 | { |
714b93da AK |
1643 | int r; |
1644 | ||
e2dec939 | 1645 | r = mmu_topup_memory_caches(vcpu); |
17c3ba9d AK |
1646 | if (r) |
1647 | goto out; | |
aaee2c94 | 1648 | spin_lock(&vcpu->kvm->mmu_lock); |
eb787d10 | 1649 | kvm_mmu_free_some_pages(vcpu); |
17c3ba9d | 1650 | mmu_alloc_roots(vcpu); |
aaee2c94 | 1651 | spin_unlock(&vcpu->kvm->mmu_lock); |
ad312c7c | 1652 | kvm_x86_ops->set_cr3(vcpu, vcpu->arch.mmu.root_hpa); |
17c3ba9d | 1653 | kvm_mmu_flush_tlb(vcpu); |
714b93da AK |
1654 | out: |
1655 | return r; | |
6aa8b732 | 1656 | } |
17c3ba9d AK |
1657 | EXPORT_SYMBOL_GPL(kvm_mmu_load); |
1658 | ||
1659 | void kvm_mmu_unload(struct kvm_vcpu *vcpu) | |
1660 | { | |
1661 | mmu_free_roots(vcpu); | |
1662 | } | |
6aa8b732 | 1663 | |
09072daf | 1664 | static void mmu_pte_write_zap_pte(struct kvm_vcpu *vcpu, |
4db35314 | 1665 | struct kvm_mmu_page *sp, |
ac1b714e AK |
1666 | u64 *spte) |
1667 | { | |
1668 | u64 pte; | |
1669 | struct kvm_mmu_page *child; | |
1670 | ||
1671 | pte = *spte; | |
c7addb90 | 1672 | if (is_shadow_present_pte(pte)) { |
05da4558 MT |
1673 | if (sp->role.level == PT_PAGE_TABLE_LEVEL || |
1674 | is_large_pte(pte)) | |
290fc38d | 1675 | rmap_remove(vcpu->kvm, spte); |
ac1b714e AK |
1676 | else { |
1677 | child = page_header(pte & PT64_BASE_ADDR_MASK); | |
90cb0529 | 1678 | mmu_page_remove_parent_pte(child, spte); |
ac1b714e AK |
1679 | } |
1680 | } | |
c7addb90 | 1681 | set_shadow_pte(spte, shadow_trap_nonpresent_pte); |
05da4558 MT |
1682 | if (is_large_pte(pte)) |
1683 | --vcpu->kvm->stat.lpages; | |
ac1b714e AK |
1684 | } |
1685 | ||
0028425f | 1686 | static void mmu_pte_write_new_pte(struct kvm_vcpu *vcpu, |
4db35314 | 1687 | struct kvm_mmu_page *sp, |
0028425f | 1688 | u64 *spte, |
489f1d65 | 1689 | const void *new) |
0028425f | 1690 | { |
30945387 MT |
1691 | if (sp->role.level != PT_PAGE_TABLE_LEVEL) { |
1692 | if (!vcpu->arch.update_pte.largepage || | |
1693 | sp->role.glevels == PT32_ROOT_LEVEL) { | |
1694 | ++vcpu->kvm->stat.mmu_pde_zapped; | |
1695 | return; | |
1696 | } | |
1697 | } | |
0028425f | 1698 | |
4cee5764 | 1699 | ++vcpu->kvm->stat.mmu_pte_updated; |
4db35314 | 1700 | if (sp->role.glevels == PT32_ROOT_LEVEL) |
489f1d65 | 1701 | paging32_update_pte(vcpu, sp, spte, new); |
0028425f | 1702 | else |
489f1d65 | 1703 | paging64_update_pte(vcpu, sp, spte, new); |
0028425f AK |
1704 | } |
1705 | ||
79539cec AK |
1706 | static bool need_remote_flush(u64 old, u64 new) |
1707 | { | |
1708 | if (!is_shadow_present_pte(old)) | |
1709 | return false; | |
1710 | if (!is_shadow_present_pte(new)) | |
1711 | return true; | |
1712 | if ((old ^ new) & PT64_BASE_ADDR_MASK) | |
1713 | return true; | |
1714 | old ^= PT64_NX_MASK; | |
1715 | new ^= PT64_NX_MASK; | |
1716 | return (old & ~new & PT64_PERM_MASK) != 0; | |
1717 | } | |
1718 | ||
1719 | static void mmu_pte_write_flush_tlb(struct kvm_vcpu *vcpu, u64 old, u64 new) | |
1720 | { | |
1721 | if (need_remote_flush(old, new)) | |
1722 | kvm_flush_remote_tlbs(vcpu->kvm); | |
1723 | else | |
1724 | kvm_mmu_flush_tlb(vcpu); | |
1725 | } | |
1726 | ||
12b7d28f AK |
1727 | static bool last_updated_pte_accessed(struct kvm_vcpu *vcpu) |
1728 | { | |
ad312c7c | 1729 | u64 *spte = vcpu->arch.last_pte_updated; |
12b7d28f | 1730 | |
7b52345e | 1731 | return !!(spte && (*spte & shadow_accessed_mask)); |
12b7d28f AK |
1732 | } |
1733 | ||
d7824fff AK |
1734 | static void mmu_guess_page_from_pte_write(struct kvm_vcpu *vcpu, gpa_t gpa, |
1735 | const u8 *new, int bytes) | |
1736 | { | |
1737 | gfn_t gfn; | |
1738 | int r; | |
1739 | u64 gpte = 0; | |
35149e21 | 1740 | pfn_t pfn; |
d7824fff | 1741 | |
05da4558 MT |
1742 | vcpu->arch.update_pte.largepage = 0; |
1743 | ||
d7824fff AK |
1744 | if (bytes != 4 && bytes != 8) |
1745 | return; | |
1746 | ||
1747 | /* | |
1748 | * Assume that the pte write on a page table of the same type | |
1749 | * as the current vcpu paging mode. This is nearly always true | |
1750 | * (might be false while changing modes). Note it is verified later | |
1751 | * by update_pte(). | |
1752 | */ | |
1753 | if (is_pae(vcpu)) { | |
1754 | /* Handle a 32-bit guest writing two halves of a 64-bit gpte */ | |
1755 | if ((bytes == 4) && (gpa % 4 == 0)) { | |
1756 | r = kvm_read_guest(vcpu->kvm, gpa & ~(u64)7, &gpte, 8); | |
1757 | if (r) | |
1758 | return; | |
1759 | memcpy((void *)&gpte + (gpa % 8), new, 4); | |
1760 | } else if ((bytes == 8) && (gpa % 8 == 0)) { | |
1761 | memcpy((void *)&gpte, new, 8); | |
1762 | } | |
1763 | } else { | |
1764 | if ((bytes == 4) && (gpa % 4 == 0)) | |
1765 | memcpy((void *)&gpte, new, 4); | |
1766 | } | |
1767 | if (!is_present_pte(gpte)) | |
1768 | return; | |
1769 | gfn = (gpte & PT64_BASE_ADDR_MASK) >> PAGE_SHIFT; | |
72dc67a6 | 1770 | |
05da4558 MT |
1771 | down_read(¤t->mm->mmap_sem); |
1772 | if (is_large_pte(gpte) && is_largepage_backed(vcpu, gfn)) { | |
1773 | gfn &= ~(KVM_PAGES_PER_HPAGE-1); | |
1774 | vcpu->arch.update_pte.largepage = 1; | |
1775 | } | |
e930bffe AA |
1776 | vcpu->arch.update_pte.mmu_seq = vcpu->kvm->mmu_notifier_seq; |
1777 | /* implicit mb(), we'll read before PT lock is unlocked */ | |
35149e21 | 1778 | pfn = gfn_to_pfn(vcpu->kvm, gfn); |
05da4558 | 1779 | up_read(¤t->mm->mmap_sem); |
72dc67a6 | 1780 | |
35149e21 AL |
1781 | if (is_error_pfn(pfn)) { |
1782 | kvm_release_pfn_clean(pfn); | |
d196e343 AK |
1783 | return; |
1784 | } | |
d7824fff | 1785 | vcpu->arch.update_pte.gfn = gfn; |
35149e21 | 1786 | vcpu->arch.update_pte.pfn = pfn; |
d7824fff AK |
1787 | } |
1788 | ||
1b7fcd32 AK |
1789 | static void kvm_mmu_access_page(struct kvm_vcpu *vcpu, gfn_t gfn) |
1790 | { | |
1791 | u64 *spte = vcpu->arch.last_pte_updated; | |
1792 | ||
1793 | if (spte | |
1794 | && vcpu->arch.last_pte_gfn == gfn | |
1795 | && shadow_accessed_mask | |
1796 | && !(*spte & shadow_accessed_mask) | |
1797 | && is_shadow_present_pte(*spte)) | |
1798 | set_bit(PT_ACCESSED_SHIFT, (unsigned long *)spte); | |
1799 | } | |
1800 | ||
09072daf | 1801 | void kvm_mmu_pte_write(struct kvm_vcpu *vcpu, gpa_t gpa, |
fe551881 | 1802 | const u8 *new, int bytes) |
da4a00f0 | 1803 | { |
9b7a0325 | 1804 | gfn_t gfn = gpa >> PAGE_SHIFT; |
4db35314 | 1805 | struct kvm_mmu_page *sp; |
0e7bc4b9 | 1806 | struct hlist_node *node, *n; |
9b7a0325 AK |
1807 | struct hlist_head *bucket; |
1808 | unsigned index; | |
489f1d65 | 1809 | u64 entry, gentry; |
9b7a0325 | 1810 | u64 *spte; |
9b7a0325 | 1811 | unsigned offset = offset_in_page(gpa); |
0e7bc4b9 | 1812 | unsigned pte_size; |
9b7a0325 | 1813 | unsigned page_offset; |
0e7bc4b9 | 1814 | unsigned misaligned; |
fce0657f | 1815 | unsigned quadrant; |
9b7a0325 | 1816 | int level; |
86a5ba02 | 1817 | int flooded = 0; |
ac1b714e | 1818 | int npte; |
489f1d65 | 1819 | int r; |
9b7a0325 | 1820 | |
b8688d51 | 1821 | pgprintk("%s: gpa %llx bytes %d\n", __func__, gpa, bytes); |
d7824fff | 1822 | mmu_guess_page_from_pte_write(vcpu, gpa, new, bytes); |
aaee2c94 | 1823 | spin_lock(&vcpu->kvm->mmu_lock); |
1b7fcd32 | 1824 | kvm_mmu_access_page(vcpu, gfn); |
eb787d10 | 1825 | kvm_mmu_free_some_pages(vcpu); |
4cee5764 | 1826 | ++vcpu->kvm->stat.mmu_pte_write; |
c7addb90 | 1827 | kvm_mmu_audit(vcpu, "pre pte write"); |
ad312c7c | 1828 | if (gfn == vcpu->arch.last_pt_write_gfn |
12b7d28f | 1829 | && !last_updated_pte_accessed(vcpu)) { |
ad312c7c ZX |
1830 | ++vcpu->arch.last_pt_write_count; |
1831 | if (vcpu->arch.last_pt_write_count >= 3) | |
86a5ba02 AK |
1832 | flooded = 1; |
1833 | } else { | |
ad312c7c ZX |
1834 | vcpu->arch.last_pt_write_gfn = gfn; |
1835 | vcpu->arch.last_pt_write_count = 1; | |
1836 | vcpu->arch.last_pte_updated = NULL; | |
86a5ba02 | 1837 | } |
1ae0a13d | 1838 | index = kvm_page_table_hashfn(gfn); |
f05e70ac | 1839 | bucket = &vcpu->kvm->arch.mmu_page_hash[index]; |
4db35314 | 1840 | hlist_for_each_entry_safe(sp, node, n, bucket, hash_link) { |
5b5c6a5a | 1841 | if (sp->gfn != gfn || sp->role.metaphysical || sp->role.invalid) |
9b7a0325 | 1842 | continue; |
4db35314 | 1843 | pte_size = sp->role.glevels == PT32_ROOT_LEVEL ? 4 : 8; |
0e7bc4b9 | 1844 | misaligned = (offset ^ (offset + bytes - 1)) & ~(pte_size - 1); |
e925c5ba | 1845 | misaligned |= bytes < 4; |
86a5ba02 | 1846 | if (misaligned || flooded) { |
0e7bc4b9 AK |
1847 | /* |
1848 | * Misaligned accesses are too much trouble to fix | |
1849 | * up; also, they usually indicate a page is not used | |
1850 | * as a page table. | |
86a5ba02 AK |
1851 | * |
1852 | * If we're seeing too many writes to a page, | |
1853 | * it may no longer be a page table, or we may be | |
1854 | * forking, in which case it is better to unmap the | |
1855 | * page. | |
0e7bc4b9 AK |
1856 | */ |
1857 | pgprintk("misaligned: gpa %llx bytes %d role %x\n", | |
4db35314 AK |
1858 | gpa, bytes, sp->role.word); |
1859 | kvm_mmu_zap_page(vcpu->kvm, sp); | |
4cee5764 | 1860 | ++vcpu->kvm->stat.mmu_flooded; |
0e7bc4b9 AK |
1861 | continue; |
1862 | } | |
9b7a0325 | 1863 | page_offset = offset; |
4db35314 | 1864 | level = sp->role.level; |
ac1b714e | 1865 | npte = 1; |
4db35314 | 1866 | if (sp->role.glevels == PT32_ROOT_LEVEL) { |
ac1b714e AK |
1867 | page_offset <<= 1; /* 32->64 */ |
1868 | /* | |
1869 | * A 32-bit pde maps 4MB while the shadow pdes map | |
1870 | * only 2MB. So we need to double the offset again | |
1871 | * and zap two pdes instead of one. | |
1872 | */ | |
1873 | if (level == PT32_ROOT_LEVEL) { | |
6b8d0f9b | 1874 | page_offset &= ~7; /* kill rounding error */ |
ac1b714e AK |
1875 | page_offset <<= 1; |
1876 | npte = 2; | |
1877 | } | |
fce0657f | 1878 | quadrant = page_offset >> PAGE_SHIFT; |
9b7a0325 | 1879 | page_offset &= ~PAGE_MASK; |
4db35314 | 1880 | if (quadrant != sp->role.quadrant) |
fce0657f | 1881 | continue; |
9b7a0325 | 1882 | } |
4db35314 | 1883 | spte = &sp->spt[page_offset / sizeof(*spte)]; |
489f1d65 DE |
1884 | if ((gpa & (pte_size - 1)) || (bytes < pte_size)) { |
1885 | gentry = 0; | |
1886 | r = kvm_read_guest_atomic(vcpu->kvm, | |
1887 | gpa & ~(u64)(pte_size - 1), | |
1888 | &gentry, pte_size); | |
1889 | new = (const void *)&gentry; | |
1890 | if (r < 0) | |
1891 | new = NULL; | |
1892 | } | |
ac1b714e | 1893 | while (npte--) { |
79539cec | 1894 | entry = *spte; |
4db35314 | 1895 | mmu_pte_write_zap_pte(vcpu, sp, spte); |
489f1d65 DE |
1896 | if (new) |
1897 | mmu_pte_write_new_pte(vcpu, sp, spte, new); | |
79539cec | 1898 | mmu_pte_write_flush_tlb(vcpu, entry, *spte); |
ac1b714e | 1899 | ++spte; |
9b7a0325 | 1900 | } |
9b7a0325 | 1901 | } |
c7addb90 | 1902 | kvm_mmu_audit(vcpu, "post pte write"); |
aaee2c94 | 1903 | spin_unlock(&vcpu->kvm->mmu_lock); |
35149e21 AL |
1904 | if (!is_error_pfn(vcpu->arch.update_pte.pfn)) { |
1905 | kvm_release_pfn_clean(vcpu->arch.update_pte.pfn); | |
1906 | vcpu->arch.update_pte.pfn = bad_pfn; | |
d7824fff | 1907 | } |
da4a00f0 AK |
1908 | } |
1909 | ||
a436036b AK |
1910 | int kvm_mmu_unprotect_page_virt(struct kvm_vcpu *vcpu, gva_t gva) |
1911 | { | |
10589a46 MT |
1912 | gpa_t gpa; |
1913 | int r; | |
a436036b | 1914 | |
10589a46 | 1915 | gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, gva); |
10589a46 | 1916 | |
aaee2c94 | 1917 | spin_lock(&vcpu->kvm->mmu_lock); |
10589a46 | 1918 | r = kvm_mmu_unprotect_page(vcpu->kvm, gpa >> PAGE_SHIFT); |
aaee2c94 | 1919 | spin_unlock(&vcpu->kvm->mmu_lock); |
10589a46 | 1920 | return r; |
a436036b | 1921 | } |
577bdc49 | 1922 | EXPORT_SYMBOL_GPL(kvm_mmu_unprotect_page_virt); |
a436036b | 1923 | |
22d95b12 | 1924 | void __kvm_mmu_free_some_pages(struct kvm_vcpu *vcpu) |
ebeace86 | 1925 | { |
f05e70ac | 1926 | while (vcpu->kvm->arch.n_free_mmu_pages < KVM_REFILL_PAGES) { |
4db35314 | 1927 | struct kvm_mmu_page *sp; |
ebeace86 | 1928 | |
f05e70ac | 1929 | sp = container_of(vcpu->kvm->arch.active_mmu_pages.prev, |
4db35314 AK |
1930 | struct kvm_mmu_page, link); |
1931 | kvm_mmu_zap_page(vcpu->kvm, sp); | |
4cee5764 | 1932 | ++vcpu->kvm->stat.mmu_recycled; |
ebeace86 AK |
1933 | } |
1934 | } | |
ebeace86 | 1935 | |
3067714c AK |
1936 | int kvm_mmu_page_fault(struct kvm_vcpu *vcpu, gva_t cr2, u32 error_code) |
1937 | { | |
1938 | int r; | |
1939 | enum emulation_result er; | |
1940 | ||
ad312c7c | 1941 | r = vcpu->arch.mmu.page_fault(vcpu, cr2, error_code); |
3067714c AK |
1942 | if (r < 0) |
1943 | goto out; | |
1944 | ||
1945 | if (!r) { | |
1946 | r = 1; | |
1947 | goto out; | |
1948 | } | |
1949 | ||
b733bfb5 AK |
1950 | r = mmu_topup_memory_caches(vcpu); |
1951 | if (r) | |
1952 | goto out; | |
1953 | ||
3067714c | 1954 | er = emulate_instruction(vcpu, vcpu->run, cr2, error_code, 0); |
3067714c AK |
1955 | |
1956 | switch (er) { | |
1957 | case EMULATE_DONE: | |
1958 | return 1; | |
1959 | case EMULATE_DO_MMIO: | |
1960 | ++vcpu->stat.mmio_exits; | |
1961 | return 0; | |
1962 | case EMULATE_FAIL: | |
1963 | kvm_report_emulation_failure(vcpu, "pagetable"); | |
1964 | return 1; | |
1965 | default: | |
1966 | BUG(); | |
1967 | } | |
1968 | out: | |
3067714c AK |
1969 | return r; |
1970 | } | |
1971 | EXPORT_SYMBOL_GPL(kvm_mmu_page_fault); | |
1972 | ||
18552672 JR |
1973 | void kvm_enable_tdp(void) |
1974 | { | |
1975 | tdp_enabled = true; | |
1976 | } | |
1977 | EXPORT_SYMBOL_GPL(kvm_enable_tdp); | |
1978 | ||
5f4cb662 JR |
1979 | void kvm_disable_tdp(void) |
1980 | { | |
1981 | tdp_enabled = false; | |
1982 | } | |
1983 | EXPORT_SYMBOL_GPL(kvm_disable_tdp); | |
1984 | ||
6aa8b732 AK |
1985 | static void free_mmu_pages(struct kvm_vcpu *vcpu) |
1986 | { | |
4db35314 | 1987 | struct kvm_mmu_page *sp; |
6aa8b732 | 1988 | |
f05e70ac ZX |
1989 | while (!list_empty(&vcpu->kvm->arch.active_mmu_pages)) { |
1990 | sp = container_of(vcpu->kvm->arch.active_mmu_pages.next, | |
4db35314 AK |
1991 | struct kvm_mmu_page, link); |
1992 | kvm_mmu_zap_page(vcpu->kvm, sp); | |
8d2d73b9 | 1993 | cond_resched(); |
f51234c2 | 1994 | } |
ad312c7c | 1995 | free_page((unsigned long)vcpu->arch.mmu.pae_root); |
6aa8b732 AK |
1996 | } |
1997 | ||
1998 | static int alloc_mmu_pages(struct kvm_vcpu *vcpu) | |
1999 | { | |
17ac10ad | 2000 | struct page *page; |
6aa8b732 AK |
2001 | int i; |
2002 | ||
2003 | ASSERT(vcpu); | |
2004 | ||
f05e70ac ZX |
2005 | if (vcpu->kvm->arch.n_requested_mmu_pages) |
2006 | vcpu->kvm->arch.n_free_mmu_pages = | |
2007 | vcpu->kvm->arch.n_requested_mmu_pages; | |
82ce2c96 | 2008 | else |
f05e70ac ZX |
2009 | vcpu->kvm->arch.n_free_mmu_pages = |
2010 | vcpu->kvm->arch.n_alloc_mmu_pages; | |
17ac10ad AK |
2011 | /* |
2012 | * When emulating 32-bit mode, cr3 is only 32 bits even on x86_64. | |
2013 | * Therefore we need to allocate shadow page tables in the first | |
2014 | * 4GB of memory, which happens to fit the DMA32 zone. | |
2015 | */ | |
2016 | page = alloc_page(GFP_KERNEL | __GFP_DMA32); | |
2017 | if (!page) | |
2018 | goto error_1; | |
ad312c7c | 2019 | vcpu->arch.mmu.pae_root = page_address(page); |
17ac10ad | 2020 | for (i = 0; i < 4; ++i) |
ad312c7c | 2021 | vcpu->arch.mmu.pae_root[i] = INVALID_PAGE; |
17ac10ad | 2022 | |
6aa8b732 AK |
2023 | return 0; |
2024 | ||
2025 | error_1: | |
2026 | free_mmu_pages(vcpu); | |
2027 | return -ENOMEM; | |
2028 | } | |
2029 | ||
8018c27b | 2030 | int kvm_mmu_create(struct kvm_vcpu *vcpu) |
6aa8b732 | 2031 | { |
6aa8b732 | 2032 | ASSERT(vcpu); |
ad312c7c | 2033 | ASSERT(!VALID_PAGE(vcpu->arch.mmu.root_hpa)); |
6aa8b732 | 2034 | |
8018c27b IM |
2035 | return alloc_mmu_pages(vcpu); |
2036 | } | |
6aa8b732 | 2037 | |
8018c27b IM |
2038 | int kvm_mmu_setup(struct kvm_vcpu *vcpu) |
2039 | { | |
2040 | ASSERT(vcpu); | |
ad312c7c | 2041 | ASSERT(!VALID_PAGE(vcpu->arch.mmu.root_hpa)); |
2c264957 | 2042 | |
8018c27b | 2043 | return init_kvm_mmu(vcpu); |
6aa8b732 AK |
2044 | } |
2045 | ||
2046 | void kvm_mmu_destroy(struct kvm_vcpu *vcpu) | |
2047 | { | |
2048 | ASSERT(vcpu); | |
2049 | ||
2050 | destroy_kvm_mmu(vcpu); | |
2051 | free_mmu_pages(vcpu); | |
714b93da | 2052 | mmu_free_memory_caches(vcpu); |
6aa8b732 AK |
2053 | } |
2054 | ||
90cb0529 | 2055 | void kvm_mmu_slot_remove_write_access(struct kvm *kvm, int slot) |
6aa8b732 | 2056 | { |
4db35314 | 2057 | struct kvm_mmu_page *sp; |
6aa8b732 | 2058 | |
f05e70ac | 2059 | list_for_each_entry(sp, &kvm->arch.active_mmu_pages, link) { |
6aa8b732 AK |
2060 | int i; |
2061 | u64 *pt; | |
2062 | ||
4db35314 | 2063 | if (!test_bit(slot, &sp->slot_bitmap)) |
6aa8b732 AK |
2064 | continue; |
2065 | ||
4db35314 | 2066 | pt = sp->spt; |
6aa8b732 AK |
2067 | for (i = 0; i < PT64_ENT_PER_PAGE; ++i) |
2068 | /* avoid RMW */ | |
9647c14c | 2069 | if (pt[i] & PT_WRITABLE_MASK) |
6aa8b732 | 2070 | pt[i] &= ~PT_WRITABLE_MASK; |
6aa8b732 AK |
2071 | } |
2072 | } | |
37a7d8b0 | 2073 | |
90cb0529 | 2074 | void kvm_mmu_zap_all(struct kvm *kvm) |
e0fa826f | 2075 | { |
4db35314 | 2076 | struct kvm_mmu_page *sp, *node; |
e0fa826f | 2077 | |
aaee2c94 | 2078 | spin_lock(&kvm->mmu_lock); |
f05e70ac | 2079 | list_for_each_entry_safe(sp, node, &kvm->arch.active_mmu_pages, link) |
4db35314 | 2080 | kvm_mmu_zap_page(kvm, sp); |
aaee2c94 | 2081 | spin_unlock(&kvm->mmu_lock); |
e0fa826f | 2082 | |
90cb0529 | 2083 | kvm_flush_remote_tlbs(kvm); |
e0fa826f DL |
2084 | } |
2085 | ||
8b2cf73c | 2086 | static void kvm_mmu_remove_one_alloc_mmu_page(struct kvm *kvm) |
3ee16c81 IE |
2087 | { |
2088 | struct kvm_mmu_page *page; | |
2089 | ||
2090 | page = container_of(kvm->arch.active_mmu_pages.prev, | |
2091 | struct kvm_mmu_page, link); | |
2092 | kvm_mmu_zap_page(kvm, page); | |
2093 | } | |
2094 | ||
2095 | static int mmu_shrink(int nr_to_scan, gfp_t gfp_mask) | |
2096 | { | |
2097 | struct kvm *kvm; | |
2098 | struct kvm *kvm_freed = NULL; | |
2099 | int cache_count = 0; | |
2100 | ||
2101 | spin_lock(&kvm_lock); | |
2102 | ||
2103 | list_for_each_entry(kvm, &vm_list, vm_list) { | |
2104 | int npages; | |
2105 | ||
5a4c9288 MT |
2106 | if (!down_read_trylock(&kvm->slots_lock)) |
2107 | continue; | |
3ee16c81 IE |
2108 | spin_lock(&kvm->mmu_lock); |
2109 | npages = kvm->arch.n_alloc_mmu_pages - | |
2110 | kvm->arch.n_free_mmu_pages; | |
2111 | cache_count += npages; | |
2112 | if (!kvm_freed && nr_to_scan > 0 && npages > 0) { | |
2113 | kvm_mmu_remove_one_alloc_mmu_page(kvm); | |
2114 | cache_count--; | |
2115 | kvm_freed = kvm; | |
2116 | } | |
2117 | nr_to_scan--; | |
2118 | ||
2119 | spin_unlock(&kvm->mmu_lock); | |
5a4c9288 | 2120 | up_read(&kvm->slots_lock); |
3ee16c81 IE |
2121 | } |
2122 | if (kvm_freed) | |
2123 | list_move_tail(&kvm_freed->vm_list, &vm_list); | |
2124 | ||
2125 | spin_unlock(&kvm_lock); | |
2126 | ||
2127 | return cache_count; | |
2128 | } | |
2129 | ||
2130 | static struct shrinker mmu_shrinker = { | |
2131 | .shrink = mmu_shrink, | |
2132 | .seeks = DEFAULT_SEEKS * 10, | |
2133 | }; | |
2134 | ||
2ddfd20e | 2135 | static void mmu_destroy_caches(void) |
b5a33a75 AK |
2136 | { |
2137 | if (pte_chain_cache) | |
2138 | kmem_cache_destroy(pte_chain_cache); | |
2139 | if (rmap_desc_cache) | |
2140 | kmem_cache_destroy(rmap_desc_cache); | |
d3d25b04 AK |
2141 | if (mmu_page_header_cache) |
2142 | kmem_cache_destroy(mmu_page_header_cache); | |
b5a33a75 AK |
2143 | } |
2144 | ||
3ee16c81 IE |
2145 | void kvm_mmu_module_exit(void) |
2146 | { | |
2147 | mmu_destroy_caches(); | |
2148 | unregister_shrinker(&mmu_shrinker); | |
2149 | } | |
2150 | ||
b5a33a75 AK |
2151 | int kvm_mmu_module_init(void) |
2152 | { | |
2153 | pte_chain_cache = kmem_cache_create("kvm_pte_chain", | |
2154 | sizeof(struct kvm_pte_chain), | |
20c2df83 | 2155 | 0, 0, NULL); |
b5a33a75 AK |
2156 | if (!pte_chain_cache) |
2157 | goto nomem; | |
2158 | rmap_desc_cache = kmem_cache_create("kvm_rmap_desc", | |
2159 | sizeof(struct kvm_rmap_desc), | |
20c2df83 | 2160 | 0, 0, NULL); |
b5a33a75 AK |
2161 | if (!rmap_desc_cache) |
2162 | goto nomem; | |
2163 | ||
d3d25b04 AK |
2164 | mmu_page_header_cache = kmem_cache_create("kvm_mmu_page_header", |
2165 | sizeof(struct kvm_mmu_page), | |
20c2df83 | 2166 | 0, 0, NULL); |
d3d25b04 AK |
2167 | if (!mmu_page_header_cache) |
2168 | goto nomem; | |
2169 | ||
3ee16c81 IE |
2170 | register_shrinker(&mmu_shrinker); |
2171 | ||
b5a33a75 AK |
2172 | return 0; |
2173 | ||
2174 | nomem: | |
3ee16c81 | 2175 | mmu_destroy_caches(); |
b5a33a75 AK |
2176 | return -ENOMEM; |
2177 | } | |
2178 | ||
3ad82a7e ZX |
2179 | /* |
2180 | * Caculate mmu pages needed for kvm. | |
2181 | */ | |
2182 | unsigned int kvm_mmu_calculate_mmu_pages(struct kvm *kvm) | |
2183 | { | |
2184 | int i; | |
2185 | unsigned int nr_mmu_pages; | |
2186 | unsigned int nr_pages = 0; | |
2187 | ||
2188 | for (i = 0; i < kvm->nmemslots; i++) | |
2189 | nr_pages += kvm->memslots[i].npages; | |
2190 | ||
2191 | nr_mmu_pages = nr_pages * KVM_PERMILLE_MMU_PAGES / 1000; | |
2192 | nr_mmu_pages = max(nr_mmu_pages, | |
2193 | (unsigned int) KVM_MIN_ALLOC_MMU_PAGES); | |
2194 | ||
2195 | return nr_mmu_pages; | |
2196 | } | |
2197 | ||
2f333bcb MT |
2198 | static void *pv_mmu_peek_buffer(struct kvm_pv_mmu_op_buffer *buffer, |
2199 | unsigned len) | |
2200 | { | |
2201 | if (len > buffer->len) | |
2202 | return NULL; | |
2203 | return buffer->ptr; | |
2204 | } | |
2205 | ||
2206 | static void *pv_mmu_read_buffer(struct kvm_pv_mmu_op_buffer *buffer, | |
2207 | unsigned len) | |
2208 | { | |
2209 | void *ret; | |
2210 | ||
2211 | ret = pv_mmu_peek_buffer(buffer, len); | |
2212 | if (!ret) | |
2213 | return ret; | |
2214 | buffer->ptr += len; | |
2215 | buffer->len -= len; | |
2216 | buffer->processed += len; | |
2217 | return ret; | |
2218 | } | |
2219 | ||
2220 | static int kvm_pv_mmu_write(struct kvm_vcpu *vcpu, | |
2221 | gpa_t addr, gpa_t value) | |
2222 | { | |
2223 | int bytes = 8; | |
2224 | int r; | |
2225 | ||
2226 | if (!is_long_mode(vcpu) && !is_pae(vcpu)) | |
2227 | bytes = 4; | |
2228 | ||
2229 | r = mmu_topup_memory_caches(vcpu); | |
2230 | if (r) | |
2231 | return r; | |
2232 | ||
3200f405 | 2233 | if (!emulator_write_phys(vcpu, addr, &value, bytes)) |
2f333bcb MT |
2234 | return -EFAULT; |
2235 | ||
2236 | return 1; | |
2237 | } | |
2238 | ||
2239 | static int kvm_pv_mmu_flush_tlb(struct kvm_vcpu *vcpu) | |
2240 | { | |
2241 | kvm_x86_ops->tlb_flush(vcpu); | |
2242 | return 1; | |
2243 | } | |
2244 | ||
2245 | static int kvm_pv_mmu_release_pt(struct kvm_vcpu *vcpu, gpa_t addr) | |
2246 | { | |
2247 | spin_lock(&vcpu->kvm->mmu_lock); | |
2248 | mmu_unshadow(vcpu->kvm, addr >> PAGE_SHIFT); | |
2249 | spin_unlock(&vcpu->kvm->mmu_lock); | |
2250 | return 1; | |
2251 | } | |
2252 | ||
2253 | static int kvm_pv_mmu_op_one(struct kvm_vcpu *vcpu, | |
2254 | struct kvm_pv_mmu_op_buffer *buffer) | |
2255 | { | |
2256 | struct kvm_mmu_op_header *header; | |
2257 | ||
2258 | header = pv_mmu_peek_buffer(buffer, sizeof *header); | |
2259 | if (!header) | |
2260 | return 0; | |
2261 | switch (header->op) { | |
2262 | case KVM_MMU_OP_WRITE_PTE: { | |
2263 | struct kvm_mmu_op_write_pte *wpte; | |
2264 | ||
2265 | wpte = pv_mmu_read_buffer(buffer, sizeof *wpte); | |
2266 | if (!wpte) | |
2267 | return 0; | |
2268 | return kvm_pv_mmu_write(vcpu, wpte->pte_phys, | |
2269 | wpte->pte_val); | |
2270 | } | |
2271 | case KVM_MMU_OP_FLUSH_TLB: { | |
2272 | struct kvm_mmu_op_flush_tlb *ftlb; | |
2273 | ||
2274 | ftlb = pv_mmu_read_buffer(buffer, sizeof *ftlb); | |
2275 | if (!ftlb) | |
2276 | return 0; | |
2277 | return kvm_pv_mmu_flush_tlb(vcpu); | |
2278 | } | |
2279 | case KVM_MMU_OP_RELEASE_PT: { | |
2280 | struct kvm_mmu_op_release_pt *rpt; | |
2281 | ||
2282 | rpt = pv_mmu_read_buffer(buffer, sizeof *rpt); | |
2283 | if (!rpt) | |
2284 | return 0; | |
2285 | return kvm_pv_mmu_release_pt(vcpu, rpt->pt_phys); | |
2286 | } | |
2287 | default: return 0; | |
2288 | } | |
2289 | } | |
2290 | ||
2291 | int kvm_pv_mmu_op(struct kvm_vcpu *vcpu, unsigned long bytes, | |
2292 | gpa_t addr, unsigned long *ret) | |
2293 | { | |
2294 | int r; | |
2295 | struct kvm_pv_mmu_op_buffer buffer; | |
2296 | ||
2f333bcb MT |
2297 | buffer.ptr = buffer.buf; |
2298 | buffer.len = min_t(unsigned long, bytes, sizeof buffer.buf); | |
2299 | buffer.processed = 0; | |
2300 | ||
2301 | r = kvm_read_guest(vcpu->kvm, addr, buffer.buf, buffer.len); | |
2302 | if (r) | |
2303 | goto out; | |
2304 | ||
2305 | while (buffer.len) { | |
2306 | r = kvm_pv_mmu_op_one(vcpu, &buffer); | |
2307 | if (r < 0) | |
2308 | goto out; | |
2309 | if (r == 0) | |
2310 | break; | |
2311 | } | |
2312 | ||
2313 | r = 1; | |
2314 | out: | |
2315 | *ret = buffer.processed; | |
2f333bcb MT |
2316 | return r; |
2317 | } | |
2318 | ||
37a7d8b0 AK |
2319 | #ifdef AUDIT |
2320 | ||
2321 | static const char *audit_msg; | |
2322 | ||
2323 | static gva_t canonicalize(gva_t gva) | |
2324 | { | |
2325 | #ifdef CONFIG_X86_64 | |
2326 | gva = (long long)(gva << 16) >> 16; | |
2327 | #endif | |
2328 | return gva; | |
2329 | } | |
2330 | ||
2331 | static void audit_mappings_page(struct kvm_vcpu *vcpu, u64 page_pte, | |
2332 | gva_t va, int level) | |
2333 | { | |
2334 | u64 *pt = __va(page_pte & PT64_BASE_ADDR_MASK); | |
2335 | int i; | |
2336 | gva_t va_delta = 1ul << (PAGE_SHIFT + 9 * (level - 1)); | |
2337 | ||
2338 | for (i = 0; i < PT64_ENT_PER_PAGE; ++i, va += va_delta) { | |
2339 | u64 ent = pt[i]; | |
2340 | ||
c7addb90 | 2341 | if (ent == shadow_trap_nonpresent_pte) |
37a7d8b0 AK |
2342 | continue; |
2343 | ||
2344 | va = canonicalize(va); | |
c7addb90 AK |
2345 | if (level > 1) { |
2346 | if (ent == shadow_notrap_nonpresent_pte) | |
2347 | printk(KERN_ERR "audit: (%s) nontrapping pte" | |
2348 | " in nonleaf level: levels %d gva %lx" | |
2349 | " level %d pte %llx\n", audit_msg, | |
ad312c7c | 2350 | vcpu->arch.mmu.root_level, va, level, ent); |
c7addb90 | 2351 | |
37a7d8b0 | 2352 | audit_mappings_page(vcpu, ent, va, level - 1); |
c7addb90 | 2353 | } else { |
ad312c7c | 2354 | gpa_t gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, va); |
35149e21 | 2355 | hpa_t hpa = (hpa_t)gpa_to_pfn(vcpu, gpa) << PAGE_SHIFT; |
37a7d8b0 | 2356 | |
c7addb90 | 2357 | if (is_shadow_present_pte(ent) |
37a7d8b0 | 2358 | && (ent & PT64_BASE_ADDR_MASK) != hpa) |
c7addb90 AK |
2359 | printk(KERN_ERR "xx audit error: (%s) levels %d" |
2360 | " gva %lx gpa %llx hpa %llx ent %llx %d\n", | |
ad312c7c | 2361 | audit_msg, vcpu->arch.mmu.root_level, |
d77c26fc MD |
2362 | va, gpa, hpa, ent, |
2363 | is_shadow_present_pte(ent)); | |
c7addb90 AK |
2364 | else if (ent == shadow_notrap_nonpresent_pte |
2365 | && !is_error_hpa(hpa)) | |
2366 | printk(KERN_ERR "audit: (%s) notrap shadow," | |
2367 | " valid guest gva %lx\n", audit_msg, va); | |
35149e21 | 2368 | kvm_release_pfn_clean(pfn); |
c7addb90 | 2369 | |
37a7d8b0 AK |
2370 | } |
2371 | } | |
2372 | } | |
2373 | ||
2374 | static void audit_mappings(struct kvm_vcpu *vcpu) | |
2375 | { | |
1ea252af | 2376 | unsigned i; |
37a7d8b0 | 2377 | |
ad312c7c ZX |
2378 | if (vcpu->arch.mmu.root_level == 4) |
2379 | audit_mappings_page(vcpu, vcpu->arch.mmu.root_hpa, 0, 4); | |
37a7d8b0 AK |
2380 | else |
2381 | for (i = 0; i < 4; ++i) | |
ad312c7c | 2382 | if (vcpu->arch.mmu.pae_root[i] & PT_PRESENT_MASK) |
37a7d8b0 | 2383 | audit_mappings_page(vcpu, |
ad312c7c | 2384 | vcpu->arch.mmu.pae_root[i], |
37a7d8b0 AK |
2385 | i << 30, |
2386 | 2); | |
2387 | } | |
2388 | ||
2389 | static int count_rmaps(struct kvm_vcpu *vcpu) | |
2390 | { | |
2391 | int nmaps = 0; | |
2392 | int i, j, k; | |
2393 | ||
2394 | for (i = 0; i < KVM_MEMORY_SLOTS; ++i) { | |
2395 | struct kvm_memory_slot *m = &vcpu->kvm->memslots[i]; | |
2396 | struct kvm_rmap_desc *d; | |
2397 | ||
2398 | for (j = 0; j < m->npages; ++j) { | |
290fc38d | 2399 | unsigned long *rmapp = &m->rmap[j]; |
37a7d8b0 | 2400 | |
290fc38d | 2401 | if (!*rmapp) |
37a7d8b0 | 2402 | continue; |
290fc38d | 2403 | if (!(*rmapp & 1)) { |
37a7d8b0 AK |
2404 | ++nmaps; |
2405 | continue; | |
2406 | } | |
290fc38d | 2407 | d = (struct kvm_rmap_desc *)(*rmapp & ~1ul); |
37a7d8b0 AK |
2408 | while (d) { |
2409 | for (k = 0; k < RMAP_EXT; ++k) | |
2410 | if (d->shadow_ptes[k]) | |
2411 | ++nmaps; | |
2412 | else | |
2413 | break; | |
2414 | d = d->more; | |
2415 | } | |
2416 | } | |
2417 | } | |
2418 | return nmaps; | |
2419 | } | |
2420 | ||
2421 | static int count_writable_mappings(struct kvm_vcpu *vcpu) | |
2422 | { | |
2423 | int nmaps = 0; | |
4db35314 | 2424 | struct kvm_mmu_page *sp; |
37a7d8b0 AK |
2425 | int i; |
2426 | ||
f05e70ac | 2427 | list_for_each_entry(sp, &vcpu->kvm->arch.active_mmu_pages, link) { |
4db35314 | 2428 | u64 *pt = sp->spt; |
37a7d8b0 | 2429 | |
4db35314 | 2430 | if (sp->role.level != PT_PAGE_TABLE_LEVEL) |
37a7d8b0 AK |
2431 | continue; |
2432 | ||
2433 | for (i = 0; i < PT64_ENT_PER_PAGE; ++i) { | |
2434 | u64 ent = pt[i]; | |
2435 | ||
2436 | if (!(ent & PT_PRESENT_MASK)) | |
2437 | continue; | |
2438 | if (!(ent & PT_WRITABLE_MASK)) | |
2439 | continue; | |
2440 | ++nmaps; | |
2441 | } | |
2442 | } | |
2443 | return nmaps; | |
2444 | } | |
2445 | ||
2446 | static void audit_rmap(struct kvm_vcpu *vcpu) | |
2447 | { | |
2448 | int n_rmap = count_rmaps(vcpu); | |
2449 | int n_actual = count_writable_mappings(vcpu); | |
2450 | ||
2451 | if (n_rmap != n_actual) | |
2452 | printk(KERN_ERR "%s: (%s) rmap %d actual %d\n", | |
b8688d51 | 2453 | __func__, audit_msg, n_rmap, n_actual); |
37a7d8b0 AK |
2454 | } |
2455 | ||
2456 | static void audit_write_protection(struct kvm_vcpu *vcpu) | |
2457 | { | |
4db35314 | 2458 | struct kvm_mmu_page *sp; |
290fc38d IE |
2459 | struct kvm_memory_slot *slot; |
2460 | unsigned long *rmapp; | |
2461 | gfn_t gfn; | |
37a7d8b0 | 2462 | |
f05e70ac | 2463 | list_for_each_entry(sp, &vcpu->kvm->arch.active_mmu_pages, link) { |
4db35314 | 2464 | if (sp->role.metaphysical) |
37a7d8b0 AK |
2465 | continue; |
2466 | ||
4db35314 AK |
2467 | slot = gfn_to_memslot(vcpu->kvm, sp->gfn); |
2468 | gfn = unalias_gfn(vcpu->kvm, sp->gfn); | |
290fc38d IE |
2469 | rmapp = &slot->rmap[gfn - slot->base_gfn]; |
2470 | if (*rmapp) | |
37a7d8b0 AK |
2471 | printk(KERN_ERR "%s: (%s) shadow page has writable" |
2472 | " mappings: gfn %lx role %x\n", | |
b8688d51 | 2473 | __func__, audit_msg, sp->gfn, |
4db35314 | 2474 | sp->role.word); |
37a7d8b0 AK |
2475 | } |
2476 | } | |
2477 | ||
2478 | static void kvm_mmu_audit(struct kvm_vcpu *vcpu, const char *msg) | |
2479 | { | |
2480 | int olddbg = dbg; | |
2481 | ||
2482 | dbg = 0; | |
2483 | audit_msg = msg; | |
2484 | audit_rmap(vcpu); | |
2485 | audit_write_protection(vcpu); | |
2486 | audit_mappings(vcpu); | |
2487 | dbg = olddbg; | |
2488 | } | |
2489 | ||
2490 | #endif |