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7837699f SY |
1 | /* |
2 | * 8253/8254 interval timer emulation | |
3 | * | |
4 | * Copyright (c) 2003-2004 Fabrice Bellard | |
5 | * Copyright (c) 2006 Intel Corporation | |
6 | * Copyright (c) 2007 Keir Fraser, XenSource Inc | |
7 | * Copyright (c) 2008 Intel Corporation | |
8 | * | |
9 | * Permission is hereby granted, free of charge, to any person obtaining a copy | |
10 | * of this software and associated documentation files (the "Software"), to deal | |
11 | * in the Software without restriction, including without limitation the rights | |
12 | * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell | |
13 | * copies of the Software, and to permit persons to whom the Software is | |
14 | * furnished to do so, subject to the following conditions: | |
15 | * | |
16 | * The above copyright notice and this permission notice shall be included in | |
17 | * all copies or substantial portions of the Software. | |
18 | * | |
19 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR | |
20 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, | |
21 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL | |
22 | * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER | |
23 | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, | |
24 | * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN | |
25 | * THE SOFTWARE. | |
26 | * | |
27 | * Authors: | |
28 | * Sheng Yang <sheng.yang@intel.com> | |
29 | * Based on QEMU and Xen. | |
30 | */ | |
31 | ||
32 | #include <linux/kvm_host.h> | |
33 | ||
34 | #include "irq.h" | |
35 | #include "i8254.h" | |
36 | ||
37 | #ifndef CONFIG_X86_64 | |
38 | #define mod_64(x, y) ((x) - (y) * div64_64(x, y)) | |
39 | #else | |
40 | #define mod_64(x, y) ((x) % (y)) | |
41 | #endif | |
42 | ||
43 | #define RW_STATE_LSB 1 | |
44 | #define RW_STATE_MSB 2 | |
45 | #define RW_STATE_WORD0 3 | |
46 | #define RW_STATE_WORD1 4 | |
47 | ||
48 | /* Compute with 96 bit intermediate result: (a*b)/c */ | |
49 | static u64 muldiv64(u64 a, u32 b, u32 c) | |
50 | { | |
51 | union { | |
52 | u64 ll; | |
53 | struct { | |
54 | u32 low, high; | |
55 | } l; | |
56 | } u, res; | |
57 | u64 rl, rh; | |
58 | ||
59 | u.ll = a; | |
60 | rl = (u64)u.l.low * (u64)b; | |
61 | rh = (u64)u.l.high * (u64)b; | |
62 | rh += (rl >> 32); | |
63 | res.l.high = div64_64(rh, c); | |
64 | res.l.low = div64_64(((mod_64(rh, c) << 32) + (rl & 0xffffffff)), c); | |
65 | return res.ll; | |
66 | } | |
67 | ||
68 | static void pit_set_gate(struct kvm *kvm, int channel, u32 val) | |
69 | { | |
70 | struct kvm_kpit_channel_state *c = | |
71 | &kvm->arch.vpit->pit_state.channels[channel]; | |
72 | ||
73 | WARN_ON(!mutex_is_locked(&kvm->arch.vpit->pit_state.lock)); | |
74 | ||
75 | switch (c->mode) { | |
76 | default: | |
77 | case 0: | |
78 | case 4: | |
79 | /* XXX: just disable/enable counting */ | |
80 | break; | |
81 | case 1: | |
82 | case 2: | |
83 | case 3: | |
84 | case 5: | |
85 | /* Restart counting on rising edge. */ | |
86 | if (c->gate < val) | |
87 | c->count_load_time = ktime_get(); | |
88 | break; | |
89 | } | |
90 | ||
91 | c->gate = val; | |
92 | } | |
93 | ||
94 | int pit_get_gate(struct kvm *kvm, int channel) | |
95 | { | |
96 | WARN_ON(!mutex_is_locked(&kvm->arch.vpit->pit_state.lock)); | |
97 | ||
98 | return kvm->arch.vpit->pit_state.channels[channel].gate; | |
99 | } | |
100 | ||
101 | static int pit_get_count(struct kvm *kvm, int channel) | |
102 | { | |
103 | struct kvm_kpit_channel_state *c = | |
104 | &kvm->arch.vpit->pit_state.channels[channel]; | |
105 | s64 d, t; | |
106 | int counter; | |
107 | ||
108 | WARN_ON(!mutex_is_locked(&kvm->arch.vpit->pit_state.lock)); | |
109 | ||
110 | t = ktime_to_ns(ktime_sub(ktime_get(), c->count_load_time)); | |
111 | d = muldiv64(t, KVM_PIT_FREQ, NSEC_PER_SEC); | |
112 | ||
113 | switch (c->mode) { | |
114 | case 0: | |
115 | case 1: | |
116 | case 4: | |
117 | case 5: | |
118 | counter = (c->count - d) & 0xffff; | |
119 | break; | |
120 | case 3: | |
121 | /* XXX: may be incorrect for odd counts */ | |
122 | counter = c->count - (mod_64((2 * d), c->count)); | |
123 | break; | |
124 | default: | |
125 | counter = c->count - mod_64(d, c->count); | |
126 | break; | |
127 | } | |
128 | return counter; | |
129 | } | |
130 | ||
131 | static int pit_get_out(struct kvm *kvm, int channel) | |
132 | { | |
133 | struct kvm_kpit_channel_state *c = | |
134 | &kvm->arch.vpit->pit_state.channels[channel]; | |
135 | s64 d, t; | |
136 | int out; | |
137 | ||
138 | WARN_ON(!mutex_is_locked(&kvm->arch.vpit->pit_state.lock)); | |
139 | ||
140 | t = ktime_to_ns(ktime_sub(ktime_get(), c->count_load_time)); | |
141 | d = muldiv64(t, KVM_PIT_FREQ, NSEC_PER_SEC); | |
142 | ||
143 | switch (c->mode) { | |
144 | default: | |
145 | case 0: | |
146 | out = (d >= c->count); | |
147 | break; | |
148 | case 1: | |
149 | out = (d < c->count); | |
150 | break; | |
151 | case 2: | |
152 | out = ((mod_64(d, c->count) == 0) && (d != 0)); | |
153 | break; | |
154 | case 3: | |
155 | out = (mod_64(d, c->count) < ((c->count + 1) >> 1)); | |
156 | break; | |
157 | case 4: | |
158 | case 5: | |
159 | out = (d == c->count); | |
160 | break; | |
161 | } | |
162 | ||
163 | return out; | |
164 | } | |
165 | ||
166 | static void pit_latch_count(struct kvm *kvm, int channel) | |
167 | { | |
168 | struct kvm_kpit_channel_state *c = | |
169 | &kvm->arch.vpit->pit_state.channels[channel]; | |
170 | ||
171 | WARN_ON(!mutex_is_locked(&kvm->arch.vpit->pit_state.lock)); | |
172 | ||
173 | if (!c->count_latched) { | |
174 | c->latched_count = pit_get_count(kvm, channel); | |
175 | c->count_latched = c->rw_mode; | |
176 | } | |
177 | } | |
178 | ||
179 | static void pit_latch_status(struct kvm *kvm, int channel) | |
180 | { | |
181 | struct kvm_kpit_channel_state *c = | |
182 | &kvm->arch.vpit->pit_state.channels[channel]; | |
183 | ||
184 | WARN_ON(!mutex_is_locked(&kvm->arch.vpit->pit_state.lock)); | |
185 | ||
186 | if (!c->status_latched) { | |
187 | /* TODO: Return NULL COUNT (bit 6). */ | |
188 | c->status = ((pit_get_out(kvm, channel) << 7) | | |
189 | (c->rw_mode << 4) | | |
190 | (c->mode << 1) | | |
191 | c->bcd); | |
192 | c->status_latched = 1; | |
193 | } | |
194 | } | |
195 | ||
196 | int __pit_timer_fn(struct kvm_kpit_state *ps) | |
197 | { | |
198 | struct kvm_vcpu *vcpu0 = ps->pit->kvm->vcpus[0]; | |
199 | struct kvm_kpit_timer *pt = &ps->pit_timer; | |
200 | ||
201 | atomic_inc(&pt->pending); | |
202 | smp_mb__after_atomic_inc(); | |
203 | /* FIXME: handle case where the guest is in guest mode */ | |
204 | if (vcpu0 && waitqueue_active(&vcpu0->wq)) { | |
205 | vcpu0->arch.mp_state = VCPU_MP_STATE_RUNNABLE; | |
206 | wake_up_interruptible(&vcpu0->wq); | |
207 | } | |
208 | ||
209 | pt->timer.expires = ktime_add_ns(pt->timer.expires, pt->period); | |
210 | pt->scheduled = ktime_to_ns(pt->timer.expires); | |
211 | ||
212 | return (pt->period == 0 ? 0 : 1); | |
213 | } | |
214 | ||
215 | static enum hrtimer_restart pit_timer_fn(struct hrtimer *data) | |
216 | { | |
217 | struct kvm_kpit_state *ps; | |
218 | int restart_timer = 0; | |
219 | ||
220 | ps = container_of(data, struct kvm_kpit_state, pit_timer.timer); | |
221 | ||
222 | restart_timer = __pit_timer_fn(ps); | |
223 | ||
224 | if (restart_timer) | |
225 | return HRTIMER_RESTART; | |
226 | else | |
227 | return HRTIMER_NORESTART; | |
228 | } | |
229 | ||
230 | static void destroy_pit_timer(struct kvm_kpit_timer *pt) | |
231 | { | |
232 | pr_debug("pit: execute del timer!\n"); | |
233 | hrtimer_cancel(&pt->timer); | |
234 | } | |
235 | ||
236 | static void create_pit_timer(struct kvm_kpit_timer *pt, u32 val, int is_period) | |
237 | { | |
238 | s64 interval; | |
239 | ||
240 | interval = muldiv64(val, NSEC_PER_SEC, KVM_PIT_FREQ); | |
241 | ||
242 | pr_debug("pit: create pit timer, interval is %llu nsec\n", interval); | |
243 | ||
244 | /* TODO The new value only affected after the retriggered */ | |
245 | hrtimer_cancel(&pt->timer); | |
246 | pt->period = (is_period == 0) ? 0 : interval; | |
247 | pt->timer.function = pit_timer_fn; | |
248 | atomic_set(&pt->pending, 0); | |
249 | ||
250 | hrtimer_start(&pt->timer, ktime_add_ns(ktime_get(), interval), | |
251 | HRTIMER_MODE_ABS); | |
252 | } | |
253 | ||
254 | static void pit_load_count(struct kvm *kvm, int channel, u32 val) | |
255 | { | |
256 | struct kvm_kpit_state *ps = &kvm->arch.vpit->pit_state; | |
257 | ||
258 | WARN_ON(!mutex_is_locked(&ps->lock)); | |
259 | ||
260 | pr_debug("pit: load_count val is %d, channel is %d\n", val, channel); | |
261 | ||
262 | /* | |
263 | * Though spec said the state of 8254 is undefined after power-up, | |
264 | * seems some tricky OS like Windows XP depends on IRQ0 interrupt | |
265 | * when booting up. | |
266 | * So here setting initialize rate for it, and not a specific number | |
267 | */ | |
268 | if (val == 0) | |
269 | val = 0x10000; | |
270 | ||
271 | ps->channels[channel].count_load_time = ktime_get(); | |
272 | ps->channels[channel].count = val; | |
273 | ||
274 | if (channel != 0) | |
275 | return; | |
276 | ||
277 | /* Two types of timer | |
278 | * mode 1 is one shot, mode 2 is period, otherwise del timer */ | |
279 | switch (ps->channels[0].mode) { | |
280 | case 1: | |
281 | create_pit_timer(&ps->pit_timer, val, 0); | |
282 | break; | |
283 | case 2: | |
284 | create_pit_timer(&ps->pit_timer, val, 1); | |
285 | break; | |
286 | default: | |
287 | destroy_pit_timer(&ps->pit_timer); | |
288 | } | |
289 | } | |
290 | ||
e0f63cb9 SY |
291 | void kvm_pit_load_count(struct kvm *kvm, int channel, u32 val) |
292 | { | |
293 | mutex_lock(&kvm->arch.vpit->pit_state.lock); | |
294 | pit_load_count(kvm, channel, val); | |
295 | mutex_unlock(&kvm->arch.vpit->pit_state.lock); | |
296 | } | |
297 | ||
7837699f SY |
298 | static void pit_ioport_write(struct kvm_io_device *this, |
299 | gpa_t addr, int len, const void *data) | |
300 | { | |
301 | struct kvm_pit *pit = (struct kvm_pit *)this->private; | |
302 | struct kvm_kpit_state *pit_state = &pit->pit_state; | |
303 | struct kvm *kvm = pit->kvm; | |
304 | int channel, access; | |
305 | struct kvm_kpit_channel_state *s; | |
306 | u32 val = *(u32 *) data; | |
307 | ||
308 | val &= 0xff; | |
309 | addr &= KVM_PIT_CHANNEL_MASK; | |
310 | ||
311 | mutex_lock(&pit_state->lock); | |
312 | ||
313 | if (val != 0) | |
314 | pr_debug("pit: write addr is 0x%x, len is %d, val is 0x%x\n", | |
315 | (unsigned int)addr, len, val); | |
316 | ||
317 | if (addr == 3) { | |
318 | channel = val >> 6; | |
319 | if (channel == 3) { | |
320 | /* Read-Back Command. */ | |
321 | for (channel = 0; channel < 3; channel++) { | |
322 | s = &pit_state->channels[channel]; | |
323 | if (val & (2 << channel)) { | |
324 | if (!(val & 0x20)) | |
325 | pit_latch_count(kvm, channel); | |
326 | if (!(val & 0x10)) | |
327 | pit_latch_status(kvm, channel); | |
328 | } | |
329 | } | |
330 | } else { | |
331 | /* Select Counter <channel>. */ | |
332 | s = &pit_state->channels[channel]; | |
333 | access = (val >> 4) & KVM_PIT_CHANNEL_MASK; | |
334 | if (access == 0) { | |
335 | pit_latch_count(kvm, channel); | |
336 | } else { | |
337 | s->rw_mode = access; | |
338 | s->read_state = access; | |
339 | s->write_state = access; | |
340 | s->mode = (val >> 1) & 7; | |
341 | if (s->mode > 5) | |
342 | s->mode -= 4; | |
343 | s->bcd = val & 1; | |
344 | } | |
345 | } | |
346 | } else { | |
347 | /* Write Count. */ | |
348 | s = &pit_state->channels[addr]; | |
349 | switch (s->write_state) { | |
350 | default: | |
351 | case RW_STATE_LSB: | |
352 | pit_load_count(kvm, addr, val); | |
353 | break; | |
354 | case RW_STATE_MSB: | |
355 | pit_load_count(kvm, addr, val << 8); | |
356 | break; | |
357 | case RW_STATE_WORD0: | |
358 | s->write_latch = val; | |
359 | s->write_state = RW_STATE_WORD1; | |
360 | break; | |
361 | case RW_STATE_WORD1: | |
362 | pit_load_count(kvm, addr, s->write_latch | (val << 8)); | |
363 | s->write_state = RW_STATE_WORD0; | |
364 | break; | |
365 | } | |
366 | } | |
367 | ||
368 | mutex_unlock(&pit_state->lock); | |
369 | } | |
370 | ||
371 | static void pit_ioport_read(struct kvm_io_device *this, | |
372 | gpa_t addr, int len, void *data) | |
373 | { | |
374 | struct kvm_pit *pit = (struct kvm_pit *)this->private; | |
375 | struct kvm_kpit_state *pit_state = &pit->pit_state; | |
376 | struct kvm *kvm = pit->kvm; | |
377 | int ret, count; | |
378 | struct kvm_kpit_channel_state *s; | |
379 | ||
380 | addr &= KVM_PIT_CHANNEL_MASK; | |
381 | s = &pit_state->channels[addr]; | |
382 | ||
383 | mutex_lock(&pit_state->lock); | |
384 | ||
385 | if (s->status_latched) { | |
386 | s->status_latched = 0; | |
387 | ret = s->status; | |
388 | } else if (s->count_latched) { | |
389 | switch (s->count_latched) { | |
390 | default: | |
391 | case RW_STATE_LSB: | |
392 | ret = s->latched_count & 0xff; | |
393 | s->count_latched = 0; | |
394 | break; | |
395 | case RW_STATE_MSB: | |
396 | ret = s->latched_count >> 8; | |
397 | s->count_latched = 0; | |
398 | break; | |
399 | case RW_STATE_WORD0: | |
400 | ret = s->latched_count & 0xff; | |
401 | s->count_latched = RW_STATE_MSB; | |
402 | break; | |
403 | } | |
404 | } else { | |
405 | switch (s->read_state) { | |
406 | default: | |
407 | case RW_STATE_LSB: | |
408 | count = pit_get_count(kvm, addr); | |
409 | ret = count & 0xff; | |
410 | break; | |
411 | case RW_STATE_MSB: | |
412 | count = pit_get_count(kvm, addr); | |
413 | ret = (count >> 8) & 0xff; | |
414 | break; | |
415 | case RW_STATE_WORD0: | |
416 | count = pit_get_count(kvm, addr); | |
417 | ret = count & 0xff; | |
418 | s->read_state = RW_STATE_WORD1; | |
419 | break; | |
420 | case RW_STATE_WORD1: | |
421 | count = pit_get_count(kvm, addr); | |
422 | ret = (count >> 8) & 0xff; | |
423 | s->read_state = RW_STATE_WORD0; | |
424 | break; | |
425 | } | |
426 | } | |
427 | ||
428 | if (len > sizeof(ret)) | |
429 | len = sizeof(ret); | |
430 | memcpy(data, (char *)&ret, len); | |
431 | ||
432 | mutex_unlock(&pit_state->lock); | |
433 | } | |
434 | ||
435 | static int pit_in_range(struct kvm_io_device *this, gpa_t addr) | |
436 | { | |
437 | return ((addr >= KVM_PIT_BASE_ADDRESS) && | |
438 | (addr < KVM_PIT_BASE_ADDRESS + KVM_PIT_MEM_LENGTH)); | |
439 | } | |
440 | ||
441 | static void speaker_ioport_write(struct kvm_io_device *this, | |
442 | gpa_t addr, int len, const void *data) | |
443 | { | |
444 | struct kvm_pit *pit = (struct kvm_pit *)this->private; | |
445 | struct kvm_kpit_state *pit_state = &pit->pit_state; | |
446 | struct kvm *kvm = pit->kvm; | |
447 | u32 val = *(u32 *) data; | |
448 | ||
449 | mutex_lock(&pit_state->lock); | |
450 | pit_state->speaker_data_on = (val >> 1) & 1; | |
451 | pit_set_gate(kvm, 2, val & 1); | |
452 | mutex_unlock(&pit_state->lock); | |
453 | } | |
454 | ||
455 | static void speaker_ioport_read(struct kvm_io_device *this, | |
456 | gpa_t addr, int len, void *data) | |
457 | { | |
458 | struct kvm_pit *pit = (struct kvm_pit *)this->private; | |
459 | struct kvm_kpit_state *pit_state = &pit->pit_state; | |
460 | struct kvm *kvm = pit->kvm; | |
461 | unsigned int refresh_clock; | |
462 | int ret; | |
463 | ||
464 | /* Refresh clock toggles at about 15us. We approximate as 2^14ns. */ | |
465 | refresh_clock = ((unsigned int)ktime_to_ns(ktime_get()) >> 14) & 1; | |
466 | ||
467 | mutex_lock(&pit_state->lock); | |
468 | ret = ((pit_state->speaker_data_on << 1) | pit_get_gate(kvm, 2) | | |
469 | (pit_get_out(kvm, 2) << 5) | (refresh_clock << 4)); | |
470 | if (len > sizeof(ret)) | |
471 | len = sizeof(ret); | |
472 | memcpy(data, (char *)&ret, len); | |
473 | mutex_unlock(&pit_state->lock); | |
474 | } | |
475 | ||
476 | static int speaker_in_range(struct kvm_io_device *this, gpa_t addr) | |
477 | { | |
478 | return (addr == KVM_SPEAKER_BASE_ADDRESS); | |
479 | } | |
480 | ||
481 | struct kvm_pit *kvm_create_pit(struct kvm *kvm) | |
482 | { | |
483 | int i; | |
484 | struct kvm_pit *pit; | |
485 | struct kvm_kpit_state *pit_state; | |
486 | struct kvm_kpit_channel_state *c; | |
487 | ||
488 | pit = kzalloc(sizeof(struct kvm_pit), GFP_KERNEL); | |
489 | if (!pit) | |
490 | return NULL; | |
491 | ||
492 | mutex_init(&pit->pit_state.lock); | |
493 | mutex_lock(&pit->pit_state.lock); | |
494 | ||
495 | /* Initialize PIO device */ | |
496 | pit->dev.read = pit_ioport_read; | |
497 | pit->dev.write = pit_ioport_write; | |
498 | pit->dev.in_range = pit_in_range; | |
499 | pit->dev.private = pit; | |
500 | kvm_io_bus_register_dev(&kvm->pio_bus, &pit->dev); | |
501 | ||
502 | pit->speaker_dev.read = speaker_ioport_read; | |
503 | pit->speaker_dev.write = speaker_ioport_write; | |
504 | pit->speaker_dev.in_range = speaker_in_range; | |
505 | pit->speaker_dev.private = pit; | |
506 | kvm_io_bus_register_dev(&kvm->pio_bus, &pit->speaker_dev); | |
507 | ||
508 | kvm->arch.vpit = pit; | |
509 | pit->kvm = kvm; | |
510 | ||
511 | pit_state = &pit->pit_state; | |
512 | pit_state->pit = pit; | |
513 | hrtimer_init(&pit_state->pit_timer.timer, | |
514 | CLOCK_MONOTONIC, HRTIMER_MODE_ABS); | |
515 | atomic_set(&pit_state->pit_timer.pending, 0); | |
516 | for (i = 0; i < 3; i++) { | |
517 | c = &pit_state->channels[i]; | |
518 | c->mode = 0xff; | |
519 | c->gate = (i != 2); | |
520 | pit_load_count(kvm, i, 0); | |
521 | } | |
522 | ||
523 | mutex_unlock(&pit->pit_state.lock); | |
524 | ||
525 | pit->pit_state.inject_pending = 1; | |
526 | ||
527 | return pit; | |
528 | } | |
529 | ||
530 | void kvm_free_pit(struct kvm *kvm) | |
531 | { | |
532 | struct hrtimer *timer; | |
533 | ||
534 | if (kvm->arch.vpit) { | |
535 | mutex_lock(&kvm->arch.vpit->pit_state.lock); | |
536 | timer = &kvm->arch.vpit->pit_state.pit_timer.timer; | |
537 | hrtimer_cancel(timer); | |
538 | mutex_unlock(&kvm->arch.vpit->pit_state.lock); | |
539 | kfree(kvm->arch.vpit); | |
540 | } | |
541 | } | |
542 | ||
543 | void __inject_pit_timer_intr(struct kvm *kvm) | |
544 | { | |
545 | mutex_lock(&kvm->lock); | |
546 | kvm_ioapic_set_irq(kvm->arch.vioapic, 0, 1); | |
547 | kvm_ioapic_set_irq(kvm->arch.vioapic, 0, 0); | |
548 | kvm_pic_set_irq(pic_irqchip(kvm), 0, 1); | |
549 | kvm_pic_set_irq(pic_irqchip(kvm), 0, 0); | |
550 | mutex_unlock(&kvm->lock); | |
551 | } | |
552 | ||
553 | void kvm_inject_pit_timer_irqs(struct kvm_vcpu *vcpu) | |
554 | { | |
555 | struct kvm_pit *pit = vcpu->kvm->arch.vpit; | |
556 | struct kvm *kvm = vcpu->kvm; | |
557 | struct kvm_kpit_state *ps; | |
558 | ||
559 | if (vcpu && pit) { | |
560 | ps = &pit->pit_state; | |
561 | ||
562 | /* Try to inject pending interrupts when: | |
563 | * 1. Pending exists | |
564 | * 2. Last interrupt was accepted or waited for too long time*/ | |
565 | if (atomic_read(&ps->pit_timer.pending) && | |
566 | (ps->inject_pending || | |
567 | (jiffies - ps->last_injected_time | |
568 | >= KVM_MAX_PIT_INTR_INTERVAL))) { | |
569 | ps->inject_pending = 0; | |
570 | __inject_pit_timer_intr(kvm); | |
571 | ps->last_injected_time = jiffies; | |
572 | } | |
573 | } | |
574 | } | |
575 | ||
576 | void kvm_pit_timer_intr_post(struct kvm_vcpu *vcpu, int vec) | |
577 | { | |
578 | struct kvm_arch *arch = &vcpu->kvm->arch; | |
579 | struct kvm_kpit_state *ps; | |
580 | ||
581 | if (vcpu && arch->vpit) { | |
582 | ps = &arch->vpit->pit_state; | |
583 | if (atomic_read(&ps->pit_timer.pending) && | |
584 | (((arch->vpic->pics[0].imr & 1) == 0 && | |
585 | arch->vpic->pics[0].irq_base == vec) || | |
586 | (arch->vioapic->redirtbl[0].fields.vector == vec && | |
587 | arch->vioapic->redirtbl[0].fields.mask != 1))) { | |
588 | ps->inject_pending = 1; | |
589 | atomic_dec(&ps->pit_timer.pending); | |
590 | ps->channels[0].count_load_time = ktime_get(); | |
591 | } | |
592 | } | |
593 | } |