x86: move all the pgd_list handling to one place
[GitHub/mt8127/android_kernel_alcatel_ttab.git] / arch / x86 / kernel / vmi_32.c
CommitLineData
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1/*
2 * VMI specific paravirt-ops implementation
3 *
4 * Copyright (C) 2005, VMware, Inc.
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful, but
12 * WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
14 * NON INFRINGEMENT. See the GNU General Public License for more
15 * details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
20 *
21 * Send feedback to zach@vmware.com
22 *
23 */
24
25#include <linux/module.h>
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26#include <linux/cpu.h>
27#include <linux/bootmem.h>
28#include <linux/mm.h>
eeef9c68 29#include <linux/highmem.h>
fa0aa866 30#include <linux/sched.h>
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31#include <asm/vmi.h>
32#include <asm/io.h>
33#include <asm/fixmap.h>
34#include <asm/apicdef.h>
35#include <asm/apic.h>
36#include <asm/processor.h>
37#include <asm/timer.h>
bbab4f3b 38#include <asm/vmi_time.h>
8f485612 39#include <asm/kmap_types.h>
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40
41/* Convenient for calling VMI functions indirectly in the ROM */
42typedef u32 __attribute__((regparm(1))) (VROMFUNC)(void);
43typedef u64 __attribute__((regparm(2))) (VROMLONGFUNC)(int);
44
45#define call_vrom_func(rom,func) \
46 (((VROMFUNC *)(rom->func))())
47
48#define call_vrom_long_func(rom,func,arg) \
49 (((VROMLONGFUNC *)(rom->func)) (arg))
50
51static struct vrom_header *vmi_rom;
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52static int disable_pge;
53static int disable_pse;
54static int disable_sep;
55static int disable_tsc;
56static int disable_mtrr;
7507ba34 57static int disable_noidle;
772205f6 58static int disable_vmi_timer;
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59
60/* Cached VMI operations */
30a1528d 61static struct {
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62 void (*cpuid)(void /* non-c */);
63 void (*_set_ldt)(u32 selector);
64 void (*set_tr)(u32 selector);
8d947344 65 void (*write_idt_entry)(struct desc_struct *, int, u32, u32);
014b15be 66 void (*write_gdt_entry)(struct desc_struct *, int, u32, u32);
75b8bb3e 67 void (*write_ldt_entry)(struct desc_struct *, int, u32, u32);
faca6227 68 void (*set_kernel_stack)(u32 selector, u32 sp0);
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69 void (*allocate_page)(u32, u32, u32, u32, u32);
70 void (*release_page)(u32, u32);
71 void (*set_pte)(pte_t, pte_t *, unsigned);
72 void (*update_pte)(pte_t *, unsigned);
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73 void (*set_linear_mapping)(int, void *, u32, u32);
74 void (*_flush_tlb)(int);
7ce0bcfd 75 void (*set_initial_ap_state)(int, int);
bbab4f3b 76 void (*halt)(void);
49f19710 77 void (*set_lazy_mode)(int mode);
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78} vmi_ops;
79
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80/* Cached VMI operations */
81struct vmi_timer_ops vmi_timer_ops;
82
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83/*
84 * VMI patching routines.
85 */
86#define MNEM_CALL 0xe8
87#define MNEM_JMP 0xe9
88#define MNEM_RET 0xc3
89
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90#define IRQ_PATCH_INT_MASK 0
91#define IRQ_PATCH_DISABLE 5
92
ab144f5e 93static inline void patch_offset(void *insnbuf,
65ea5b03 94 unsigned long ip, unsigned long dest)
7ce0bcfd 95{
65ea5b03 96 *(unsigned long *)(insnbuf+1) = dest-ip-5;
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97}
98
ab144f5e 99static unsigned patch_internal(int call, unsigned len, void *insnbuf,
65ea5b03 100 unsigned long ip)
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101{
102 u64 reloc;
103 struct vmi_relocation_info *const rel = (struct vmi_relocation_info *)&reloc;
104 reloc = call_vrom_long_func(vmi_rom, get_reloc, call);
105 switch(rel->type) {
106 case VMI_RELOCATION_CALL_REL:
107 BUG_ON(len < 5);
ab144f5e 108 *(char *)insnbuf = MNEM_CALL;
65ea5b03 109 patch_offset(insnbuf, ip, (unsigned long)rel->eip);
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110 return 5;
111
112 case VMI_RELOCATION_JUMP_REL:
113 BUG_ON(len < 5);
ab144f5e 114 *(char *)insnbuf = MNEM_JMP;
65ea5b03 115 patch_offset(insnbuf, ip, (unsigned long)rel->eip);
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116 return 5;
117
118 case VMI_RELOCATION_NOP:
119 /* obliterate the whole thing */
120 return 0;
121
122 case VMI_RELOCATION_NONE:
123 /* leave native code in place */
124 break;
125
126 default:
127 BUG();
128 }
129 return len;
130}
131
132/*
133 * Apply patch if appropriate, return length of new instruction
134 * sequence. The callee does nop padding for us.
135 */
ab144f5e 136static unsigned vmi_patch(u8 type, u16 clobbers, void *insns,
65ea5b03 137 unsigned long ip, unsigned len)
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138{
139 switch (type) {
93b1eab3 140 case PARAVIRT_PATCH(pv_irq_ops.irq_disable):
ab144f5e 141 return patch_internal(VMI_CALL_DisableInterrupts, len,
65ea5b03 142 insns, ip);
93b1eab3 143 case PARAVIRT_PATCH(pv_irq_ops.irq_enable):
ab144f5e 144 return patch_internal(VMI_CALL_EnableInterrupts, len,
65ea5b03 145 insns, ip);
93b1eab3 146 case PARAVIRT_PATCH(pv_irq_ops.restore_fl):
ab144f5e 147 return patch_internal(VMI_CALL_SetInterruptMask, len,
65ea5b03 148 insns, ip);
93b1eab3 149 case PARAVIRT_PATCH(pv_irq_ops.save_fl):
ab144f5e 150 return patch_internal(VMI_CALL_GetInterruptMask, len,
65ea5b03 151 insns, ip);
93b1eab3 152 case PARAVIRT_PATCH(pv_cpu_ops.iret):
65ea5b03 153 return patch_internal(VMI_CALL_IRET, len, insns, ip);
6abcd98f 154 case PARAVIRT_PATCH(pv_cpu_ops.irq_enable_syscall_ret):
65ea5b03 155 return patch_internal(VMI_CALL_SYSEXIT, len, insns, ip);
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156 default:
157 break;
158 }
159 return len;
160}
161
162/* CPUID has non-C semantics, and paravirt-ops API doesn't match hardware ISA */
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PA
163static void vmi_cpuid(unsigned int *ax, unsigned int *bx,
164 unsigned int *cx, unsigned int *dx)
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165{
166 int override = 0;
65ea5b03 167 if (*ax == 1)
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168 override = 1;
169 asm volatile ("call *%6"
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170 : "=a" (*ax),
171 "=b" (*bx),
172 "=c" (*cx),
173 "=d" (*dx)
174 : "0" (*ax), "2" (*cx), "r" (vmi_ops.cpuid));
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175 if (override) {
176 if (disable_pse)
65ea5b03 177 *dx &= ~X86_FEATURE_PSE;
7ce0bcfd 178 if (disable_pge)
65ea5b03 179 *dx &= ~X86_FEATURE_PGE;
7ce0bcfd 180 if (disable_sep)
65ea5b03 181 *dx &= ~X86_FEATURE_SEP;
7ce0bcfd 182 if (disable_tsc)
65ea5b03 183 *dx &= ~X86_FEATURE_TSC;
7ce0bcfd 184 if (disable_mtrr)
65ea5b03 185 *dx &= ~X86_FEATURE_MTRR;
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186 }
187}
188
189static inline void vmi_maybe_load_tls(struct desc_struct *gdt, int nr, struct desc_struct *new)
190{
191 if (gdt[nr].a != new->a || gdt[nr].b != new->b)
014b15be 192 write_gdt_entry(gdt, nr, new, 0);
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193}
194
195static void vmi_load_tls(struct thread_struct *t, unsigned int cpu)
196{
197 struct desc_struct *gdt = get_cpu_gdt_table(cpu);
198 vmi_maybe_load_tls(gdt, GDT_ENTRY_TLS_MIN + 0, &t->tls_array[0]);
199 vmi_maybe_load_tls(gdt, GDT_ENTRY_TLS_MIN + 1, &t->tls_array[1]);
200 vmi_maybe_load_tls(gdt, GDT_ENTRY_TLS_MIN + 2, &t->tls_array[2]);
201}
202
203static void vmi_set_ldt(const void *addr, unsigned entries)
204{
205 unsigned cpu = smp_processor_id();
014b15be 206 struct desc_struct desc;
7ce0bcfd 207
014b15be 208 pack_descriptor(&desc, (unsigned long)addr,
7ce0bcfd 209 entries * sizeof(struct desc_struct) - 1,
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210 DESC_LDT, 0);
211 write_gdt_entry(get_cpu_gdt_table(cpu), GDT_ENTRY_LDT, &desc, DESC_LDT);
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212 vmi_ops._set_ldt(entries ? GDT_ENTRY_LDT*sizeof(struct desc_struct) : 0);
213}
214
215static void vmi_set_tr(void)
216{
217 vmi_ops.set_tr(GDT_ENTRY_TSS*sizeof(struct desc_struct));
218}
219
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GOC
220static void vmi_write_idt_entry(gate_desc *dt, int entry, const gate_desc *g)
221{
222 u32 *idt_entry = (u32 *)g;
262d5ee2 223 vmi_ops.write_idt_entry(dt, entry, idt_entry[0], idt_entry[1]);
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GOC
224}
225
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GOC
226static void vmi_write_gdt_entry(struct desc_struct *dt, int entry,
227 const void *desc, int type)
228{
229 u32 *gdt_entry = (u32 *)desc;
262d5ee2 230 vmi_ops.write_gdt_entry(dt, entry, gdt_entry[0], gdt_entry[1]);
014b15be
GOC
231}
232
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GOC
233static void vmi_write_ldt_entry(struct desc_struct *dt, int entry,
234 const void *desc)
235{
236 u32 *ldt_entry = (u32 *)desc;
262d5ee2 237 vmi_ops.write_idt_entry(dt, entry, ldt_entry[0], ldt_entry[1]);
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GOC
238}
239
faca6227 240static void vmi_load_sp0(struct tss_struct *tss,
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241 struct thread_struct *thread)
242{
faca6227 243 tss->x86_tss.sp0 = thread->sp0;
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244
245 /* This can only happen when SEP is enabled, no need to test "SEP"arately */
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246 if (unlikely(tss->x86_tss.ss1 != thread->sysenter_cs)) {
247 tss->x86_tss.ss1 = thread->sysenter_cs;
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248 wrmsr(MSR_IA32_SYSENTER_CS, thread->sysenter_cs, 0);
249 }
faca6227 250 vmi_ops.set_kernel_stack(__KERNEL_DS, tss->x86_tss.sp0);
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251}
252
253static void vmi_flush_tlb_user(void)
254{
eeef9c68 255 vmi_ops._flush_tlb(VMI_FLUSH_TLB);
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256}
257
258static void vmi_flush_tlb_kernel(void)
259{
eeef9c68 260 vmi_ops._flush_tlb(VMI_FLUSH_TLB | VMI_FLUSH_GLOBAL);
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261}
262
263/* Stub to do nothing at all; used for delays and unimplemented calls */
264static void vmi_nop(void)
265{
266}
267
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268#ifdef CONFIG_DEBUG_PAGE_TYPE
269
270#ifdef CONFIG_X86_PAE
271#define MAX_BOOT_PTS (2048+4+1)
272#else
273#define MAX_BOOT_PTS (1024+1)
274#endif
275
276/*
277 * During boot, mem_map is not yet available in paging_init, so stash
278 * all the boot page allocations here.
279 */
280static struct {
281 u32 pfn;
282 int type;
283} boot_page_allocations[MAX_BOOT_PTS];
284static int num_boot_page_allocations;
285static int boot_allocations_applied;
286
287void vmi_apply_boot_page_allocations(void)
288{
289 int i;
290 BUG_ON(!mem_map);
291 for (i = 0; i < num_boot_page_allocations; i++) {
292 struct page *page = pfn_to_page(boot_page_allocations[i].pfn);
293 page->type = boot_page_allocations[i].type;
294 page->type = boot_page_allocations[i].type &
295 ~(VMI_PAGE_ZEROED | VMI_PAGE_CLONE);
296 }
297 boot_allocations_applied = 1;
298}
299
300static void record_page_type(u32 pfn, int type)
301{
302 BUG_ON(num_boot_page_allocations >= MAX_BOOT_PTS);
303 boot_page_allocations[num_boot_page_allocations].pfn = pfn;
304 boot_page_allocations[num_boot_page_allocations].type = type;
305 num_boot_page_allocations++;
306}
307
308static void check_zeroed_page(u32 pfn, int type, struct page *page)
309{
310 u32 *ptr;
311 int i;
312 int limit = PAGE_SIZE / sizeof(int);
313
314 if (page_address(page))
315 ptr = (u32 *)page_address(page);
316 else
317 ptr = (u32 *)__va(pfn << PAGE_SHIFT);
318 /*
319 * When cloning the root in non-PAE mode, only the userspace
320 * pdes need to be zeroed.
321 */
322 if (type & VMI_PAGE_CLONE)
323 limit = USER_PTRS_PER_PGD;
324 for (i = 0; i < limit; i++)
325 BUG_ON(ptr[i]);
326}
327
328/*
329 * We stash the page type into struct page so we can verify the page
330 * types are used properly.
331 */
332static void vmi_set_page_type(u32 pfn, int type)
333{
334 /* PAE can have multiple roots per page - don't track */
335 if (PTRS_PER_PMD > 1 && (type & VMI_PAGE_PDP))
336 return;
337
338 if (boot_allocations_applied) {
339 struct page *page = pfn_to_page(pfn);
340 if (type != VMI_PAGE_NORMAL)
341 BUG_ON(page->type);
342 else
343 BUG_ON(page->type == VMI_PAGE_NORMAL);
344 page->type = type & ~(VMI_PAGE_ZEROED | VMI_PAGE_CLONE);
345 if (type & VMI_PAGE_ZEROED)
346 check_zeroed_page(pfn, type, page);
347 } else {
348 record_page_type(pfn, type);
349 }
350}
351
352static void vmi_check_page_type(u32 pfn, int type)
353{
354 /* PAE can have multiple roots per page - skip checks */
355 if (PTRS_PER_PMD > 1 && (type & VMI_PAGE_PDP))
356 return;
357
358 type &= ~(VMI_PAGE_ZEROED | VMI_PAGE_CLONE);
359 if (boot_allocations_applied) {
360 struct page *page = pfn_to_page(pfn);
361 BUG_ON((page->type ^ type) & VMI_PAGE_PAE);
362 BUG_ON(type == VMI_PAGE_NORMAL && page->type);
363 BUG_ON((type & page->type) == 0);
364 }
365}
366#else
367#define vmi_set_page_type(p,t) do { } while (0)
368#define vmi_check_page_type(p,t) do { } while (0)
369#endif
370
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371#ifdef CONFIG_HIGHPTE
372static void *vmi_kmap_atomic_pte(struct page *page, enum km_type type)
9a1c13e9 373{
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374 void *va = kmap_atomic(page, type);
375
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376 /*
377 * Internally, the VMI ROM must map virtual addresses to physical
378 * addresses for processing MMU updates. By the time MMU updates
379 * are issued, this information is typically already lost.
380 * Fortunately, the VMI provides a cache of mapping slots for active
381 * page tables.
382 *
383 * We use slot zero for the linear mapping of physical memory, and
384 * in HIGHPTE kernels, slot 1 and 2 for KM_PTE0 and KM_PTE1.
385 *
386 * args: SLOT VA COUNT PFN
387 */
388 BUG_ON(type != KM_PTE0 && type != KM_PTE1);
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389 vmi_ops.set_linear_mapping((type - KM_PTE0)+1, va, 1, page_to_pfn(page));
390
391 return va;
9a1c13e9 392}
eeef9c68 393#endif
9a1c13e9 394
fdb4c338 395static void vmi_allocate_pt(struct mm_struct *mm, u32 pfn)
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396{
397 vmi_set_page_type(pfn, VMI_PAGE_L1);
398 vmi_ops.allocate_page(pfn, VMI_PAGE_L1, 0, 0, 0);
399}
400
6c435456 401static void vmi_allocate_pd(struct mm_struct *mm, u32 pfn)
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402{
403 /*
404 * This call comes in very early, before mem_map is setup.
405 * It is called only for swapper_pg_dir, which already has
406 * data on it.
407 */
408 vmi_set_page_type(pfn, VMI_PAGE_L2);
409 vmi_ops.allocate_page(pfn, VMI_PAGE_L2, 0, 0, 0);
410}
411
412static void vmi_allocate_pd_clone(u32 pfn, u32 clonepfn, u32 start, u32 count)
413{
414 vmi_set_page_type(pfn, VMI_PAGE_L2 | VMI_PAGE_CLONE);
415 vmi_check_page_type(clonepfn, VMI_PAGE_L2);
416 vmi_ops.allocate_page(pfn, VMI_PAGE_L2 | VMI_PAGE_CLONE, clonepfn, start, count);
417}
418
419static void vmi_release_pt(u32 pfn)
420{
421 vmi_ops.release_page(pfn, VMI_PAGE_L1);
422 vmi_set_page_type(pfn, VMI_PAGE_NORMAL);
423}
424
425static void vmi_release_pd(u32 pfn)
426{
427 vmi_ops.release_page(pfn, VMI_PAGE_L2);
428 vmi_set_page_type(pfn, VMI_PAGE_NORMAL);
429}
430
431/*
432 * Helper macros for MMU update flags. We can defer updates until a flush
433 * or page invalidation only if the update is to the current address space
434 * (otherwise, there is no flush). We must check against init_mm, since
435 * this could be a kernel update, which usually passes init_mm, although
436 * sometimes this check can be skipped if we know the particular function
437 * is only called on user mode PTEs. We could change the kernel to pass
438 * current->active_mm here, but in particular, I was unsure if changing
439 * mm/highmem.c to do this would still be correct on other architectures.
440 */
441#define is_current_as(mm, mustbeuser) ((mm) == current->active_mm || \
442 (!mustbeuser && (mm) == &init_mm))
443#define vmi_flags_addr(mm, addr, level, user) \
444 ((level) | (is_current_as(mm, user) ? \
445 (VMI_PAGE_CURRENT_AS | ((addr) & VMI_PAGE_VA_MASK)) : 0))
446#define vmi_flags_addr_defer(mm, addr, level, user) \
447 ((level) | (is_current_as(mm, user) ? \
448 (VMI_PAGE_DEFER | VMI_PAGE_CURRENT_AS | ((addr) & VMI_PAGE_VA_MASK)) : 0))
449
3dc494e8 450static void vmi_update_pte(struct mm_struct *mm, unsigned long addr, pte_t *ptep)
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451{
452 vmi_check_page_type(__pa(ptep) >> PAGE_SHIFT, VMI_PAGE_PTE);
453 vmi_ops.update_pte(ptep, vmi_flags_addr(mm, addr, VMI_PAGE_PT, 0));
454}
455
3dc494e8 456static void vmi_update_pte_defer(struct mm_struct *mm, unsigned long addr, pte_t *ptep)
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457{
458 vmi_check_page_type(__pa(ptep) >> PAGE_SHIFT, VMI_PAGE_PTE);
459 vmi_ops.update_pte(ptep, vmi_flags_addr_defer(mm, addr, VMI_PAGE_PT, 0));
460}
461
462static void vmi_set_pte(pte_t *ptep, pte_t pte)
463{
464 /* XXX because of set_pmd_pte, this can be called on PT or PD layers */
465 vmi_check_page_type(__pa(ptep) >> PAGE_SHIFT, VMI_PAGE_PTE | VMI_PAGE_PD);
466 vmi_ops.set_pte(pte, ptep, VMI_PAGE_PT);
467}
468
3dc494e8 469static void vmi_set_pte_at(struct mm_struct *mm, unsigned long addr, pte_t *ptep, pte_t pte)
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470{
471 vmi_check_page_type(__pa(ptep) >> PAGE_SHIFT, VMI_PAGE_PTE);
472 vmi_ops.set_pte(pte, ptep, vmi_flags_addr(mm, addr, VMI_PAGE_PT, 0));
473}
474
475static void vmi_set_pmd(pmd_t *pmdp, pmd_t pmdval)
476{
477#ifdef CONFIG_X86_PAE
e3328701 478 const pte_t pte = { .pte = pmdval.pmd };
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479 vmi_check_page_type(__pa(pmdp) >> PAGE_SHIFT, VMI_PAGE_PMD);
480#else
481 const pte_t pte = { pmdval.pud.pgd.pgd };
482 vmi_check_page_type(__pa(pmdp) >> PAGE_SHIFT, VMI_PAGE_PGD);
483#endif
484 vmi_ops.set_pte(pte, (pte_t *)pmdp, VMI_PAGE_PD);
485}
486
487#ifdef CONFIG_X86_PAE
488
489static void vmi_set_pte_atomic(pte_t *ptep, pte_t pteval)
490{
491 /*
492 * XXX This is called from set_pmd_pte, but at both PT
493 * and PD layers so the VMI_PAGE_PT flag is wrong. But
494 * it is only called for large page mapping changes,
495 * the Xen backend, doesn't support large pages, and the
496 * ESX backend doesn't depend on the flag.
497 */
498 set_64bit((unsigned long long *)ptep,pte_val(pteval));
499 vmi_ops.update_pte(ptep, VMI_PAGE_PT);
500}
501
502static void vmi_set_pte_present(struct mm_struct *mm, unsigned long addr, pte_t *ptep, pte_t pte)
503{
504 vmi_check_page_type(__pa(ptep) >> PAGE_SHIFT, VMI_PAGE_PTE);
505 vmi_ops.set_pte(pte, ptep, vmi_flags_addr_defer(mm, addr, VMI_PAGE_PT, 1));
506}
507
508static void vmi_set_pud(pud_t *pudp, pud_t pudval)
509{
510 /* Um, eww */
e3328701 511 const pte_t pte = { .pte = pudval.pgd.pgd };
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512 vmi_check_page_type(__pa(pudp) >> PAGE_SHIFT, VMI_PAGE_PGD);
513 vmi_ops.set_pte(pte, (pte_t *)pudp, VMI_PAGE_PDP);
514}
515
516static void vmi_pte_clear(struct mm_struct *mm, unsigned long addr, pte_t *ptep)
517{
e3328701 518 const pte_t pte = { .pte = 0 };
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519 vmi_check_page_type(__pa(ptep) >> PAGE_SHIFT, VMI_PAGE_PTE);
520 vmi_ops.set_pte(pte, ptep, vmi_flags_addr(mm, addr, VMI_PAGE_PT, 0));
521}
522
8eb68fae 523static void vmi_pmd_clear(pmd_t *pmd)
7ce0bcfd 524{
e3328701 525 const pte_t pte = { .pte = 0 };
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526 vmi_check_page_type(__pa(pmd) >> PAGE_SHIFT, VMI_PAGE_PMD);
527 vmi_ops.set_pte(pte, (pte_t *)pmd, VMI_PAGE_PD);
528}
529#endif
530
531#ifdef CONFIG_SMP
c6b36e9a 532static void __devinit
7ce0bcfd
ZA
533vmi_startup_ipi_hook(int phys_apicid, unsigned long start_eip,
534 unsigned long start_esp)
535{
c6b36e9a
ZA
536 struct vmi_ap_state ap;
537
7ce0bcfd
ZA
538 /* Default everything to zero. This is fine for most GPRs. */
539 memset(&ap, 0, sizeof(struct vmi_ap_state));
540
541 ap.gdtr_limit = GDT_SIZE - 1;
542 ap.gdtr_base = (unsigned long) get_cpu_gdt_table(phys_apicid);
543
544 ap.idtr_limit = IDT_ENTRIES * 8 - 1;
545 ap.idtr_base = (unsigned long) idt_table;
546
547 ap.ldtr = 0;
548
549 ap.cs = __KERNEL_CS;
550 ap.eip = (unsigned long) start_eip;
551 ap.ss = __KERNEL_DS;
552 ap.esp = (unsigned long) start_esp;
553
554 ap.ds = __USER_DS;
555 ap.es = __USER_DS;
7c3576d2 556 ap.fs = __KERNEL_PERCPU;
7ce0bcfd
ZA
557 ap.gs = 0;
558
559 ap.eflags = 0;
560
7ce0bcfd
ZA
561#ifdef CONFIG_X86_PAE
562 /* efer should match BSP efer. */
563 if (cpu_has_nx) {
564 unsigned l, h;
565 rdmsr(MSR_EFER, l, h);
566 ap.efer = (unsigned long long) h << 32 | l;
567 }
568#endif
569
570 ap.cr3 = __pa(swapper_pg_dir);
571 /* Protected mode, paging, AM, WP, NE, MP. */
572 ap.cr0 = 0x80050023;
573 ap.cr4 = mmu_cr4_features;
c6b36e9a 574 vmi_ops.set_initial_ap_state((u32)&ap, phys_apicid);
7ce0bcfd
ZA
575}
576#endif
577
8965c1c0 578static void vmi_enter_lazy_cpu(void)
49f19710 579{
8965c1c0
JF
580 paravirt_enter_lazy_cpu();
581 vmi_ops.set_lazy_mode(2);
582}
49f19710 583
8965c1c0
JF
584static void vmi_enter_lazy_mmu(void)
585{
586 paravirt_enter_lazy_mmu();
587 vmi_ops.set_lazy_mode(1);
588}
49f19710 589
8965c1c0
JF
590static void vmi_leave_lazy(void)
591{
592 paravirt_leave_lazy(paravirt_get_lazy_mode());
593 vmi_ops.set_lazy_mode(0);
49f19710
ZA
594}
595
7ce0bcfd
ZA
596static inline int __init check_vmi_rom(struct vrom_header *rom)
597{
598 struct pci_header *pci;
599 struct pnp_header *pnp;
600 const char *manufacturer = "UNKNOWN";
601 const char *product = "UNKNOWN";
602 const char *license = "unspecified";
603
604 if (rom->rom_signature != 0xaa55)
605 return 0;
606 if (rom->vrom_signature != VMI_SIGNATURE)
607 return 0;
608 if (rom->api_version_maj != VMI_API_REV_MAJOR ||
609 rom->api_version_min+1 < VMI_API_REV_MINOR+1) {
610 printk(KERN_WARNING "VMI: Found mismatched rom version %d.%d\n",
611 rom->api_version_maj,
612 rom->api_version_min);
613 return 0;
614 }
615
616 /*
617 * Relying on the VMI_SIGNATURE field is not 100% safe, so check
618 * the PCI header and device type to make sure this is really a
619 * VMI device.
620 */
621 if (!rom->pci_header_offs) {
622 printk(KERN_WARNING "VMI: ROM does not contain PCI header.\n");
623 return 0;
624 }
625
626 pci = (struct pci_header *)((char *)rom+rom->pci_header_offs);
627 if (pci->vendorID != PCI_VENDOR_ID_VMWARE ||
628 pci->deviceID != PCI_DEVICE_ID_VMWARE_VMI) {
629 /* Allow it to run... anyways, but warn */
630 printk(KERN_WARNING "VMI: ROM from unknown manufacturer\n");
631 }
632
633 if (rom->pnp_header_offs) {
634 pnp = (struct pnp_header *)((char *)rom+rom->pnp_header_offs);
635 if (pnp->manufacturer_offset)
636 manufacturer = (const char *)rom+pnp->manufacturer_offset;
637 if (pnp->product_offset)
638 product = (const char *)rom+pnp->product_offset;
639 }
640
641 if (rom->license_offs)
642 license = (char *)rom+rom->license_offs;
643
644 printk(KERN_INFO "VMI: Found %s %s, API version %d.%d, ROM version %d.%d\n",
645 manufacturer, product,
646 rom->api_version_maj, rom->api_version_min,
647 pci->rom_version_maj, pci->rom_version_min);
648
302cf930
AK
649 /* Don't allow BSD/MIT here for now because we don't want to end up
650 with any binary only shim layers */
651 if (strcmp(license, "GPL") && strcmp(license, "GPL v2")) {
652 printk(KERN_WARNING "VMI: Non GPL license `%s' found for ROM. Not used.\n",
653 license);
654 return 0;
655 }
656
7ce0bcfd
ZA
657 return 1;
658}
659
660/*
661 * Probe for the VMI option ROM
662 */
663static inline int __init probe_vmi_rom(void)
664{
665 unsigned long base;
666
667 /* VMI ROM is in option ROM area, check signature */
668 for (base = 0xC0000; base < 0xE0000; base += 2048) {
669 struct vrom_header *romstart;
670 romstart = (struct vrom_header *)isa_bus_to_virt(base);
671 if (check_vmi_rom(romstart)) {
672 vmi_rom = romstart;
673 return 1;
674 }
675 }
676 return 0;
677}
678
679/*
680 * VMI setup common to all processors
681 */
682void vmi_bringup(void)
683{
684 /* We must establish the lowmem mapping for MMU ops to work */
772205f6 685 if (vmi_ops.set_linear_mapping)
eeef9c68 686 vmi_ops.set_linear_mapping(0, (void *)__PAGE_OFFSET, max_low_pfn, 0);
7ce0bcfd
ZA
687}
688
689/*
772205f6 690 * Return a pointer to a VMI function or NULL if unimplemented
7ce0bcfd
ZA
691 */
692static void *vmi_get_function(int vmicall)
693{
694 u64 reloc;
695 const struct vmi_relocation_info *rel = (struct vmi_relocation_info *)&reloc;
696 reloc = call_vrom_long_func(vmi_rom, get_reloc, vmicall);
697 BUG_ON(rel->type == VMI_RELOCATION_JUMP_REL);
698 if (rel->type == VMI_RELOCATION_CALL_REL)
699 return (void *)rel->eip;
700 else
772205f6 701 return NULL;
7ce0bcfd
ZA
702}
703
704/*
705 * Helper macro for making the VMI paravirt-ops fill code readable.
772205f6
ZA
706 * For unimplemented operations, fall back to default, unless nop
707 * is returned by the ROM.
7ce0bcfd
ZA
708 */
709#define para_fill(opname, vmicall) \
710do { \
711 reloc = call_vrom_long_func(vmi_rom, get_reloc, \
712 VMI_CALL_##vmicall); \
0492c371 713 if (rel->type == VMI_RELOCATION_CALL_REL) \
93b1eab3 714 opname = (void *)rel->eip; \
0492c371 715 else if (rel->type == VMI_RELOCATION_NOP) \
93b1eab3 716 opname = (void *)vmi_nop; \
0492c371
ZA
717 else if (rel->type != VMI_RELOCATION_NONE) \
718 printk(KERN_WARNING "VMI: Unknown relocation " \
719 "type %d for " #vmicall"\n",\
720 rel->type); \
772205f6
ZA
721} while (0)
722
723/*
724 * Helper macro for making the VMI paravirt-ops fill code readable.
725 * For cached operations which do not match the VMI ROM ABI and must
726 * go through a tranlation stub. Ignore NOPs, since it is not clear
727 * a NOP * VMI function corresponds to a NOP paravirt-op when the
728 * functions are not in 1-1 correspondence.
729 */
730#define para_wrap(opname, wrapper, cache, vmicall) \
731do { \
732 reloc = call_vrom_long_func(vmi_rom, get_reloc, \
733 VMI_CALL_##vmicall); \
734 BUG_ON(rel->type == VMI_RELOCATION_JUMP_REL); \
735 if (rel->type == VMI_RELOCATION_CALL_REL) { \
93b1eab3 736 opname = wrapper; \
772205f6 737 vmi_ops.cache = (void *)rel->eip; \
7ce0bcfd
ZA
738 } \
739} while (0)
740
741/*
742 * Activate the VMI interface and switch into paravirtualized mode
743 */
744static inline int __init activate_vmi(void)
745{
746 short kernel_cs;
747 u64 reloc;
748 const struct vmi_relocation_info *rel = (struct vmi_relocation_info *)&reloc;
749
750 if (call_vrom_func(vmi_rom, vmi_init) != 0) {
751 printk(KERN_ERR "VMI ROM failed to initialize!");
752 return 0;
753 }
754 savesegment(cs, kernel_cs);
755
93b1eab3
JF
756 pv_info.paravirt_enabled = 1;
757 pv_info.kernel_rpl = kernel_cs & SEGMENT_RPL_MASK;
758 pv_info.name = "vmi";
7ce0bcfd 759
93b1eab3 760 pv_init_ops.patch = vmi_patch;
7ce0bcfd
ZA
761
762 /*
763 * Many of these operations are ABI compatible with VMI.
764 * This means we can fill in the paravirt-ops with direct
765 * pointers into the VMI ROM. If the calling convention for
766 * these operations changes, this code needs to be updated.
767 *
768 * Exceptions
769 * CPUID paravirt-op uses pointers, not the native ISA
770 * halt has no VMI equivalent; all VMI halts are "safe"
771 * no MSR support yet - just trap and emulate. VMI uses the
772 * same ABI as the native ISA, but Linux wants exceptions
773 * from bogus MSR read / write handled
774 * rdpmc is not yet used in Linux
775 */
776
772205f6 777 /* CPUID is special, so very special it gets wrapped like a present */
93b1eab3
JF
778 para_wrap(pv_cpu_ops.cpuid, vmi_cpuid, cpuid, CPUID);
779
780 para_fill(pv_cpu_ops.clts, CLTS);
781 para_fill(pv_cpu_ops.get_debugreg, GetDR);
782 para_fill(pv_cpu_ops.set_debugreg, SetDR);
783 para_fill(pv_cpu_ops.read_cr0, GetCR0);
784 para_fill(pv_mmu_ops.read_cr2, GetCR2);
785 para_fill(pv_mmu_ops.read_cr3, GetCR3);
786 para_fill(pv_cpu_ops.read_cr4, GetCR4);
787 para_fill(pv_cpu_ops.write_cr0, SetCR0);
788 para_fill(pv_mmu_ops.write_cr2, SetCR2);
789 para_fill(pv_mmu_ops.write_cr3, SetCR3);
790 para_fill(pv_cpu_ops.write_cr4, SetCR4);
791 para_fill(pv_irq_ops.save_fl, GetInterruptMask);
792 para_fill(pv_irq_ops.restore_fl, SetInterruptMask);
793 para_fill(pv_irq_ops.irq_disable, DisableInterrupts);
794 para_fill(pv_irq_ops.irq_enable, EnableInterrupts);
795
796 para_fill(pv_cpu_ops.wbinvd, WBINVD);
797 para_fill(pv_cpu_ops.read_tsc, RDTSC);
772205f6
ZA
798
799 /* The following we emulate with trap and emulate for now */
7ce0bcfd
ZA
800 /* paravirt_ops.read_msr = vmi_rdmsr */
801 /* paravirt_ops.write_msr = vmi_wrmsr */
7ce0bcfd
ZA
802 /* paravirt_ops.rdpmc = vmi_rdpmc */
803
772205f6 804 /* TR interface doesn't pass TR value, wrap */
93b1eab3 805 para_wrap(pv_cpu_ops.load_tr_desc, vmi_set_tr, set_tr, SetTR);
7ce0bcfd
ZA
806
807 /* LDT is special, too */
93b1eab3
JF
808 para_wrap(pv_cpu_ops.set_ldt, vmi_set_ldt, _set_ldt, SetLDT);
809
810 para_fill(pv_cpu_ops.load_gdt, SetGDT);
811 para_fill(pv_cpu_ops.load_idt, SetIDT);
812 para_fill(pv_cpu_ops.store_gdt, GetGDT);
813 para_fill(pv_cpu_ops.store_idt, GetIDT);
814 para_fill(pv_cpu_ops.store_tr, GetTR);
815 pv_cpu_ops.load_tls = vmi_load_tls;
75b8bb3e
GOC
816 para_wrap(pv_cpu_ops.write_ldt_entry, vmi_write_ldt_entry,
817 write_ldt_entry, WriteLDTEntry);
014b15be
GOC
818 para_wrap(pv_cpu_ops.write_gdt_entry, vmi_write_gdt_entry,
819 write_gdt_entry, WriteGDTEntry);
8d947344
GOC
820 para_wrap(pv_cpu_ops.write_idt_entry, vmi_write_idt_entry,
821 write_idt_entry, WriteIDTEntry);
faca6227 822 para_wrap(pv_cpu_ops.load_sp0, vmi_load_sp0, set_kernel_stack, UpdateKernelStack);
93b1eab3
JF
823 para_fill(pv_cpu_ops.set_iopl_mask, SetIOPLMask);
824 para_fill(pv_cpu_ops.io_delay, IODelay);
8965c1c0
JF
825
826 para_wrap(pv_cpu_ops.lazy_mode.enter, vmi_enter_lazy_cpu,
827 set_lazy_mode, SetLazyMode);
828 para_wrap(pv_cpu_ops.lazy_mode.leave, vmi_leave_lazy,
829 set_lazy_mode, SetLazyMode);
830
831 para_wrap(pv_mmu_ops.lazy_mode.enter, vmi_enter_lazy_mmu,
832 set_lazy_mode, SetLazyMode);
833 para_wrap(pv_mmu_ops.lazy_mode.leave, vmi_leave_lazy,
834 set_lazy_mode, SetLazyMode);
7ce0bcfd 835
772205f6 836 /* user and kernel flush are just handled with different flags to FlushTLB */
93b1eab3
JF
837 para_wrap(pv_mmu_ops.flush_tlb_user, vmi_flush_tlb_user, _flush_tlb, FlushTLB);
838 para_wrap(pv_mmu_ops.flush_tlb_kernel, vmi_flush_tlb_kernel, _flush_tlb, FlushTLB);
839 para_fill(pv_mmu_ops.flush_tlb_single, InvalPage);
7ce0bcfd
ZA
840
841 /*
842 * Until a standard flag format can be agreed on, we need to
843 * implement these as wrappers in Linux. Get the VMI ROM
844 * function pointers for the two backend calls.
845 */
846#ifdef CONFIG_X86_PAE
847 vmi_ops.set_pte = vmi_get_function(VMI_CALL_SetPxELong);
848 vmi_ops.update_pte = vmi_get_function(VMI_CALL_UpdatePxELong);
849#else
850 vmi_ops.set_pte = vmi_get_function(VMI_CALL_SetPxE);
851 vmi_ops.update_pte = vmi_get_function(VMI_CALL_UpdatePxE);
852#endif
7ce0bcfd 853
772205f6 854 if (vmi_ops.set_pte) {
93b1eab3
JF
855 pv_mmu_ops.set_pte = vmi_set_pte;
856 pv_mmu_ops.set_pte_at = vmi_set_pte_at;
857 pv_mmu_ops.set_pmd = vmi_set_pmd;
7ce0bcfd 858#ifdef CONFIG_X86_PAE
93b1eab3
JF
859 pv_mmu_ops.set_pte_atomic = vmi_set_pte_atomic;
860 pv_mmu_ops.set_pte_present = vmi_set_pte_present;
861 pv_mmu_ops.set_pud = vmi_set_pud;
862 pv_mmu_ops.pte_clear = vmi_pte_clear;
863 pv_mmu_ops.pmd_clear = vmi_pmd_clear;
7ce0bcfd 864#endif
772205f6
ZA
865 }
866
867 if (vmi_ops.update_pte) {
93b1eab3
JF
868 pv_mmu_ops.pte_update = vmi_update_pte;
869 pv_mmu_ops.pte_update_defer = vmi_update_pte_defer;
772205f6
ZA
870 }
871
872 vmi_ops.allocate_page = vmi_get_function(VMI_CALL_AllocatePage);
873 if (vmi_ops.allocate_page) {
93b1eab3
JF
874 pv_mmu_ops.alloc_pt = vmi_allocate_pt;
875 pv_mmu_ops.alloc_pd = vmi_allocate_pd;
876 pv_mmu_ops.alloc_pd_clone = vmi_allocate_pd_clone;
772205f6
ZA
877 }
878
879 vmi_ops.release_page = vmi_get_function(VMI_CALL_ReleasePage);
880 if (vmi_ops.release_page) {
93b1eab3
JF
881 pv_mmu_ops.release_pt = vmi_release_pt;
882 pv_mmu_ops.release_pd = vmi_release_pd;
772205f6 883 }
eeef9c68
ZA
884
885 /* Set linear is needed in all cases */
886 vmi_ops.set_linear_mapping = vmi_get_function(VMI_CALL_SetLinearMapping);
887#ifdef CONFIG_HIGHPTE
888 if (vmi_ops.set_linear_mapping)
93b1eab3 889 pv_mmu_ops.kmap_atomic_pte = vmi_kmap_atomic_pte;
a27fe809 890#endif
772205f6 891
7ce0bcfd
ZA
892 /*
893 * These MUST always be patched. Don't support indirect jumps
894 * through these operations, as the VMI interface may use either
895 * a jump or a call to get to these operations, depending on
896 * the backend. They are performance critical anyway, so requiring
897 * a patch is not a big problem.
898 */
6abcd98f 899 pv_cpu_ops.irq_enable_syscall_ret = (void *)0xfeedbab0;
93b1eab3 900 pv_cpu_ops.iret = (void *)0xbadbab0;
7ce0bcfd
ZA
901
902#ifdef CONFIG_SMP
93b1eab3 903 para_wrap(pv_apic_ops.startup_ipi_hook, vmi_startup_ipi_hook, set_initial_ap_state, SetInitialAPState);
7ce0bcfd
ZA
904#endif
905
906#ifdef CONFIG_X86_LOCAL_APIC
93b1eab3
JF
907 para_fill(pv_apic_ops.apic_read, APICRead);
908 para_fill(pv_apic_ops.apic_write, APICWrite);
909 para_fill(pv_apic_ops.apic_write_atomic, APICWrite);
7ce0bcfd
ZA
910#endif
911
bbab4f3b
ZA
912 /*
913 * Check for VMI timer functionality by probing for a cycle frequency method
914 */
915 reloc = call_vrom_long_func(vmi_rom, get_reloc, VMI_CALL_GetCycleFrequency);
772205f6 916 if (!disable_vmi_timer && rel->type != VMI_RELOCATION_NONE) {
bbab4f3b
ZA
917 vmi_timer_ops.get_cycle_frequency = (void *)rel->eip;
918 vmi_timer_ops.get_cycle_counter =
919 vmi_get_function(VMI_CALL_GetCycleCounter);
920 vmi_timer_ops.get_wallclock =
921 vmi_get_function(VMI_CALL_GetWallclockTime);
922 vmi_timer_ops.wallclock_updated =
923 vmi_get_function(VMI_CALL_WallclockUpdated);
924 vmi_timer_ops.set_alarm = vmi_get_function(VMI_CALL_SetAlarm);
925 vmi_timer_ops.cancel_alarm =
926 vmi_get_function(VMI_CALL_CancelAlarm);
93b1eab3
JF
927 pv_time_ops.time_init = vmi_time_init;
928 pv_time_ops.get_wallclock = vmi_get_wallclock;
929 pv_time_ops.set_wallclock = vmi_set_wallclock;
bbab4f3b 930#ifdef CONFIG_X86_LOCAL_APIC
93b1eab3
JF
931 pv_apic_ops.setup_boot_clock = vmi_time_bsp_init;
932 pv_apic_ops.setup_secondary_clock = vmi_time_ap_init;
bbab4f3b 933#endif
93b1eab3
JF
934 pv_time_ops.sched_clock = vmi_sched_clock;
935 pv_time_ops.get_cpu_khz = vmi_cpu_khz;
772205f6
ZA
936
937 /* We have true wallclock functions; disable CMOS clock sync */
938 no_sync_cmos_clock = 1;
939 } else {
940 disable_noidle = 1;
941 disable_vmi_timer = 1;
bbab4f3b 942 }
772205f6 943
93b1eab3 944 para_fill(pv_irq_ops.safe_halt, Halt);
bbab4f3b 945
7ce0bcfd
ZA
946 /*
947 * Alternative instruction rewriting doesn't happen soon enough
948 * to convert VMI_IRET to a call instead of a jump; so we have
949 * to do this before IRQs get reenabled. Fortunately, it is
950 * idempotent.
951 */
441d40dc 952 apply_paravirt(__parainstructions, __parainstructions_end);
7ce0bcfd
ZA
953
954 vmi_bringup();
955
956 return 1;
957}
958
959#undef para_fill
960
961void __init vmi_init(void)
962{
963 unsigned long flags;
964
965 if (!vmi_rom)
966 probe_vmi_rom();
967 else
968 check_vmi_rom(vmi_rom);
969
970 /* In case probing for or validating the ROM failed, basil */
971 if (!vmi_rom)
972 return;
973
974 reserve_top_address(-vmi_rom->virtual_top);
975
976 local_irq_save(flags);
977 activate_vmi();
7507ba34
ZA
978
979#ifdef CONFIG_X86_IO_APIC
772205f6 980 /* This is virtual hardware; timer routing is wired correctly */
7ce0bcfd
ZA
981 no_timer_check = 1;
982#endif
983 local_irq_restore(flags & X86_EFLAGS_IF);
984}
985
986static int __init parse_vmi(char *arg)
987{
988 if (!arg)
989 return -EINVAL;
990
eda08b1b 991 if (!strcmp(arg, "disable_pge")) {
53756d37 992 clear_cpu_cap(&boot_cpu_data, X86_FEATURE_PGE);
7ce0bcfd
ZA
993 disable_pge = 1;
994 } else if (!strcmp(arg, "disable_pse")) {
53756d37 995 clear_cpu_cap(&boot_cpu_data, X86_FEATURE_PSE);
7ce0bcfd
ZA
996 disable_pse = 1;
997 } else if (!strcmp(arg, "disable_sep")) {
53756d37 998 clear_cpu_cap(&boot_cpu_data, X86_FEATURE_SEP);
7ce0bcfd
ZA
999 disable_sep = 1;
1000 } else if (!strcmp(arg, "disable_tsc")) {
53756d37 1001 clear_cpu_cap(&boot_cpu_data, X86_FEATURE_TSC);
7ce0bcfd
ZA
1002 disable_tsc = 1;
1003 } else if (!strcmp(arg, "disable_mtrr")) {
53756d37 1004 clear_cpu_cap(&boot_cpu_data, X86_FEATURE_MTRR);
7ce0bcfd 1005 disable_mtrr = 1;
772205f6
ZA
1006 } else if (!strcmp(arg, "disable_timer")) {
1007 disable_vmi_timer = 1;
1008 disable_noidle = 1;
7507ba34
ZA
1009 } else if (!strcmp(arg, "disable_noidle"))
1010 disable_noidle = 1;
7ce0bcfd
ZA
1011 return 0;
1012}
1013
1014early_param("vmi", parse_vmi);