Commit | Line | Data |
---|---|---|
1da177e4 | 1 | /* |
1da177e4 | 2 | * Copyright (C) 1991, 1992 Linus Torvalds |
a8c1be9d | 3 | * Copyright (C) 2000, 2001, 2002 Andi Kleen, SuSE Labs |
1da177e4 LT |
4 | * |
5 | * Pentium III FXSR, SSE support | |
6 | * Gareth Hughes <gareth@valinux.com>, May 2000 | |
7 | */ | |
8 | ||
9 | /* | |
c1d518c8 | 10 | * Handle hardware traps and faults. |
1da177e4 | 11 | */ |
b5964405 IM |
12 | #include <linux/interrupt.h> |
13 | #include <linux/kallsyms.h> | |
14 | #include <linux/spinlock.h> | |
b5964405 IM |
15 | #include <linux/kprobes.h> |
16 | #include <linux/uaccess.h> | |
b5964405 | 17 | #include <linux/kdebug.h> |
f503b5ae | 18 | #include <linux/kgdb.h> |
1da177e4 | 19 | #include <linux/kernel.h> |
b5964405 IM |
20 | #include <linux/module.h> |
21 | #include <linux/ptrace.h> | |
1da177e4 | 22 | #include <linux/string.h> |
b5964405 | 23 | #include <linux/delay.h> |
1da177e4 | 24 | #include <linux/errno.h> |
b5964405 IM |
25 | #include <linux/kexec.h> |
26 | #include <linux/sched.h> | |
1da177e4 | 27 | #include <linux/timer.h> |
1da177e4 | 28 | #include <linux/init.h> |
91768d6c | 29 | #include <linux/bug.h> |
b5964405 IM |
30 | #include <linux/nmi.h> |
31 | #include <linux/mm.h> | |
c1d518c8 AH |
32 | #include <linux/smp.h> |
33 | #include <linux/io.h> | |
1da177e4 LT |
34 | |
35 | #ifdef CONFIG_EISA | |
36 | #include <linux/ioport.h> | |
37 | #include <linux/eisa.h> | |
38 | #endif | |
39 | ||
40 | #ifdef CONFIG_MCA | |
41 | #include <linux/mca.h> | |
42 | #endif | |
43 | ||
c0d12172 DJ |
44 | #if defined(CONFIG_EDAC) |
45 | #include <linux/edac.h> | |
46 | #endif | |
47 | ||
f8561296 | 48 | #include <asm/kmemcheck.h> |
b5964405 | 49 | #include <asm/stacktrace.h> |
1da177e4 | 50 | #include <asm/processor.h> |
1da177e4 | 51 | #include <asm/debugreg.h> |
b5964405 IM |
52 | #include <asm/atomic.h> |
53 | #include <asm/system.h> | |
c1d518c8 | 54 | #include <asm/traps.h> |
1da177e4 LT |
55 | #include <asm/desc.h> |
56 | #include <asm/i387.h> | |
9e55e44e | 57 | #include <asm/mce.h> |
c1d518c8 | 58 | |
1164dd00 | 59 | #include <asm/mach_traps.h> |
c1d518c8 | 60 | |
081f75bb | 61 | #ifdef CONFIG_X86_64 |
428cf902 | 62 | #include <asm/x86_init.h> |
081f75bb AH |
63 | #include <asm/pgalloc.h> |
64 | #include <asm/proto.h> | |
081f75bb | 65 | #else |
c1d518c8 | 66 | #include <asm/processor-flags.h> |
8e6dafd6 | 67 | #include <asm/setup.h> |
1da177e4 | 68 | |
1da177e4 LT |
69 | asmlinkage int system_call(void); |
70 | ||
1da177e4 | 71 | /* Do we ignore FPU interrupts ? */ |
b5964405 | 72 | char ignore_fpu_irq; |
1da177e4 LT |
73 | |
74 | /* | |
75 | * The IDT has to be page-aligned to simplify the Pentium | |
07e81d61 | 76 | * F0 0F bug workaround. |
1da177e4 | 77 | */ |
07e81d61 | 78 | gate_desc idt_table[NR_VECTORS] __page_aligned_data = { { { { 0, 0 } } }, }; |
081f75bb | 79 | #endif |
1da177e4 | 80 | |
b77b881f YL |
81 | DECLARE_BITMAP(used_vectors, NR_VECTORS); |
82 | EXPORT_SYMBOL_GPL(used_vectors); | |
83 | ||
badc7652 | 84 | static int ignore_nmis; |
e041c683 | 85 | |
762db434 AH |
86 | static inline void conditional_sti(struct pt_regs *regs) |
87 | { | |
88 | if (regs->flags & X86_EFLAGS_IF) | |
89 | local_irq_enable(); | |
90 | } | |
91 | ||
3d2a71a5 AH |
92 | static inline void preempt_conditional_sti(struct pt_regs *regs) |
93 | { | |
94 | inc_preempt_count(); | |
95 | if (regs->flags & X86_EFLAGS_IF) | |
96 | local_irq_enable(); | |
97 | } | |
98 | ||
be716615 TG |
99 | static inline void conditional_cli(struct pt_regs *regs) |
100 | { | |
101 | if (regs->flags & X86_EFLAGS_IF) | |
102 | local_irq_disable(); | |
103 | } | |
104 | ||
3d2a71a5 AH |
105 | static inline void preempt_conditional_cli(struct pt_regs *regs) |
106 | { | |
107 | if (regs->flags & X86_EFLAGS_IF) | |
108 | local_irq_disable(); | |
109 | dec_preempt_count(); | |
110 | } | |
111 | ||
b5964405 | 112 | static void __kprobes |
3c1326f8 | 113 | do_trap(int trapnr, int signr, char *str, struct pt_regs *regs, |
b5964405 | 114 | long error_code, siginfo_t *info) |
1da177e4 | 115 | { |
4f339ecb | 116 | struct task_struct *tsk = current; |
4f339ecb | 117 | |
081f75bb | 118 | #ifdef CONFIG_X86_32 |
6b6891f9 | 119 | if (regs->flags & X86_VM_MASK) { |
3c1326f8 AH |
120 | /* |
121 | * traps 0, 1, 3, 4, and 5 should be forwarded to vm86. | |
122 | * On nmi (interrupt 2), do_trap should not be called. | |
123 | */ | |
124 | if (trapnr < 6) | |
1da177e4 LT |
125 | goto vm86_trap; |
126 | goto trap_signal; | |
127 | } | |
081f75bb | 128 | #endif |
1da177e4 | 129 | |
717b594a | 130 | if (!user_mode(regs)) |
1da177e4 LT |
131 | goto kernel_trap; |
132 | ||
081f75bb | 133 | #ifdef CONFIG_X86_32 |
b5964405 | 134 | trap_signal: |
081f75bb | 135 | #endif |
b5964405 IM |
136 | /* |
137 | * We want error_code and trap_no set for userspace faults and | |
138 | * kernelspace faults which result in die(), but not | |
139 | * kernelspace faults which are fixed up. die() gives the | |
140 | * process no chance to handle the signal and notice the | |
141 | * kernel fault information, so that won't result in polluting | |
142 | * the information about previously queued, but not yet | |
143 | * delivered, faults. See also do_general_protection below. | |
144 | */ | |
145 | tsk->thread.error_code = error_code; | |
146 | tsk->thread.trap_no = trapnr; | |
d1895183 | 147 | |
081f75bb AH |
148 | #ifdef CONFIG_X86_64 |
149 | if (show_unhandled_signals && unhandled_signal(tsk, signr) && | |
150 | printk_ratelimit()) { | |
151 | printk(KERN_INFO | |
152 | "%s[%d] trap %s ip:%lx sp:%lx error:%lx", | |
153 | tsk->comm, tsk->pid, str, | |
154 | regs->ip, regs->sp, error_code); | |
155 | print_vma_addr(" in ", regs->ip); | |
156 | printk("\n"); | |
157 | } | |
158 | #endif | |
159 | ||
b5964405 IM |
160 | if (info) |
161 | force_sig_info(signr, info, tsk); | |
162 | else | |
163 | force_sig(signr, tsk); | |
164 | return; | |
1da177e4 | 165 | |
b5964405 IM |
166 | kernel_trap: |
167 | if (!fixup_exception(regs)) { | |
168 | tsk->thread.error_code = error_code; | |
169 | tsk->thread.trap_no = trapnr; | |
170 | die(str, regs, error_code); | |
1da177e4 | 171 | } |
b5964405 | 172 | return; |
1da177e4 | 173 | |
081f75bb | 174 | #ifdef CONFIG_X86_32 |
b5964405 IM |
175 | vm86_trap: |
176 | if (handle_vm86_trap((struct kernel_vm86_regs *) regs, | |
177 | error_code, trapnr)) | |
178 | goto trap_signal; | |
179 | return; | |
081f75bb | 180 | #endif |
1da177e4 LT |
181 | } |
182 | ||
b5964405 | 183 | #define DO_ERROR(trapnr, signr, str, name) \ |
e407d620 | 184 | dotraplinkage void do_##name(struct pt_regs *regs, long error_code) \ |
b5964405 IM |
185 | { \ |
186 | if (notify_die(DIE_TRAP, str, regs, error_code, trapnr, signr) \ | |
a8c1be9d | 187 | == NOTIFY_STOP) \ |
b5964405 | 188 | return; \ |
61aef7d2 | 189 | conditional_sti(regs); \ |
3c1326f8 | 190 | do_trap(trapnr, signr, str, regs, error_code, NULL); \ |
1da177e4 LT |
191 | } |
192 | ||
3c1326f8 | 193 | #define DO_ERROR_INFO(trapnr, signr, str, name, sicode, siaddr) \ |
e407d620 | 194 | dotraplinkage void do_##name(struct pt_regs *regs, long error_code) \ |
b5964405 IM |
195 | { \ |
196 | siginfo_t info; \ | |
197 | info.si_signo = signr; \ | |
198 | info.si_errno = 0; \ | |
199 | info.si_code = sicode; \ | |
200 | info.si_addr = (void __user *)siaddr; \ | |
b5964405 | 201 | if (notify_die(DIE_TRAP, str, regs, error_code, trapnr, signr) \ |
a8c1be9d | 202 | == NOTIFY_STOP) \ |
b5964405 | 203 | return; \ |
61aef7d2 | 204 | conditional_sti(regs); \ |
3c1326f8 | 205 | do_trap(trapnr, signr, str, regs, error_code, &info); \ |
1da177e4 LT |
206 | } |
207 | ||
3c1326f8 AH |
208 | DO_ERROR_INFO(0, SIGFPE, "divide error", divide_error, FPE_INTDIV, regs->ip) |
209 | DO_ERROR(4, SIGSEGV, "overflow", overflow) | |
210 | DO_ERROR(5, SIGSEGV, "bounds", bounds) | |
211 | DO_ERROR_INFO(6, SIGILL, "invalid opcode", invalid_op, ILL_ILLOPN, regs->ip) | |
51bc1ed6 | 212 | DO_ERROR(9, SIGFPE, "coprocessor segment overrun", coprocessor_segment_overrun) |
6bf77bf9 | 213 | DO_ERROR(10, SIGSEGV, "invalid TSS", invalid_TSS) |
36d936c7 | 214 | DO_ERROR(11, SIGBUS, "segment not present", segment_not_present) |
081f75bb | 215 | #ifdef CONFIG_X86_32 |
f5ca8187 | 216 | DO_ERROR(12, SIGBUS, "stack segment", stack_segment) |
081f75bb | 217 | #endif |
3c1326f8 | 218 | DO_ERROR_INFO(17, SIGBUS, "alignment check", alignment_check, BUS_ADRALN, 0) |
1da177e4 | 219 | |
081f75bb AH |
220 | #ifdef CONFIG_X86_64 |
221 | /* Runs on IST stack */ | |
222 | dotraplinkage void do_stack_segment(struct pt_regs *regs, long error_code) | |
223 | { | |
224 | if (notify_die(DIE_TRAP, "stack segment", regs, error_code, | |
225 | 12, SIGBUS) == NOTIFY_STOP) | |
226 | return; | |
227 | preempt_conditional_sti(regs); | |
228 | do_trap(12, SIGBUS, "stack segment", regs, error_code, NULL); | |
229 | preempt_conditional_cli(regs); | |
230 | } | |
231 | ||
232 | dotraplinkage void do_double_fault(struct pt_regs *regs, long error_code) | |
233 | { | |
234 | static const char str[] = "double fault"; | |
235 | struct task_struct *tsk = current; | |
236 | ||
237 | /* Return not checked because double check cannot be ignored */ | |
238 | notify_die(DIE_TRAP, str, regs, error_code, 8, SIGSEGV); | |
239 | ||
240 | tsk->thread.error_code = error_code; | |
241 | tsk->thread.trap_no = 8; | |
242 | ||
bd8b96df IM |
243 | /* |
244 | * This is always a kernel trap and never fixable (and thus must | |
245 | * never return). | |
246 | */ | |
081f75bb AH |
247 | for (;;) |
248 | die(str, regs, error_code); | |
249 | } | |
250 | #endif | |
251 | ||
e407d620 | 252 | dotraplinkage void __kprobes |
13485ab5 | 253 | do_general_protection(struct pt_regs *regs, long error_code) |
1da177e4 | 254 | { |
13485ab5 | 255 | struct task_struct *tsk; |
b5964405 | 256 | |
c6df0d71 AH |
257 | conditional_sti(regs); |
258 | ||
081f75bb | 259 | #ifdef CONFIG_X86_32 |
6b6891f9 | 260 | if (regs->flags & X86_VM_MASK) |
1da177e4 | 261 | goto gp_in_vm86; |
081f75bb | 262 | #endif |
1da177e4 | 263 | |
13485ab5 | 264 | tsk = current; |
717b594a | 265 | if (!user_mode(regs)) |
1da177e4 LT |
266 | goto gp_in_kernel; |
267 | ||
13485ab5 AH |
268 | tsk->thread.error_code = error_code; |
269 | tsk->thread.trap_no = 13; | |
b5964405 | 270 | |
13485ab5 AH |
271 | if (show_unhandled_signals && unhandled_signal(tsk, SIGSEGV) && |
272 | printk_ratelimit()) { | |
abd4f750 | 273 | printk(KERN_INFO |
13485ab5 AH |
274 | "%s[%d] general protection ip:%lx sp:%lx error:%lx", |
275 | tsk->comm, task_pid_nr(tsk), | |
276 | regs->ip, regs->sp, error_code); | |
03252919 AK |
277 | print_vma_addr(" in ", regs->ip); |
278 | printk("\n"); | |
279 | } | |
abd4f750 | 280 | |
13485ab5 | 281 | force_sig(SIGSEGV, tsk); |
1da177e4 LT |
282 | return; |
283 | ||
081f75bb | 284 | #ifdef CONFIG_X86_32 |
1da177e4 LT |
285 | gp_in_vm86: |
286 | local_irq_enable(); | |
287 | handle_vm86_fault((struct kernel_vm86_regs *) regs, error_code); | |
288 | return; | |
081f75bb | 289 | #endif |
1da177e4 LT |
290 | |
291 | gp_in_kernel: | |
13485ab5 AH |
292 | if (fixup_exception(regs)) |
293 | return; | |
294 | ||
295 | tsk->thread.error_code = error_code; | |
296 | tsk->thread.trap_no = 13; | |
297 | if (notify_die(DIE_GPF, "general protection fault", regs, | |
1da177e4 | 298 | error_code, 13, SIGSEGV) == NOTIFY_STOP) |
13485ab5 AH |
299 | return; |
300 | die("general protection fault", regs, error_code); | |
1da177e4 LT |
301 | } |
302 | ||
5deb45e3 | 303 | static notrace __kprobes void |
b5964405 | 304 | mem_parity_error(unsigned char reason, struct pt_regs *regs) |
1da177e4 | 305 | { |
b5964405 IM |
306 | printk(KERN_EMERG |
307 | "Uhhuh. NMI received for unknown reason %02x on CPU %d.\n", | |
308 | reason, smp_processor_id()); | |
309 | ||
310 | printk(KERN_EMERG | |
311 | "You have some hardware problem, likely on the PCI bus.\n"); | |
c0d12172 DJ |
312 | |
313 | #if defined(CONFIG_EDAC) | |
b5964405 | 314 | if (edac_handler_set()) { |
c0d12172 DJ |
315 | edac_atomic_assert_error(); |
316 | return; | |
317 | } | |
318 | #endif | |
319 | ||
8da5adda | 320 | if (panic_on_unrecovered_nmi) |
b5964405 | 321 | panic("NMI: Not continuing"); |
1da177e4 | 322 | |
c41c5cd3 | 323 | printk(KERN_EMERG "Dazed and confused, but trying to continue\n"); |
1da177e4 LT |
324 | |
325 | /* Clear and disable the memory parity error line. */ | |
7970479c AH |
326 | reason = (reason & 0xf) | 4; |
327 | outb(reason, 0x61); | |
1da177e4 LT |
328 | } |
329 | ||
5deb45e3 | 330 | static notrace __kprobes void |
b5964405 | 331 | io_check_error(unsigned char reason, struct pt_regs *regs) |
1da177e4 LT |
332 | { |
333 | unsigned long i; | |
334 | ||
9c107805 | 335 | printk(KERN_EMERG "NMI: IOCK error (debug interrupt?)\n"); |
1da177e4 LT |
336 | show_registers(regs); |
337 | ||
5211a242 KG |
338 | if (panic_on_io_nmi) |
339 | panic("NMI IOCK error: Not continuing"); | |
340 | ||
1da177e4 LT |
341 | /* Re-enable the IOCK line, wait for a few seconds */ |
342 | reason = (reason & 0xf) | 8; | |
343 | outb(reason, 0x61); | |
b5964405 | 344 | |
1da177e4 | 345 | i = 2000; |
b5964405 IM |
346 | while (--i) |
347 | udelay(1000); | |
348 | ||
1da177e4 LT |
349 | reason &= ~8; |
350 | outb(reason, 0x61); | |
351 | } | |
352 | ||
5deb45e3 | 353 | static notrace __kprobes void |
b5964405 | 354 | unknown_nmi_error(unsigned char reason, struct pt_regs *regs) |
1da177e4 | 355 | { |
c1d518c8 AH |
356 | if (notify_die(DIE_NMIUNKNOWN, "nmi", regs, reason, 2, SIGINT) == |
357 | NOTIFY_STOP) | |
d3597524 | 358 | return; |
1da177e4 | 359 | #ifdef CONFIG_MCA |
b5964405 IM |
360 | /* |
361 | * Might actually be able to figure out what the guilty party | |
362 | * is: | |
363 | */ | |
364 | if (MCA_bus) { | |
1da177e4 LT |
365 | mca_handle_nmi(); |
366 | return; | |
367 | } | |
368 | #endif | |
b5964405 IM |
369 | printk(KERN_EMERG |
370 | "Uhhuh. NMI received for unknown reason %02x on CPU %d.\n", | |
371 | reason, smp_processor_id()); | |
372 | ||
c41c5cd3 | 373 | printk(KERN_EMERG "Do you have a strange power saving mode enabled?\n"); |
8da5adda | 374 | if (panic_on_unrecovered_nmi) |
b5964405 | 375 | panic("NMI: Not continuing"); |
8da5adda | 376 | |
c41c5cd3 | 377 | printk(KERN_EMERG "Dazed and confused, but trying to continue\n"); |
1da177e4 LT |
378 | } |
379 | ||
5deb45e3 | 380 | static notrace __kprobes void default_do_nmi(struct pt_regs *regs) |
1da177e4 LT |
381 | { |
382 | unsigned char reason = 0; | |
abd34807 AH |
383 | int cpu; |
384 | ||
385 | cpu = smp_processor_id(); | |
1da177e4 | 386 | |
abd34807 AH |
387 | /* Only the BSP gets external NMIs from the system. */ |
388 | if (!cpu) | |
1da177e4 | 389 | reason = get_nmi_reason(); |
b5964405 | 390 | |
1da177e4 | 391 | if (!(reason & 0xc0)) { |
20c0d2d4 | 392 | if (notify_die(DIE_NMI_IPI, "nmi_ipi", regs, reason, 2, SIGINT) |
a8c1be9d | 393 | == NOTIFY_STOP) |
1da177e4 LT |
394 | return; |
395 | #ifdef CONFIG_X86_LOCAL_APIC | |
396 | /* | |
397 | * Ok, so this is none of the documented NMI sources, | |
398 | * so it must be the NMI watchdog. | |
399 | */ | |
3adbbcce | 400 | if (nmi_watchdog_tick(regs, reason)) |
1da177e4 | 401 | return; |
abd34807 | 402 | if (!do_nmi_callback(regs, cpu)) |
3adbbcce | 403 | unknown_nmi_error(reason, regs); |
b5964405 IM |
404 | #else |
405 | unknown_nmi_error(reason, regs); | |
406 | #endif | |
2fbe7b25 | 407 | |
1da177e4 LT |
408 | return; |
409 | } | |
20c0d2d4 | 410 | if (notify_die(DIE_NMI, "nmi", regs, reason, 2, SIGINT) == NOTIFY_STOP) |
1da177e4 | 411 | return; |
a8c1be9d AH |
412 | |
413 | /* AK: following checks seem to be broken on modern chipsets. FIXME */ | |
1da177e4 LT |
414 | if (reason & 0x80) |
415 | mem_parity_error(reason, regs); | |
416 | if (reason & 0x40) | |
417 | io_check_error(reason, regs); | |
081f75bb | 418 | #ifdef CONFIG_X86_32 |
1da177e4 LT |
419 | /* |
420 | * Reassert NMI in case it became active meanwhile | |
b5964405 | 421 | * as it's edge-triggered: |
1da177e4 LT |
422 | */ |
423 | reassert_nmi(); | |
081f75bb | 424 | #endif |
1da177e4 LT |
425 | } |
426 | ||
e407d620 AH |
427 | dotraplinkage notrace __kprobes void |
428 | do_nmi(struct pt_regs *regs, long error_code) | |
1da177e4 | 429 | { |
1da177e4 LT |
430 | nmi_enter(); |
431 | ||
915b0d01 | 432 | inc_irq_stat(__nmi_count); |
1da177e4 | 433 | |
8f4e956b AK |
434 | if (!ignore_nmis) |
435 | default_do_nmi(regs); | |
1da177e4 LT |
436 | |
437 | nmi_exit(); | |
438 | } | |
439 | ||
8f4e956b AK |
440 | void stop_nmi(void) |
441 | { | |
442 | acpi_nmi_disable(); | |
443 | ignore_nmis++; | |
444 | } | |
445 | ||
446 | void restart_nmi(void) | |
447 | { | |
448 | ignore_nmis--; | |
449 | acpi_nmi_enable(); | |
450 | } | |
451 | ||
c1d518c8 | 452 | /* May run on IST stack. */ |
e407d620 | 453 | dotraplinkage void __kprobes do_int3(struct pt_regs *regs, long error_code) |
1da177e4 | 454 | { |
f503b5ae JW |
455 | #ifdef CONFIG_KGDB_LOW_LEVEL_TRAP |
456 | if (kgdb_ll_trap(DIE_INT3, "int3", regs, error_code, 3, SIGTRAP) | |
457 | == NOTIFY_STOP) | |
458 | return; | |
459 | #endif /* CONFIG_KGDB_LOW_LEVEL_TRAP */ | |
b94da1e4 | 460 | #ifdef CONFIG_KPROBES |
1da177e4 LT |
461 | if (notify_die(DIE_INT3, "int3", regs, error_code, 3, SIGTRAP) |
462 | == NOTIFY_STOP) | |
48c88211 | 463 | return; |
b94da1e4 AH |
464 | #else |
465 | if (notify_die(DIE_TRAP, "int3", regs, error_code, 3, SIGTRAP) | |
466 | == NOTIFY_STOP) | |
467 | return; | |
468 | #endif | |
b5964405 | 469 | |
4915a35e | 470 | preempt_conditional_sti(regs); |
3c1326f8 | 471 | do_trap(3, SIGTRAP, "int3", regs, error_code, NULL); |
4915a35e | 472 | preempt_conditional_cli(regs); |
1da177e4 | 473 | } |
1da177e4 | 474 | |
081f75bb | 475 | #ifdef CONFIG_X86_64 |
bd8b96df IM |
476 | /* |
477 | * Help handler running on IST stack to switch back to user stack | |
478 | * for scheduling or signal handling. The actual stack switch is done in | |
479 | * entry.S | |
480 | */ | |
081f75bb AH |
481 | asmlinkage __kprobes struct pt_regs *sync_regs(struct pt_regs *eregs) |
482 | { | |
483 | struct pt_regs *regs = eregs; | |
484 | /* Did already sync */ | |
485 | if (eregs == (struct pt_regs *)eregs->sp) | |
486 | ; | |
487 | /* Exception from user space */ | |
488 | else if (user_mode(eregs)) | |
489 | regs = task_pt_regs(current); | |
bd8b96df IM |
490 | /* |
491 | * Exception from kernel and interrupts are enabled. Move to | |
492 | * kernel process stack. | |
493 | */ | |
081f75bb AH |
494 | else if (eregs->flags & X86_EFLAGS_IF) |
495 | regs = (struct pt_regs *)(eregs->sp -= sizeof(struct pt_regs)); | |
496 | if (eregs != regs) | |
497 | *regs = *eregs; | |
498 | return regs; | |
499 | } | |
500 | #endif | |
501 | ||
1da177e4 LT |
502 | /* |
503 | * Our handling of the processor debug registers is non-trivial. | |
504 | * We do not clear them on entry and exit from the kernel. Therefore | |
505 | * it is possible to get a watchpoint trap here from inside the kernel. | |
506 | * However, the code in ./ptrace.c has ensured that the user can | |
507 | * only set watchpoints on userspace addresses. Therefore the in-kernel | |
508 | * watchpoint trap can only occur in code which is reading/writing | |
509 | * from user space. Such code must not hold kernel locks (since it | |
510 | * can equally take a page fault), therefore it is safe to call | |
511 | * force_sig_info even though that claims and releases locks. | |
b5964405 | 512 | * |
1da177e4 LT |
513 | * Code in ./signal.c ensures that the debug control register |
514 | * is restored before we deliver any signal, and therefore that | |
515 | * user code runs with the correct debug control register even though | |
516 | * we clear it here. | |
517 | * | |
518 | * Being careful here means that we don't have to be as careful in a | |
519 | * lot of more complicated places (task switching can be a bit lazy | |
520 | * about restoring all the debug state, and ptrace doesn't have to | |
521 | * find every occurrence of the TF bit that could be saved away even | |
522 | * by user code) | |
c1d518c8 AH |
523 | * |
524 | * May run on IST stack. | |
1da177e4 | 525 | */ |
e407d620 | 526 | dotraplinkage void __kprobes do_debug(struct pt_regs *regs, long error_code) |
1da177e4 | 527 | { |
1da177e4 | 528 | struct task_struct *tsk = current; |
08d68323 | 529 | unsigned long dr6; |
da654b74 | 530 | int si_code; |
1da177e4 | 531 | |
08d68323 | 532 | get_debugreg(dr6, 6); |
1da177e4 | 533 | |
40f9249a P |
534 | /* Filter out all the reserved bits which are preset to 1 */ |
535 | dr6 &= ~DR6_RESERVED; | |
536 | ||
f8561296 | 537 | /* Catch kmemcheck conditions first of all! */ |
eadb8a09 | 538 | if ((dr6 & DR_STEP) && kmemcheck_trap(regs)) |
f8561296 VN |
539 | return; |
540 | ||
08d68323 P |
541 | /* DR6 may or may not be cleared by the CPU */ |
542 | set_debugreg(0, 6); | |
10faa81e | 543 | |
ea8e61b7 PZ |
544 | /* |
545 | * The processor cleared BTF, so don't mark that we need it set. | |
546 | */ | |
547 | clear_tsk_thread_flag(tsk, TIF_BLOCKSTEP); | |
548 | ||
08d68323 P |
549 | /* Store the virtualized DR6 value */ |
550 | tsk->thread.debugreg6 = dr6; | |
551 | ||
62edab90 P |
552 | if (notify_die(DIE_DEBUG, "debug", regs, PTR_ERR(&dr6), error_code, |
553 | SIGTRAP) == NOTIFY_STOP) | |
1da177e4 | 554 | return; |
3d2a71a5 | 555 | |
1da177e4 | 556 | /* It's safe to allow irq's after DR6 has been saved */ |
3d2a71a5 | 557 | preempt_conditional_sti(regs); |
1da177e4 | 558 | |
08d68323 P |
559 | if (regs->flags & X86_VM_MASK) { |
560 | handle_vm86_trap((struct kernel_vm86_regs *) regs, | |
561 | error_code, 1); | |
562 | return; | |
1da177e4 LT |
563 | } |
564 | ||
1da177e4 | 565 | /* |
08d68323 P |
566 | * Single-stepping through system calls: ignore any exceptions in |
567 | * kernel space, but re-enable TF when returning to user mode. | |
568 | * | |
569 | * We already checked v86 mode above, so we can check for kernel mode | |
570 | * by just checking the CPL of CS. | |
1da177e4 | 571 | */ |
08d68323 P |
572 | if ((dr6 & DR_STEP) && !user_mode(regs)) { |
573 | tsk->thread.debugreg6 &= ~DR_STEP; | |
574 | set_tsk_thread_flag(tsk, TIF_SINGLESTEP); | |
575 | regs->flags &= ~X86_EFLAGS_TF; | |
1da177e4 | 576 | } |
08d68323 P |
577 | si_code = get_si_code(tsk->thread.debugreg6); |
578 | if (tsk->thread.debugreg6 & (DR_STEP | DR_TRAP_BITS)) | |
579 | send_sigtrap(tsk, regs, error_code, si_code); | |
3d2a71a5 | 580 | preempt_conditional_cli(regs); |
1da177e4 | 581 | |
1da177e4 LT |
582 | return; |
583 | } | |
584 | ||
585 | /* | |
586 | * Note that we play around with the 'TS' bit in an attempt to get | |
587 | * the correct behaviour even in the presence of the asynchronous | |
588 | * IRQ13 behaviour | |
589 | */ | |
9b6dba9e | 590 | void math_error(struct pt_regs *regs, int error_code, int trapnr) |
1da177e4 | 591 | { |
e2e75c91 | 592 | struct task_struct *task = current; |
1da177e4 | 593 | siginfo_t info; |
9b6dba9e | 594 | unsigned short err; |
e2e75c91 BG |
595 | char *str = (trapnr == 16) ? "fpu exception" : "simd exception"; |
596 | ||
597 | if (notify_die(DIE_TRAP, str, regs, error_code, trapnr, SIGFPE) == NOTIFY_STOP) | |
598 | return; | |
599 | conditional_sti(regs); | |
600 | ||
601 | if (!user_mode_vm(regs)) | |
602 | { | |
603 | if (!fixup_exception(regs)) { | |
604 | task->thread.error_code = error_code; | |
605 | task->thread.trap_no = trapnr; | |
606 | die(str, regs, error_code); | |
607 | } | |
608 | return; | |
609 | } | |
1da177e4 LT |
610 | |
611 | /* | |
612 | * Save the info for the exception handler and clear the error. | |
613 | */ | |
1da177e4 | 614 | save_init_fpu(task); |
9b6dba9e BG |
615 | task->thread.trap_no = trapnr; |
616 | task->thread.error_code = error_code; | |
1da177e4 LT |
617 | info.si_signo = SIGFPE; |
618 | info.si_errno = 0; | |
9b6dba9e BG |
619 | info.si_addr = (void __user *)regs->ip; |
620 | if (trapnr == 16) { | |
621 | unsigned short cwd, swd; | |
622 | /* | |
623 | * (~cwd & swd) will mask out exceptions that are not set to unmasked | |
624 | * status. 0x3f is the exception bits in these regs, 0x200 is the | |
625 | * C1 reg you need in case of a stack fault, 0x040 is the stack | |
626 | * fault bit. We should only be taking one exception at a time, | |
627 | * so if this combination doesn't produce any single exception, | |
628 | * then we have a bad program that isn't synchronizing its FPU usage | |
629 | * and it will suffer the consequences since we won't be able to | |
630 | * fully reproduce the context of the exception | |
631 | */ | |
632 | cwd = get_fpu_cwd(task); | |
633 | swd = get_fpu_swd(task); | |
adf77bac | 634 | |
9b6dba9e BG |
635 | err = swd & ~cwd; |
636 | } else { | |
637 | /* | |
638 | * The SIMD FPU exceptions are handled a little differently, as there | |
639 | * is only a single status/control register. Thus, to determine which | |
640 | * unmasked exception was caught we must mask the exception mask bits | |
641 | * at 0x1f80, and then use these to mask the exception bits at 0x3f. | |
642 | */ | |
643 | unsigned short mxcsr = get_fpu_mxcsr(task); | |
644 | err = ~(mxcsr >> 7) & mxcsr; | |
645 | } | |
adf77bac PA |
646 | |
647 | if (err & 0x001) { /* Invalid op */ | |
b5964405 IM |
648 | /* |
649 | * swd & 0x240 == 0x040: Stack Underflow | |
650 | * swd & 0x240 == 0x240: Stack Overflow | |
651 | * User must clear the SF bit (0x40) if set | |
652 | */ | |
653 | info.si_code = FPE_FLTINV; | |
adf77bac | 654 | } else if (err & 0x004) { /* Divide by Zero */ |
b5964405 | 655 | info.si_code = FPE_FLTDIV; |
adf77bac | 656 | } else if (err & 0x008) { /* Overflow */ |
b5964405 | 657 | info.si_code = FPE_FLTOVF; |
adf77bac PA |
658 | } else if (err & 0x012) { /* Denormal, Underflow */ |
659 | info.si_code = FPE_FLTUND; | |
660 | } else if (err & 0x020) { /* Precision */ | |
b5964405 | 661 | info.si_code = FPE_FLTRES; |
adf77bac | 662 | } else { |
bd8b96df IM |
663 | /* |
664 | * If we're using IRQ 13, or supposedly even some trap 16 | |
665 | * implementations, it's possible we get a spurious trap... | |
666 | */ | |
a73ad333 | 667 | return; /* Spurious trap, no error */ |
1da177e4 LT |
668 | } |
669 | force_sig_info(SIGFPE, &info, task); | |
670 | } | |
671 | ||
e407d620 | 672 | dotraplinkage void do_coprocessor_error(struct pt_regs *regs, long error_code) |
1da177e4 | 673 | { |
081f75bb | 674 | #ifdef CONFIG_X86_32 |
1da177e4 | 675 | ignore_fpu_irq = 1; |
081f75bb AH |
676 | #endif |
677 | ||
9b6dba9e | 678 | math_error(regs, error_code, 16); |
1da177e4 LT |
679 | } |
680 | ||
e407d620 AH |
681 | dotraplinkage void |
682 | do_simd_coprocessor_error(struct pt_regs *regs, long error_code) | |
1da177e4 | 683 | { |
9b6dba9e | 684 | math_error(regs, error_code, 19); |
1da177e4 LT |
685 | } |
686 | ||
e407d620 AH |
687 | dotraplinkage void |
688 | do_spurious_interrupt_bug(struct pt_regs *regs, long error_code) | |
1da177e4 | 689 | { |
cf81978d | 690 | conditional_sti(regs); |
1da177e4 LT |
691 | #if 0 |
692 | /* No need to warn about this any longer. */ | |
b5964405 | 693 | printk(KERN_INFO "Ignoring P6 Local APIC Spurious Interrupt Bug...\n"); |
1da177e4 LT |
694 | #endif |
695 | } | |
696 | ||
081f75bb | 697 | asmlinkage void __attribute__((weak)) smp_thermal_interrupt(void) |
1da177e4 | 698 | { |
1da177e4 | 699 | } |
4efc0670 | 700 | |
7856f6cc | 701 | asmlinkage void __attribute__((weak)) smp_threshold_interrupt(void) |
081f75bb AH |
702 | { |
703 | } | |
704 | ||
e6e9cac8 JF |
705 | /* |
706 | * __math_state_restore assumes that cr0.TS is already clear and the | |
707 | * fpu state is all ready for use. Used during context switch. | |
708 | */ | |
709 | void __math_state_restore(void) | |
081f75bb | 710 | { |
e6e9cac8 JF |
711 | struct thread_info *thread = current_thread_info(); |
712 | struct task_struct *tsk = thread->task; | |
713 | ||
714 | /* | |
715 | * Paranoid restore. send a SIGSEGV if we fail to restore the state. | |
716 | */ | |
717 | if (unlikely(restore_fpu_checking(tsk))) { | |
718 | stts(); | |
719 | force_sig(SIGSEGV, tsk); | |
720 | return; | |
721 | } | |
722 | ||
723 | thread->status |= TS_USEDFPU; /* So we fnsave on switch_to() */ | |
724 | tsk->fpu_counter++; | |
081f75bb | 725 | } |
1da177e4 LT |
726 | |
727 | /* | |
b5964405 | 728 | * 'math_state_restore()' saves the current math information in the |
1da177e4 LT |
729 | * old math state array, and gets the new ones from the current task |
730 | * | |
731 | * Careful.. There are problems with IBM-designed IRQ13 behaviour. | |
732 | * Don't touch unless you *really* know how it works. | |
733 | * | |
734 | * Must be called with kernel preemption disabled (in this case, | |
735 | * local interrupts are disabled at the call-site in entry.S). | |
736 | */ | |
acc20761 | 737 | asmlinkage void math_state_restore(void) |
1da177e4 LT |
738 | { |
739 | struct thread_info *thread = current_thread_info(); | |
740 | struct task_struct *tsk = thread->task; | |
741 | ||
aa283f49 SS |
742 | if (!tsk_used_math(tsk)) { |
743 | local_irq_enable(); | |
744 | /* | |
745 | * does a slab alloc which can sleep | |
746 | */ | |
747 | if (init_fpu(tsk)) { | |
748 | /* | |
749 | * ran out of memory! | |
750 | */ | |
751 | do_group_exit(SIGKILL); | |
752 | return; | |
753 | } | |
754 | local_irq_disable(); | |
755 | } | |
756 | ||
b5964405 | 757 | clts(); /* Allow maths ops (or we recurse) */ |
fcb2ac5b | 758 | |
e6e9cac8 | 759 | __math_state_restore(); |
1da177e4 | 760 | } |
5992b6da | 761 | EXPORT_SYMBOL_GPL(math_state_restore); |
1da177e4 LT |
762 | |
763 | #ifndef CONFIG_MATH_EMULATION | |
d315760f | 764 | void math_emulate(struct math_emu_info *info) |
1da177e4 | 765 | { |
b5964405 IM |
766 | printk(KERN_EMERG |
767 | "math-emulation not enabled and no coprocessor found.\n"); | |
768 | printk(KERN_EMERG "killing %s.\n", current->comm); | |
769 | force_sig(SIGFPE, current); | |
1da177e4 LT |
770 | schedule(); |
771 | } | |
1da177e4 LT |
772 | #endif /* CONFIG_MATH_EMULATION */ |
773 | ||
e407d620 | 774 | dotraplinkage void __kprobes |
aa78bcfa | 775 | do_device_not_available(struct pt_regs *regs, long error_code) |
7643e9b9 | 776 | { |
081f75bb | 777 | #ifdef CONFIG_X86_32 |
7643e9b9 | 778 | if (read_cr0() & X86_CR0_EM) { |
d315760f TH |
779 | struct math_emu_info info = { }; |
780 | ||
7643e9b9 | 781 | conditional_sti(regs); |
d315760f | 782 | |
aa78bcfa | 783 | info.regs = regs; |
d315760f | 784 | math_emulate(&info); |
7643e9b9 AH |
785 | } else { |
786 | math_state_restore(); /* interrupts still off */ | |
787 | conditional_sti(regs); | |
788 | } | |
081f75bb AH |
789 | #else |
790 | math_state_restore(); | |
791 | #endif | |
7643e9b9 AH |
792 | } |
793 | ||
081f75bb | 794 | #ifdef CONFIG_X86_32 |
e407d620 | 795 | dotraplinkage void do_iret_error(struct pt_regs *regs, long error_code) |
f8e0870f AH |
796 | { |
797 | siginfo_t info; | |
798 | local_irq_enable(); | |
799 | ||
800 | info.si_signo = SIGILL; | |
801 | info.si_errno = 0; | |
802 | info.si_code = ILL_BADSTK; | |
fc6fcdfb | 803 | info.si_addr = NULL; |
f8e0870f AH |
804 | if (notify_die(DIE_TRAP, "iret exception", |
805 | regs, error_code, 32, SIGILL) == NOTIFY_STOP) | |
806 | return; | |
3c1326f8 | 807 | do_trap(32, SIGILL, "iret exception", regs, error_code, &info); |
f8e0870f | 808 | } |
081f75bb | 809 | #endif |
f8e0870f | 810 | |
29c84391 JK |
811 | /* Set of traps needed for early debugging. */ |
812 | void __init early_trap_init(void) | |
813 | { | |
814 | set_intr_gate_ist(1, &debug, DEBUG_STACK); | |
815 | /* int3 can be called from all */ | |
816 | set_system_intr_gate_ist(3, &int3, DEBUG_STACK); | |
817 | set_intr_gate(14, &page_fault); | |
818 | load_idt(&idt_descr); | |
819 | } | |
820 | ||
1da177e4 LT |
821 | void __init trap_init(void) |
822 | { | |
dbeb2be2 RR |
823 | int i; |
824 | ||
1da177e4 | 825 | #ifdef CONFIG_EISA |
927222b1 | 826 | void __iomem *p = early_ioremap(0x0FFFD9, 4); |
b5964405 IM |
827 | |
828 | if (readl(p) == 'E' + ('I'<<8) + ('S'<<16) + ('A'<<24)) | |
1da177e4 | 829 | EISA_bus = 1; |
927222b1 | 830 | early_iounmap(p, 4); |
1da177e4 LT |
831 | #endif |
832 | ||
976382dc | 833 | set_intr_gate(0, ÷_error); |
699d2937 | 834 | set_intr_gate_ist(2, &nmi, NMI_STACK); |
699d2937 AH |
835 | /* int4 can be called from all */ |
836 | set_system_intr_gate(4, &overflow); | |
64f644c0 | 837 | set_intr_gate(5, &bounds); |
12394cf5 | 838 | set_intr_gate(6, &invalid_op); |
7643e9b9 | 839 | set_intr_gate(7, &device_not_available); |
081f75bb | 840 | #ifdef CONFIG_X86_32 |
a8c1be9d | 841 | set_task_gate(8, GDT_ENTRY_DOUBLEFAULT_TSS); |
081f75bb AH |
842 | #else |
843 | set_intr_gate_ist(8, &double_fault, DOUBLEFAULT_STACK); | |
844 | #endif | |
51bc1ed6 | 845 | set_intr_gate(9, &coprocessor_segment_overrun); |
6bf77bf9 | 846 | set_intr_gate(10, &invalid_TSS); |
36d936c7 | 847 | set_intr_gate(11, &segment_not_present); |
699d2937 | 848 | set_intr_gate_ist(12, &stack_segment, STACKFAULT_STACK); |
c6df0d71 | 849 | set_intr_gate(13, &general_protection); |
cf81978d | 850 | set_intr_gate(15, &spurious_interrupt_bug); |
252d28fe | 851 | set_intr_gate(16, &coprocessor_error); |
5feedfd4 | 852 | set_intr_gate(17, &alignment_check); |
1da177e4 | 853 | #ifdef CONFIG_X86_MCE |
699d2937 | 854 | set_intr_gate_ist(18, &machine_check, MCE_STACK); |
1da177e4 | 855 | #endif |
b939bde2 | 856 | set_intr_gate(19, &simd_coprocessor_error); |
1da177e4 | 857 | |
bb3f0b59 YL |
858 | /* Reserve all the builtin and the syscall vector: */ |
859 | for (i = 0; i < FIRST_EXTERNAL_VECTOR; i++) | |
860 | set_bit(i, used_vectors); | |
861 | ||
081f75bb AH |
862 | #ifdef CONFIG_IA32_EMULATION |
863 | set_system_intr_gate(IA32_SYSCALL_VECTOR, ia32_syscall); | |
bb3f0b59 | 864 | set_bit(IA32_SYSCALL_VECTOR, used_vectors); |
081f75bb AH |
865 | #endif |
866 | ||
867 | #ifdef CONFIG_X86_32 | |
d43c6e80 | 868 | if (cpu_has_fxsr) { |
d43c6e80 JB |
869 | printk(KERN_INFO "Enabling fast FPU save and restore... "); |
870 | set_in_cr4(X86_CR4_OSFXSR); | |
871 | printk("done.\n"); | |
872 | } | |
873 | if (cpu_has_xmm) { | |
b5964405 IM |
874 | printk(KERN_INFO |
875 | "Enabling unmasked SIMD FPU exception support... "); | |
d43c6e80 JB |
876 | set_in_cr4(X86_CR4_OSXMMEXCPT); |
877 | printk("done.\n"); | |
878 | } | |
879 | ||
699d2937 | 880 | set_system_trap_gate(SYSCALL_VECTOR, &system_call); |
dbeb2be2 | 881 | set_bit(SYSCALL_VECTOR, used_vectors); |
081f75bb | 882 | #endif |
bb3f0b59 | 883 | |
1da177e4 | 884 | /* |
b5964405 | 885 | * Should be a barrier for any external CPU state: |
1da177e4 LT |
886 | */ |
887 | cpu_init(); | |
888 | ||
428cf902 | 889 | x86_init.irqs.trap_init(); |
1da177e4 | 890 | } |