Commit | Line | Data |
---|---|---|
1da177e4 | 1 | /* |
1da177e4 LT |
2 | * |
3 | * Copyright (C) 1991, 1992 Linus Torvalds | |
4 | * | |
5 | * Enhanced CPU detection and feature setting code by Mike Jagdis | |
6 | * and Martin Mares, November 1997. | |
7 | */ | |
8 | ||
9 | .text | |
1da177e4 | 10 | #include <linux/threads.h> |
8b2f7fff | 11 | #include <linux/init.h> |
1da177e4 LT |
12 | #include <linux/linkage.h> |
13 | #include <asm/segment.h> | |
0341c14d JF |
14 | #include <asm/page_types.h> |
15 | #include <asm/pgtable_types.h> | |
1da177e4 LT |
16 | #include <asm/cache.h> |
17 | #include <asm/thread_info.h> | |
86feeaa8 | 18 | #include <asm/asm-offsets.h> |
1da177e4 | 19 | #include <asm/setup.h> |
551889a6 | 20 | #include <asm/processor-flags.h> |
60a5317f | 21 | #include <asm/percpu.h> |
551889a6 IC |
22 | |
23 | /* Physical address */ | |
24 | #define pa(X) ((X) - __PAGE_OFFSET) | |
1da177e4 LT |
25 | |
26 | /* | |
27 | * References to members of the new_cpu_data structure. | |
28 | */ | |
29 | ||
30 | #define X86 new_cpu_data+CPUINFO_x86 | |
31 | #define X86_VENDOR new_cpu_data+CPUINFO_x86_vendor | |
32 | #define X86_MODEL new_cpu_data+CPUINFO_x86_model | |
33 | #define X86_MASK new_cpu_data+CPUINFO_x86_mask | |
34 | #define X86_HARD_MATH new_cpu_data+CPUINFO_hard_math | |
35 | #define X86_CPUID new_cpu_data+CPUINFO_cpuid_level | |
36 | #define X86_CAPABILITY new_cpu_data+CPUINFO_x86_capability | |
37 | #define X86_VENDOR_ID new_cpu_data+CPUINFO_x86_vendor_id | |
38 | ||
39 | /* | |
c090f532 JF |
40 | * This is how much memory in addition to the memory covered up to |
41 | * and including _end we need mapped initially. | |
9ce8c2ed | 42 | * We need: |
2bd2753f YL |
43 | * (KERNEL_IMAGE_SIZE/4096) / 1024 pages (worst case, non PAE) |
44 | * (KERNEL_IMAGE_SIZE/4096) / 512 + 4 pages (worst case for PAE) | |
1da177e4 LT |
45 | * |
46 | * Modulo rounding, each megabyte assigned here requires a kilobyte of | |
47 | * memory, which is currently unreclaimed. | |
48 | * | |
49 | * This should be a multiple of a page. | |
2bd2753f YL |
50 | * |
51 | * KERNEL_IMAGE_SIZE should be greater than pa(_end) | |
52 | * and small than max_low_pfn, otherwise will waste some page table entries | |
1da177e4 | 53 | */ |
1da177e4 | 54 | |
9ce8c2ed | 55 | #if PTRS_PER_PMD > 1 |
c090f532 | 56 | #define PAGE_TABLE_SIZE(pages) (((pages) / PTRS_PER_PMD) + PTRS_PER_PGD) |
9ce8c2ed | 57 | #else |
c090f532 | 58 | #define PAGE_TABLE_SIZE(pages) ((pages) / PTRS_PER_PGD) |
9ce8c2ed | 59 | #endif |
9ce8c2ed | 60 | |
c090f532 | 61 | /* Enough space to fit pagetables for the low memory linear map */ |
60ac9821 PA |
62 | MAPPING_BEYOND_END = \ |
63 | PAGE_TABLE_SIZE(((1<<32) - __PAGE_OFFSET) >> PAGE_SHIFT) << PAGE_SHIFT | |
c090f532 JF |
64 | |
65 | /* | |
66 | * Worst-case size of the kernel mapping we need to make: | |
67 | * the worst-case size of the kernel itself, plus the extra we need | |
68 | * to map for the linear map. | |
69 | */ | |
70 | KERNEL_PAGES = (KERNEL_IMAGE_SIZE + MAPPING_BEYOND_END)>>PAGE_SHIFT | |
71 | ||
b8a22a62 | 72 | INIT_MAP_SIZE = PAGE_TABLE_SIZE(KERNEL_PAGES) * PAGE_SIZE_asm |
2bd2753f | 73 | RESERVE_BRK(pagetables, INIT_MAP_SIZE) |
796216a5 | 74 | |
1da177e4 LT |
75 | /* |
76 | * 32-bit kernel entrypoint; only used by the boot CPU. On entry, | |
77 | * %esi points to the real-mode code as a 32-bit pointer. | |
78 | * CS and DS must be 4 GB flat segments, but we don't depend on | |
79 | * any particular GDT layout, because we load our own as soon as we | |
80 | * can. | |
81 | */ | |
f8657e1b | 82 | .section .text.head,"ax",@progbits |
1da177e4 | 83 | ENTRY(startup_32) |
a24e7851 RR |
84 | /* test KEEP_SEGMENTS flag to see if the bootloader is asking |
85 | us to not reload segments */ | |
86 | testb $(1<<6), BP_loadflags(%esi) | |
87 | jnz 2f | |
1da177e4 LT |
88 | |
89 | /* | |
90 | * Set segments to known values. | |
91 | */ | |
551889a6 | 92 | lgdt pa(boot_gdt_descr) |
1da177e4 LT |
93 | movl $(__BOOT_DS),%eax |
94 | movl %eax,%ds | |
95 | movl %eax,%es | |
96 | movl %eax,%fs | |
97 | movl %eax,%gs | |
a24e7851 | 98 | 2: |
1da177e4 LT |
99 | |
100 | /* | |
101 | * Clear BSS first so that there are no surprises... | |
1da177e4 | 102 | */ |
a24e7851 | 103 | cld |
1da177e4 | 104 | xorl %eax,%eax |
551889a6 IC |
105 | movl $pa(__bss_start),%edi |
106 | movl $pa(__bss_stop),%ecx | |
1da177e4 LT |
107 | subl %edi,%ecx |
108 | shrl $2,%ecx | |
109 | rep ; stosl | |
484b90c4 VG |
110 | /* |
111 | * Copy bootup parameters out of the way. | |
112 | * Note: %esi still has the pointer to the real-mode data. | |
113 | * With the kexec as boot loader, parameter segment might be loaded beyond | |
114 | * kernel image and might not even be addressable by early boot page tables. | |
115 | * (kexec on panic case). Hence copy out the parameters before initializing | |
116 | * page tables. | |
117 | */ | |
551889a6 | 118 | movl $pa(boot_params),%edi |
484b90c4 VG |
119 | movl $(PARAM_SIZE/4),%ecx |
120 | cld | |
121 | rep | |
122 | movsl | |
551889a6 | 123 | movl pa(boot_params) + NEW_CL_POINTER,%esi |
484b90c4 | 124 | andl %esi,%esi |
fa76dab9 | 125 | jz 1f # No comand line |
551889a6 | 126 | movl $pa(boot_command_line),%edi |
484b90c4 VG |
127 | movl $(COMMAND_LINE_SIZE/4),%ecx |
128 | rep | |
129 | movsl | |
130 | 1: | |
1da177e4 | 131 | |
a24e7851 | 132 | #ifdef CONFIG_PARAVIRT |
551889a6 IC |
133 | /* This is can only trip for a broken bootloader... */ |
134 | cmpw $0x207, pa(boot_params + BP_version) | |
a24e7851 RR |
135 | jb default_entry |
136 | ||
137 | /* Paravirt-compatible boot parameters. Look to see what architecture | |
138 | we're booting under. */ | |
551889a6 | 139 | movl pa(boot_params + BP_hardware_subarch), %eax |
a24e7851 RR |
140 | cmpl $num_subarch_entries, %eax |
141 | jae bad_subarch | |
142 | ||
551889a6 | 143 | movl pa(subarch_entries)(,%eax,4), %eax |
a24e7851 RR |
144 | subl $__PAGE_OFFSET, %eax |
145 | jmp *%eax | |
146 | ||
147 | bad_subarch: | |
148 | WEAK(lguest_entry) | |
149 | WEAK(xen_entry) | |
150 | /* Unknown implementation; there's really | |
151 | nothing we can do at this point. */ | |
152 | ud2a | |
8b2f7fff SR |
153 | |
154 | __INITDATA | |
155 | ||
a24e7851 RR |
156 | subarch_entries: |
157 | .long default_entry /* normal x86/PC */ | |
158 | .long lguest_entry /* lguest hypervisor */ | |
159 | .long xen_entry /* Xen hypervisor */ | |
160 | num_subarch_entries = (. - subarch_entries) / 4 | |
161 | .previous | |
162 | #endif /* CONFIG_PARAVIRT */ | |
163 | ||
1da177e4 LT |
164 | /* |
165 | * Initialize page tables. This creates a PDE and a set of page | |
2bd2753f | 166 | * tables, which are located immediately beyond __brk_base. The variable |
ccf3fe02 | 167 | * _brk_end is set up to point to the first "safe" location. |
1da177e4 | 168 | * Mappings are created both at virtual address 0 (identity mapping) |
2bd2753f | 169 | * and PAGE_OFFSET for up to _end. |
1da177e4 | 170 | * |
551889a6 | 171 | * Note that the stack is not yet set up! |
1da177e4 | 172 | */ |
a24e7851 | 173 | default_entry: |
551889a6 IC |
174 | #ifdef CONFIG_X86_PAE |
175 | ||
176 | /* | |
177 | * In PAE mode swapper_pg_dir is statically defined to contain enough | |
178 | * entries to cover the VMSPLIT option (that is the top 1, 2 or 3 | |
179 | * entries). The identity mapping is handled by pointing two PGD | |
180 | * entries to the first kernel PMD. | |
181 | * | |
182 | * Note the upper half of each PMD or PTE are always zero at | |
183 | * this stage. | |
184 | */ | |
185 | ||
86b2b70e | 186 | #define KPMDS (((-__PAGE_OFFSET) >> 30) & 3) /* Number of kernel PMDs */ |
551889a6 IC |
187 | |
188 | xorl %ebx,%ebx /* %ebx is kept at zero */ | |
189 | ||
ccf3fe02 | 190 | movl $pa(__brk_base), %edi |
551889a6 | 191 | movl $pa(swapper_pg_pmd), %edx |
b2bc2731 | 192 | movl $PTE_IDENT_ATTR, %eax |
551889a6 | 193 | 10: |
b2bc2731 | 194 | leal PDE_IDENT_ATTR(%edi),%ecx /* Create PMD entry */ |
551889a6 IC |
195 | movl %ecx,(%edx) /* Store PMD entry */ |
196 | /* Upper half already zero */ | |
197 | addl $8,%edx | |
198 | movl $512,%ecx | |
199 | 11: | |
200 | stosl | |
201 | xchgl %eax,%ebx | |
202 | stosl | |
203 | xchgl %eax,%ebx | |
204 | addl $0x1000,%eax | |
205 | loop 11b | |
206 | ||
207 | /* | |
c090f532 | 208 | * End condition: we must map up to the end + MAPPING_BEYOND_END. |
551889a6 | 209 | */ |
c090f532 | 210 | movl $pa(_end) + MAPPING_BEYOND_END + PTE_IDENT_ATTR, %ebp |
551889a6 IC |
211 | cmpl %ebp,%eax |
212 | jb 10b | |
213 | 1: | |
ccf3fe02 JF |
214 | addl $__PAGE_OFFSET, %edi |
215 | movl %edi, pa(_brk_end) | |
6af61a76 YL |
216 | shrl $12, %eax |
217 | movl %eax, pa(max_pfn_mapped) | |
551889a6 IC |
218 | |
219 | /* Do early initialization of the fixmap area */ | |
b2bc2731 | 220 | movl $pa(swapper_pg_fixmap)+PDE_IDENT_ATTR,%eax |
551889a6 IC |
221 | movl %eax,pa(swapper_pg_pmd+0x1000*KPMDS-8) |
222 | #else /* Not PAE */ | |
223 | ||
224 | page_pde_offset = (__PAGE_OFFSET >> 20); | |
225 | ||
ccf3fe02 | 226 | movl $pa(__brk_base), %edi |
551889a6 | 227 | movl $pa(swapper_pg_dir), %edx |
b2bc2731 | 228 | movl $PTE_IDENT_ATTR, %eax |
1da177e4 | 229 | 10: |
b2bc2731 | 230 | leal PDE_IDENT_ATTR(%edi),%ecx /* Create PDE entry */ |
1da177e4 LT |
231 | movl %ecx,(%edx) /* Store identity PDE entry */ |
232 | movl %ecx,page_pde_offset(%edx) /* Store kernel PDE entry */ | |
233 | addl $4,%edx | |
234 | movl $1024, %ecx | |
235 | 11: | |
236 | stosl | |
237 | addl $0x1000,%eax | |
238 | loop 11b | |
551889a6 | 239 | /* |
c090f532 | 240 | * End condition: we must map up to the end + MAPPING_BEYOND_END. |
551889a6 | 241 | */ |
c090f532 | 242 | movl $pa(_end) + MAPPING_BEYOND_END + PTE_IDENT_ATTR, %ebp |
1da177e4 LT |
243 | cmpl %ebp,%eax |
244 | jb 10b | |
ccf3fe02 JF |
245 | addl $__PAGE_OFFSET, %edi |
246 | movl %edi, pa(_brk_end) | |
6af61a76 YL |
247 | shrl $12, %eax |
248 | movl %eax, pa(max_pfn_mapped) | |
17d57a92 | 249 | |
551889a6 | 250 | /* Do early initialization of the fixmap area */ |
b2bc2731 | 251 | movl $pa(swapper_pg_fixmap)+PDE_IDENT_ATTR,%eax |
551889a6 IC |
252 | movl %eax,pa(swapper_pg_dir+0xffc) |
253 | #endif | |
1da177e4 | 254 | jmp 3f |
1da177e4 LT |
255 | /* |
256 | * Non-boot CPU entry point; entered from trampoline.S | |
257 | * We can't lgdt here, because lgdt itself uses a data segment, but | |
52de74dd | 258 | * we know the trampoline has already loaded the boot_gdt for us. |
f8657e1b VG |
259 | * |
260 | * If cpu hotplug is not supported then this code can go in init section | |
261 | * which will be freed later | |
1da177e4 | 262 | */ |
f8657e1b | 263 | |
78b89ecd | 264 | __CPUINIT |
f8657e1b VG |
265 | |
266 | #ifdef CONFIG_SMP | |
1da177e4 LT |
267 | ENTRY(startup_32_smp) |
268 | cld | |
269 | movl $(__BOOT_DS),%eax | |
270 | movl %eax,%ds | |
271 | movl %eax,%es | |
272 | movl %eax,%fs | |
273 | movl %eax,%gs | |
5756dd59 IC |
274 | #endif /* CONFIG_SMP */ |
275 | 3: | |
1da177e4 LT |
276 | |
277 | /* | |
278 | * New page tables may be in 4Mbyte page mode and may | |
279 | * be using the global pages. | |
280 | * | |
281 | * NOTE! If we are on a 486 we may have no cr4 at all! | |
282 | * So we do not try to touch it unless we really have | |
283 | * some bits in it to set. This won't work if the BSP | |
284 | * implements cr4 but this AP does not -- very unlikely | |
285 | * but be warned! The same applies to the pse feature | |
286 | * if not equally supported. --macro | |
287 | * | |
288 | * NOTE! We have to correct for the fact that we're | |
289 | * not yet offset PAGE_OFFSET.. | |
290 | */ | |
551889a6 | 291 | #define cr4_bits pa(mmu_cr4_features) |
1da177e4 LT |
292 | movl cr4_bits,%edx |
293 | andl %edx,%edx | |
294 | jz 6f | |
295 | movl %cr4,%eax # Turn on paging options (PSE,PAE,..) | |
296 | orl %edx,%eax | |
297 | movl %eax,%cr4 | |
298 | ||
299 | btl $5, %eax # check if PAE is enabled | |
300 | jnc 6f | |
301 | ||
302 | /* Check if extended functions are implemented */ | |
303 | movl $0x80000000, %eax | |
304 | cpuid | |
305 | cmpl $0x80000000, %eax | |
306 | jbe 6f | |
307 | mov $0x80000001, %eax | |
308 | cpuid | |
309 | /* Execute Disable bit supported? */ | |
310 | btl $20, %edx | |
311 | jnc 6f | |
312 | ||
313 | /* Setup EFER (Extended Feature Enable Register) */ | |
314 | movl $0xc0000080, %ecx | |
315 | rdmsr | |
316 | ||
317 | btsl $11, %eax | |
318 | /* Make changes effective */ | |
319 | wrmsr | |
320 | ||
321 | 6: | |
1da177e4 LT |
322 | |
323 | /* | |
324 | * Enable paging | |
325 | */ | |
551889a6 | 326 | movl $pa(swapper_pg_dir),%eax |
1da177e4 LT |
327 | movl %eax,%cr3 /* set the page table pointer.. */ |
328 | movl %cr0,%eax | |
551889a6 | 329 | orl $X86_CR0_PG,%eax |
1da177e4 LT |
330 | movl %eax,%cr0 /* ..and set paging (PG) bit */ |
331 | ljmp $__BOOT_CS,$1f /* Clear prefetch and normalize %eip */ | |
332 | 1: | |
333 | /* Set up the stack pointer */ | |
334 | lss stack_start,%esp | |
335 | ||
336 | /* | |
337 | * Initialize eflags. Some BIOS's leave bits like NT set. This would | |
338 | * confuse the debugger if this code is traced. | |
339 | * XXX - best to initialize before switching to protected mode. | |
340 | */ | |
341 | pushl $0 | |
342 | popfl | |
343 | ||
344 | #ifdef CONFIG_SMP | |
50359501 | 345 | cmpb $0, ready |
1da177e4 LT |
346 | jz 1f /* Initial CPU cleans BSS */ |
347 | jmp checkCPUtype | |
348 | 1: | |
349 | #endif /* CONFIG_SMP */ | |
350 | ||
351 | /* | |
352 | * start system 32-bit setup. We need to re-do some of the things done | |
353 | * in 16-bit mode for the "real" operations. | |
354 | */ | |
355 | call setup_idt | |
356 | ||
1da177e4 LT |
357 | checkCPUtype: |
358 | ||
359 | movl $-1,X86_CPUID # -1 for no CPUID initially | |
360 | ||
361 | /* check if it is 486 or 386. */ | |
362 | /* | |
363 | * XXX - this does a lot of unnecessary setup. Alignment checks don't | |
364 | * apply at our cpl of 0 and the stack ought to be aligned already, and | |
365 | * we don't need to preserve eflags. | |
366 | */ | |
367 | ||
368 | movb $3,X86 # at least 386 | |
369 | pushfl # push EFLAGS | |
370 | popl %eax # get EFLAGS | |
371 | movl %eax,%ecx # save original EFLAGS | |
372 | xorl $0x240000,%eax # flip AC and ID bits in EFLAGS | |
373 | pushl %eax # copy to EFLAGS | |
374 | popfl # set EFLAGS | |
375 | pushfl # get new EFLAGS | |
376 | popl %eax # put it in eax | |
377 | xorl %ecx,%eax # change in flags | |
378 | pushl %ecx # restore original EFLAGS | |
379 | popfl | |
380 | testl $0x40000,%eax # check if AC bit changed | |
381 | je is386 | |
382 | ||
383 | movb $4,X86 # at least 486 | |
384 | testl $0x200000,%eax # check if ID bit changed | |
385 | je is486 | |
386 | ||
387 | /* get vendor info */ | |
388 | xorl %eax,%eax # call CPUID with 0 -> return vendor ID | |
389 | cpuid | |
390 | movl %eax,X86_CPUID # save CPUID level | |
391 | movl %ebx,X86_VENDOR_ID # lo 4 chars | |
392 | movl %edx,X86_VENDOR_ID+4 # next 4 chars | |
393 | movl %ecx,X86_VENDOR_ID+8 # last 4 chars | |
394 | ||
395 | orl %eax,%eax # do we have processor info as well? | |
396 | je is486 | |
397 | ||
398 | movl $1,%eax # Use the CPUID instruction to get CPU type | |
399 | cpuid | |
400 | movb %al,%cl # save reg for future use | |
401 | andb $0x0f,%ah # mask processor family | |
402 | movb %ah,X86 | |
403 | andb $0xf0,%al # mask model | |
404 | shrb $4,%al | |
405 | movb %al,X86_MODEL | |
406 | andb $0x0f,%cl # mask mask revision | |
407 | movb %cl,X86_MASK | |
408 | movl %edx,X86_CAPABILITY | |
409 | ||
410 | is486: movl $0x50022,%ecx # set AM, WP, NE and MP | |
411 | jmp 2f | |
412 | ||
413 | is386: movl $2,%ecx # set MP | |
414 | 2: movl %cr0,%eax | |
415 | andl $0x80000011,%eax # Save PG,PE,ET | |
416 | orl %ecx,%eax | |
417 | movl %eax,%cr0 | |
418 | ||
419 | call check_x87 | |
2a57ff1a | 420 | lgdt early_gdt_descr |
1da177e4 LT |
421 | lidt idt_descr |
422 | ljmp $(__KERNEL_CS),$1f | |
423 | 1: movl $(__KERNEL_DS),%eax # reload all the segment registers | |
424 | movl %eax,%ss # after changing gdt. | |
425 | ||
426 | movl $(__USER_DS),%eax # DS/ES contains default USER segment | |
427 | movl %eax,%ds | |
428 | movl %eax,%es | |
429 | ||
0dd76d73 BG |
430 | movl $(__KERNEL_PERCPU), %eax |
431 | movl %eax,%fs # set this cpu's percpu | |
432 | ||
60a5317f TH |
433 | #ifdef CONFIG_CC_STACKPROTECTOR |
434 | /* | |
435 | * The linker can't handle this by relocation. Manually set | |
436 | * base address in stack canary segment descriptor. | |
437 | */ | |
438 | cmpb $0,ready | |
439 | jne 1f | |
440 | movl $per_cpu__gdt_page,%eax | |
441 | movl $per_cpu__stack_canary,%ecx | |
442 | movw %cx, 8 * GDT_ENTRY_STACK_CANARY + 2(%eax) | |
443 | shrl $16, %ecx | |
444 | movb %cl, 8 * GDT_ENTRY_STACK_CANARY + 4(%eax) | |
445 | movb %ch, 8 * GDT_ENTRY_STACK_CANARY + 7(%eax) | |
446 | 1: | |
447 | #endif | |
448 | movl $(__KERNEL_STACK_CANARY),%eax | |
464d1a78 | 449 | movl %eax,%gs |
60a5317f TH |
450 | |
451 | xorl %eax,%eax # Clear LDT | |
1da177e4 | 452 | lldt %ax |
f95d47ca | 453 | |
1da177e4 | 454 | cld # gcc2 wants the direction flag cleared at all times |
26fd5e08 | 455 | pushl $0 # fake return address for unwinder |
1da177e4 | 456 | #ifdef CONFIG_SMP |
d92de65c SL |
457 | movb ready, %cl |
458 | movb $1, ready | |
29fe5f3b | 459 | cmpb $0,%cl # the first CPU calls start_kernel |
7c3576d2 | 460 | je 1f |
3e970473 | 461 | movl (stack_start), %esp |
7c3576d2 | 462 | 1: |
1da177e4 | 463 | #endif /* CONFIG_SMP */ |
e3f77edf | 464 | jmp *(initial_code) |
1da177e4 LT |
465 | |
466 | /* | |
467 | * We depend on ET to be correct. This checks for 287/387. | |
468 | */ | |
469 | check_x87: | |
470 | movb $0,X86_HARD_MATH | |
471 | clts | |
472 | fninit | |
473 | fstsw %ax | |
474 | cmpb $0,%al | |
475 | je 1f | |
476 | movl %cr0,%eax /* no coprocessor: have to set bits */ | |
477 | xorl $4,%eax /* set EM */ | |
478 | movl %eax,%cr0 | |
479 | ret | |
480 | ALIGN | |
481 | 1: movb $1,X86_HARD_MATH | |
482 | .byte 0xDB,0xE4 /* fsetpm for 287, ignored by 387 */ | |
483 | ret | |
484 | ||
485 | /* | |
486 | * setup_idt | |
487 | * | |
488 | * sets up a idt with 256 entries pointing to | |
489 | * ignore_int, interrupt gates. It doesn't actually load | |
490 | * idt - that can be done only after paging has been enabled | |
491 | * and the kernel moved to PAGE_OFFSET. Interrupts | |
492 | * are enabled elsewhere, when we can be relatively | |
493 | * sure everything is ok. | |
494 | * | |
495 | * Warning: %esi is live across this function. | |
496 | */ | |
497 | setup_idt: | |
498 | lea ignore_int,%edx | |
499 | movl $(__KERNEL_CS << 16),%eax | |
500 | movw %dx,%ax /* selector = 0x0010 = cs */ | |
501 | movw $0x8E00,%dx /* interrupt gate - dpl=0, present */ | |
502 | ||
503 | lea idt_table,%edi | |
504 | mov $256,%ecx | |
505 | rp_sidt: | |
506 | movl %eax,(%edi) | |
507 | movl %edx,4(%edi) | |
508 | addl $8,%edi | |
509 | dec %ecx | |
510 | jne rp_sidt | |
ec5c0926 CE |
511 | |
512 | .macro set_early_handler handler,trapno | |
513 | lea \handler,%edx | |
514 | movl $(__KERNEL_CS << 16),%eax | |
515 | movw %dx,%ax | |
516 | movw $0x8E00,%dx /* interrupt gate - dpl=0, present */ | |
517 | lea idt_table,%edi | |
518 | movl %eax,8*\trapno(%edi) | |
519 | movl %edx,8*\trapno+4(%edi) | |
520 | .endm | |
521 | ||
522 | set_early_handler handler=early_divide_err,trapno=0 | |
523 | set_early_handler handler=early_illegal_opcode,trapno=6 | |
524 | set_early_handler handler=early_protection_fault,trapno=13 | |
525 | set_early_handler handler=early_page_fault,trapno=14 | |
526 | ||
1da177e4 LT |
527 | ret |
528 | ||
ec5c0926 CE |
529 | early_divide_err: |
530 | xor %edx,%edx | |
531 | pushl $0 /* fake errcode */ | |
532 | jmp early_fault | |
533 | ||
534 | early_illegal_opcode: | |
535 | movl $6,%edx | |
536 | pushl $0 /* fake errcode */ | |
537 | jmp early_fault | |
538 | ||
539 | early_protection_fault: | |
540 | movl $13,%edx | |
541 | jmp early_fault | |
542 | ||
543 | early_page_fault: | |
544 | movl $14,%edx | |
545 | jmp early_fault | |
546 | ||
547 | early_fault: | |
548 | cld | |
549 | #ifdef CONFIG_PRINTK | |
382f64ab | 550 | pusha |
ec5c0926 CE |
551 | movl $(__KERNEL_DS),%eax |
552 | movl %eax,%ds | |
553 | movl %eax,%es | |
554 | cmpl $2,early_recursion_flag | |
555 | je hlt_loop | |
556 | incl early_recursion_flag | |
557 | movl %cr2,%eax | |
558 | pushl %eax | |
559 | pushl %edx /* trapno */ | |
560 | pushl $fault_msg | |
ec5c0926 | 561 | call printk |
ec5c0926 | 562 | #endif |
94878efd | 563 | call dump_stack |
ec5c0926 CE |
564 | hlt_loop: |
565 | hlt | |
566 | jmp hlt_loop | |
567 | ||
1da177e4 LT |
568 | /* This is the default interrupt "handler" :-) */ |
569 | ALIGN | |
570 | ignore_int: | |
571 | cld | |
d59745ce | 572 | #ifdef CONFIG_PRINTK |
1da177e4 LT |
573 | pushl %eax |
574 | pushl %ecx | |
575 | pushl %edx | |
576 | pushl %es | |
577 | pushl %ds | |
578 | movl $(__KERNEL_DS),%eax | |
579 | movl %eax,%ds | |
580 | movl %eax,%es | |
ec5c0926 CE |
581 | cmpl $2,early_recursion_flag |
582 | je hlt_loop | |
583 | incl early_recursion_flag | |
1da177e4 LT |
584 | pushl 16(%esp) |
585 | pushl 24(%esp) | |
586 | pushl 32(%esp) | |
587 | pushl 40(%esp) | |
588 | pushl $int_msg | |
589 | call printk | |
d5e397cb IM |
590 | |
591 | call dump_stack | |
592 | ||
1da177e4 LT |
593 | addl $(5*4),%esp |
594 | popl %ds | |
595 | popl %es | |
596 | popl %edx | |
597 | popl %ecx | |
598 | popl %eax | |
d59745ce | 599 | #endif |
1da177e4 LT |
600 | iret |
601 | ||
0e83815b | 602 | __REFDATA |
583323b9 TG |
603 | .align 4 |
604 | ENTRY(initial_code) | |
605 | .long i386_start_kernel | |
606 | ||
1da177e4 LT |
607 | /* |
608 | * BSS section | |
609 | */ | |
5ead97c8 JF |
610 | .section ".bss.page_aligned","wa" |
611 | .align PAGE_SIZE_asm | |
551889a6 | 612 | #ifdef CONFIG_X86_PAE |
ed2b7e2b | 613 | swapper_pg_pmd: |
551889a6 IC |
614 | .fill 1024*KPMDS,4,0 |
615 | #else | |
1da177e4 LT |
616 | ENTRY(swapper_pg_dir) |
617 | .fill 1024,4,0 | |
551889a6 | 618 | #endif |
aa65af3f | 619 | swapper_pg_fixmap: |
b1c931e3 | 620 | .fill 1024,4,0 |
1da177e4 LT |
621 | ENTRY(empty_zero_page) |
622 | .fill 4096,1,0 | |
2bd2753f | 623 | |
1da177e4 LT |
624 | /* |
625 | * This starts the data section. | |
626 | */ | |
551889a6 IC |
627 | #ifdef CONFIG_X86_PAE |
628 | .section ".data.page_aligned","wa" | |
629 | /* Page-aligned for the benefit of paravirt? */ | |
630 | .align PAGE_SIZE_asm | |
631 | ENTRY(swapper_pg_dir) | |
b2bc2731 | 632 | .long pa(swapper_pg_pmd+PGD_IDENT_ATTR),0 /* low identity map */ |
551889a6 | 633 | # if KPMDS == 3 |
b2bc2731 SS |
634 | .long pa(swapper_pg_pmd+PGD_IDENT_ATTR),0 |
635 | .long pa(swapper_pg_pmd+PGD_IDENT_ATTR+0x1000),0 | |
636 | .long pa(swapper_pg_pmd+PGD_IDENT_ATTR+0x2000),0 | |
551889a6 IC |
637 | # elif KPMDS == 2 |
638 | .long 0,0 | |
b2bc2731 SS |
639 | .long pa(swapper_pg_pmd+PGD_IDENT_ATTR),0 |
640 | .long pa(swapper_pg_pmd+PGD_IDENT_ATTR+0x1000),0 | |
551889a6 IC |
641 | # elif KPMDS == 1 |
642 | .long 0,0 | |
643 | .long 0,0 | |
b2bc2731 | 644 | .long pa(swapper_pg_pmd+PGD_IDENT_ATTR),0 |
551889a6 IC |
645 | # else |
646 | # error "Kernel PMDs should be 1, 2 or 3" | |
647 | # endif | |
648 | .align PAGE_SIZE_asm /* needs to be page-sized too */ | |
649 | #endif | |
650 | ||
1da177e4 | 651 | .data |
1da177e4 LT |
652 | ENTRY(stack_start) |
653 | .long init_thread_union+THREAD_SIZE | |
654 | .long __BOOT_DS | |
655 | ||
656 | ready: .byte 0 | |
657 | ||
ec5c0926 CE |
658 | early_recursion_flag: |
659 | .long 0 | |
660 | ||
1da177e4 | 661 | int_msg: |
d5e397cb | 662 | .asciz "Unknown interrupt or fault at: %p %p %p\n" |
1da177e4 | 663 | |
ec5c0926 | 664 | fault_msg: |
575ca735 VN |
665 | /* fault info: */ |
666 | .ascii "BUG: Int %d: CR2 %p\n" | |
667 | /* pusha regs: */ | |
668 | .ascii " EDI %p ESI %p EBP %p ESP %p\n" | |
669 | .ascii " EBX %p EDX %p ECX %p EAX %p\n" | |
670 | /* fault frame: */ | |
671 | .ascii " err %p EIP %p CS %p flg %p\n" | |
672 | .ascii "Stack: %p %p %p %p %p %p %p %p\n" | |
673 | .ascii " %p %p %p %p %p %p %p %p\n" | |
674 | .asciz " %p %p %p %p %p %p %p %p\n" | |
ec5c0926 | 675 | |
9702785a | 676 | #include "../../x86/xen/xen-head.S" |
5ead97c8 | 677 | |
1da177e4 LT |
678 | /* |
679 | * The IDT and GDT 'descriptors' are a strange 48-bit object | |
680 | * only used by the lidt and lgdt instructions. They are not | |
681 | * like usual segment descriptors - they consist of a 16-bit | |
682 | * segment size, and 32-bit linear address value: | |
683 | */ | |
684 | ||
685 | .globl boot_gdt_descr | |
686 | .globl idt_descr | |
1da177e4 LT |
687 | |
688 | ALIGN | |
689 | # early boot GDT descriptor (must use 1:1 address mapping) | |
690 | .word 0 # 32 bit align gdt_desc.address | |
691 | boot_gdt_descr: | |
692 | .word __BOOT_DS+7 | |
52de74dd | 693 | .long boot_gdt - __PAGE_OFFSET |
1da177e4 LT |
694 | |
695 | .word 0 # 32-bit align idt_desc.address | |
696 | idt_descr: | |
697 | .word IDT_ENTRIES*8-1 # idt contains 256 entries | |
698 | .long idt_table | |
699 | ||
700 | # boot GDT descriptor (later on used by CPU#0): | |
701 | .word 0 # 32 bit align gdt_desc.address | |
2a57ff1a | 702 | ENTRY(early_gdt_descr) |
1da177e4 | 703 | .word GDT_ENTRIES*8-1 |
7a61d35d | 704 | .long per_cpu__gdt_page /* Overwritten for secondary CPUs */ |
1da177e4 | 705 | |
1da177e4 | 706 | /* |
52de74dd | 707 | * The boot_gdt must mirror the equivalent in setup.S and is |
1da177e4 LT |
708 | * used only for booting. |
709 | */ | |
710 | .align L1_CACHE_BYTES | |
52de74dd | 711 | ENTRY(boot_gdt) |
1da177e4 LT |
712 | .fill GDT_ENTRY_BOOT_CS,8,0 |
713 | .quad 0x00cf9a000000ffff /* kernel 4GB code at 0x00000000 */ | |
714 | .quad 0x00cf92000000ffff /* kernel 4GB data at 0x00000000 */ |