Merge remote-tracking branch 'origin/x86/boot' into x86/mm2
[GitHub/mt8127/android_kernel_alcatel_ttab.git] / arch / x86 / kernel / cpu / proc.c
CommitLineData
1da177e4
LT
1#include <linux/smp.h>
2#include <linux/timex.h>
3#include <linux/string.h>
1da177e4 4#include <linux/seq_file.h>
95235ca2 5#include <linux/cpufreq.h>
1da177e4
LT
6
7/*
8 * Get CPU information for use by the procfs.
9 */
a967ceac
HS
10static void show_cpuinfo_core(struct seq_file *m, struct cpuinfo_x86 *c,
11 unsigned int cpu)
12{
327f4387 13#ifdef CONFIG_SMP
a967ceac
HS
14 if (c->x86_max_cores * smp_num_siblings > 1) {
15 seq_printf(m, "physical id\t: %d\n", c->phys_proc_id);
16 seq_printf(m, "siblings\t: %d\n",
35d11680 17 cpumask_weight(cpu_core_mask(cpu)));
a967ceac
HS
18 seq_printf(m, "core id\t\t: %d\n", c->cpu_core_id);
19 seq_printf(m, "cpu cores\t: %d\n", c->booted_cores);
01aaea1a
YL
20 seq_printf(m, "apicid\t\t: %d\n", c->apicid);
21 seq_printf(m, "initial apicid\t: %d\n", c->initial_apicid);
a967ceac
HS
22 }
23#endif
24}
25
327f4387 26#ifdef CONFIG_X86_32
a967ceac
HS
27static void show_cpuinfo_misc(struct seq_file *m, struct cpuinfo_x86 *c)
28{
a967ceac
HS
29 seq_printf(m,
30 "fdiv_bug\t: %s\n"
31 "hlt_bug\t\t: %s\n"
32 "f00f_bug\t: %s\n"
33 "coma_bug\t: %s\n"
34 "fpu\t\t: %s\n"
35 "fpu_exception\t: %s\n"
36 "cpuid level\t: %d\n"
37 "wp\t\t: %s\n",
38 c->fdiv_bug ? "yes" : "no",
39 c->hlt_works_ok ? "no" : "yes",
40 c->f00f_bug ? "yes" : "no",
41 c->coma_bug ? "yes" : "no",
42 c->hard_math ? "yes" : "no",
bc3eba60 43 c->hard_math ? "yes" : "no",
a967ceac
HS
44 c->cpuid_level,
45 c->wp_works_ok ? "yes" : "no");
46}
2aef7720 47#else
2aef7720
HS
48static void show_cpuinfo_misc(struct seq_file *m, struct cpuinfo_x86 *c)
49{
50 seq_printf(m,
51 "fpu\t\t: yes\n"
52 "fpu_exception\t: yes\n"
53 "cpuid level\t: %d\n"
54 "wp\t\t: yes\n",
55 c->cpuid_level);
56}
57#endif
a967ceac 58
1da177e4
LT
59static int show_cpuinfo(struct seq_file *m, void *v)
60{
1da177e4 61 struct cpuinfo_x86 *c = v;
141168c3 62 unsigned int cpu;
a967ceac 63 int i;
1da177e4 64
a967ceac 65 cpu = c->cpu_index;
a967ceac
HS
66 seq_printf(m, "processor\t: %u\n"
67 "vendor_id\t: %s\n"
68 "cpu family\t: %d\n"
69 "model\t\t: %u\n"
70 "model name\t: %s\n",
71 cpu,
72 c->x86_vendor_id[0] ? c->x86_vendor_id : "unknown",
73 c->x86,
74 c->x86_model,
75 c->x86_model_id[0] ? c->x86_model_id : "unknown");
1da177e4
LT
76
77 if (c->x86_mask || c->cpuid_level >= 0)
78 seq_printf(m, "stepping\t: %d\n", c->x86_mask);
79 else
80 seq_printf(m, "stepping\t: unknown\n");
506ed6b5 81 if (c->microcode)
881e23e5 82 seq_printf(m, "microcode\t: 0x%x\n", c->microcode);
1da177e4 83
a967ceac
HS
84 if (cpu_has(c, X86_FEATURE_TSC)) {
85 unsigned int freq = cpufreq_quick_get(cpu);
86
95235ca2
VP
87 if (!freq)
88 freq = cpu_khz;
a3a255e7 89 seq_printf(m, "cpu MHz\t\t: %u.%03u\n",
a967ceac 90 freq / 1000, (freq % 1000));
1da177e4
LT
91 }
92
93 /* Cache size */
94 if (c->x86_cache_size >= 0)
95 seq_printf(m, "cache size\t: %d KB\n", c->x86_cache_size);
a967ceac
HS
96
97 show_cpuinfo_core(m, c, cpu);
98 show_cpuinfo_misc(m, c);
99
100 seq_printf(m, "flags\t\t:");
101 for (i = 0; i < 32*NCAPINTS; i++)
102 if (cpu_has(c, i) && x86_cap_flags[i] != NULL)
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LT
103 seq_printf(m, " %s", x86_cap_flags[i]);
104
f84c3a42
HS
105 seq_printf(m, "\nbogomips\t: %lu.%02lu\n",
106 c->loops_per_jiffy/(500000/HZ),
107 (c->loops_per_jiffy/(5000/HZ)) % 100);
2aef7720
HS
108
109#ifdef CONFIG_X86_64
110 if (c->x86_tlbsize > 0)
111 seq_printf(m, "TLB size\t: %d 4K pages\n", c->x86_tlbsize);
112#endif
f84c3a42 113 seq_printf(m, "clflush size\t: %u\n", c->x86_clflush_size);
2aef7720
HS
114 seq_printf(m, "cache_alignment\t: %d\n", c->x86_cache_alignment);
115 seq_printf(m, "address sizes\t: %u bits physical, %u bits virtual\n",
116 c->x86_phys_bits, c->x86_virt_bits);
f84c3a42
HS
117
118 seq_printf(m, "power management:");
119 for (i = 0; i < 32; i++) {
3f98bc49
AK
120 if (c->x86_power & (1 << i)) {
121 if (i < ARRAY_SIZE(x86_power_flags) &&
122 x86_power_flags[i])
123 seq_printf(m, "%s%s",
8bdbd962 124 x86_power_flags[i][0] ? " " : "",
3f98bc49
AK
125 x86_power_flags[i]);
126 else
127 seq_printf(m, " [%d]", i);
128 }
f84c3a42 129 }
3f98bc49 130
f84c3a42 131 seq_printf(m, "\n\n");
3dd9d514 132
1da177e4
LT
133 return 0;
134}
135
136static void *c_start(struct seq_file *m, loff_t *pos)
137{
dec08a83 138 *pos = cpumask_next(*pos - 1, cpu_online_mask);
bc8bcc79 139 if ((*pos) < nr_cpu_ids)
92cb7612
MT
140 return &cpu_data(*pos);
141 return NULL;
1da177e4 142}
a967ceac 143
1da177e4
LT
144static void *c_next(struct seq_file *m, void *v, loff_t *pos)
145{
bc8bcc79 146 (*pos)++;
1da177e4
LT
147 return c_start(m, pos);
148}
a967ceac 149
1da177e4
LT
150static void c_stop(struct seq_file *m, void *v)
151{
152}
a967ceac 153
8a45eb31 154const struct seq_operations cpuinfo_op = {
1da177e4
LT
155 .start = c_start,
156 .next = c_next,
157 .stop = c_stop,
158 .show = show_cpuinfo,
159};