[GitHub/mt8127/android_kernel_alcatel_ttab.git] / arch / x86 / kernel / cpu / cpufreq / speedstep-ich.c

/*
 * (C) 2001  Dave Jones, Arjan van de ven.
 * (C) 2002 - 2003  Dominik Brodowski <linux@brodo.de>
 *
 *  Licensed under the terms of the GNU GPL License version 2.
 *  Based upon reverse engineered information, and on Intel documentation
 *  for chipsets ICH2-M and ICH3-M.
 *
 *  Many thanks to Ducrot Bruno for finding and fixing the last
 *  "missing link" for ICH2-M/ICH3-M support, and to Thomas Winkler
 *  for extensive testing.
 *
 *  BIG FAT DISCLAIMER: Work in progress code. Possibly *dangerous*
 */


/*********************************************************************
 *                        SPEEDSTEP - DEFINITIONS                    *
 *********************************************************************/

#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/init.h>
#include <linux/cpufreq.h>
#include <linux/pci.h>
#include <linux/slab.h>
#include <linux/sched.h>

#include "speedstep-lib.h"


/* speedstep_chipset:
 *   It is necessary to know which chipset is used. As accesses to
 * this device occur at various places in this module, we need a
 * static struct pci_dev * pointing to that device.
 */
static struct pci_dev *speedstep_chipset_dev;


/* speedstep_processor
 */
static unsigned int speedstep_processor;

static u32 pmbase;

/*
 *   There are only two frequency states for each processor. Values
 * are in kHz for the time being.
 */
static struct cpufreq_frequency_table speedstep_freqs[] = {
	{SPEEDSTEP_HIGH,	0},
	{SPEEDSTEP_LOW,		0},
	{0,			CPUFREQ_TABLE_END},
};


#define dprintk(msg...) cpufreq_debug_printk(CPUFREQ_DEBUG_DRIVER, \
		"speedstep-ich", msg)


/**
 * speedstep_find_register - read the PMBASE address
 *
 * Returns: -ENODEV if no register could be found
 */
static int speedstep_find_register(void)
{
	if (!speedstep_chipset_dev)
		return -ENODEV;

	/* get PMBASE */
	pci_read_config_dword(speedstep_chipset_dev, 0x40, &pmbase);
	if (!(pmbase & 0x01)) {
		printk(KERN_ERR "speedstep-ich: could not find speedstep register\n");
		return -ENODEV;
	}

	pmbase &= 0xFFFFFFFE;
	if (!pmbase) {
		printk(KERN_ERR "speedstep-ich: could not find speedstep register\n");
		return -ENODEV;
	}

	dprintk("pmbase is 0x%x\n", pmbase);
	return 0;
}

/**
 * speedstep_set_state - set the SpeedStep state
 * @state: new processor frequency state (SPEEDSTEP_LOW or SPEEDSTEP_HIGH)
 *
 *   Tries to change the SpeedStep state.  Can be called from
 *   smp_call_function_single.
 */
static void speedstep_set_state(unsigned int state)
{
	u8 pm2_blk;
	u8 value;
	unsigned long flags;

	if (state > 0x1)
		return;

	/* Disable IRQs */
	local_irq_save(flags);

	/* read state */
	value = inb(pmbase + 0x50);

	dprintk("read at pmbase 0x%x + 0x50 returned 0x%x\n", pmbase, value);

	/* write new state */
	value &= 0xFE;
	value |= state;

	dprintk("writing 0x%x to pmbase 0x%x + 0x50\n", value, pmbase);

	/* Disable bus master arbitration */
	pm2_blk = inb(pmbase + 0x20);
	pm2_blk |= 0x01;
	outb(pm2_blk, (pmbase + 0x20));

	/* Actual transition */
	outb(value, (pmbase + 0x50));

	/* Restore bus master arbitration */
	pm2_blk &= 0xfe;
	outb(pm2_blk, (pmbase + 0x20));

	/* check if transition was successful */
	value = inb(pmbase + 0x50);

	/* Enable IRQs */
	local_irq_restore(flags);

	dprintk("read at pmbase 0x%x + 0x50 returned 0x%x\n", pmbase, value);

	if (state == (value & 0x1))
		dprintk("change to %u MHz succeeded\n",
			speedstep_get_frequency(speedstep_processor) / 1000);
	else
		printk(KERN_ERR "cpufreq: change failed - I/O error\n");

	return;
}

/* Wrapper for smp_call_function_single. */
static void _speedstep_set_state(void *_state)
{
	speedstep_set_state(*(unsigned int *)_state);
}

/**
 * speedstep_activate - activate SpeedStep control in the chipset
 *
 *   Tries to activate the SpeedStep status and control registers.
 * Returns -EINVAL on an unsupported chipset, and zero on success.
 */
static int speedstep_activate(void)
{
	u16 value = 0;

	if (!speedstep_chipset_dev)
		return -EINVAL;

	pci_read_config_word(speedstep_chipset_dev, 0x00A0, &value);
	if (!(value & 0x08)) {
		value |= 0x08;
		dprintk("activating SpeedStep (TM) registers\n");
		pci_write_config_word(speedstep_chipset_dev, 0x00A0, value);
	}

	return 0;
}


/**
 * speedstep_detect_chipset - detect the Southbridge which contains SpeedStep logic
 *
 *   Detects ICH2-M, ICH3-M and ICH4-M so far. The pci_dev points to
 * the LPC bridge / PM module which contains all power-management
 * functions. Returns the SPEEDSTEP_CHIPSET_-number for the detected
 * chipset, or zero on failure.
 */
static unsigned int speedstep_detect_chipset(void)
{
	speedstep_chipset_dev = pci_get_subsys(PCI_VENDOR_ID_INTEL,
			      PCI_DEVICE_ID_INTEL_82801DB_12,
			      PCI_ANY_ID, PCI_ANY_ID,
			      NULL);
	if (speedstep_chipset_dev)
		return 4; /* 4-M */

	speedstep_chipset_dev = pci_get_subsys(PCI_VENDOR_ID_INTEL,
			      PCI_DEVICE_ID_INTEL_82801CA_12,
			      PCI_ANY_ID, PCI_ANY_ID,
			      NULL);
	if (speedstep_chipset_dev)
		return 3; /* 3-M */


	speedstep_chipset_dev = pci_get_subsys(PCI_VENDOR_ID_INTEL,
			      PCI_DEVICE_ID_INTEL_82801BA_10,
			      PCI_ANY_ID, PCI_ANY_ID,
			      NULL);
	if (speedstep_chipset_dev) {
		/* speedstep.c causes lockups on Dell Inspirons 8000 and
		 * 8100 which use a pretty old revision of the 82815
		 * host brige. Abort on these systems.
		 */
		static struct pci_dev *hostbridge;

		hostbridge  = pci_get_subsys(PCI_VENDOR_ID_INTEL,
			      PCI_DEVICE_ID_INTEL_82815_MC,
			      PCI_ANY_ID, PCI_ANY_ID,
			      NULL);

		if (!hostbridge)
			return 2; /* 2-M */

		if (hostbridge->revision < 5) {
			dprintk("hostbridge does not support speedstep\n");
			speedstep_chipset_dev = NULL;
			pci_dev_put(hostbridge);
			return 0;
		}

		pci_dev_put(hostbridge);
		return 2; /* 2-M */
	}

	return 0;
}

static void get_freq_data(void *_speed)
{
	unsigned int *speed = _speed;

	*speed = speedstep_get_frequency(speedstep_processor);
}

static unsigned int speedstep_get(unsigned int cpu)
{
	unsigned int speed;

	/* You're supposed to ensure CPU is online. */
	if (smp_call_function_single(cpu, get_freq_data, &speed, 1) != 0)
		BUG();

	dprintk("detected %u kHz as current frequency\n", speed);
	return speed;
}

/**
 * speedstep_target - set a new CPUFreq policy
 * @policy: new policy
 * @target_freq: the target frequency
 * @relation: how that frequency relates to achieved frequency
 *	(CPUFREQ_RELATION_L or CPUFREQ_RELATION_H)
 *
 * Sets a new CPUFreq policy.
 */
static int speedstep_target(struct cpufreq_policy *policy,
			     unsigned int target_freq,
			     unsigned int relation)
{
	unsigned int newstate = 0, policy_cpu;
	struct cpufreq_freqs freqs;
	int i;

	if (cpufreq_frequency_table_target(policy, &speedstep_freqs[0],
				target_freq, relation, &newstate))
		return -EINVAL;

	policy_cpu = cpumask_any_and(policy->cpus, cpu_online_mask);
	freqs.old = speedstep_get(policy_cpu);
	freqs.new = speedstep_freqs[newstate].frequency;
	freqs.cpu = policy->cpu;

	dprintk("transiting from %u to %u kHz\n", freqs.old, freqs.new);

	/* no transition necessary */
	if (freqs.old == freqs.new)
		return 0;

	for_each_cpu(i, policy->cpus) {
		freqs.cpu = i;
		cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE);
	}

	smp_call_function_single(policy_cpu, _speedstep_set_state, &newstate,
				 true);

	for_each_cpu(i, policy->cpus) {
		freqs.cpu = i;
		cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE);
	}

	return 0;
}


/**
 * speedstep_verify - verifies a new CPUFreq policy
 * @policy: new policy
 *
 * Limit must be within speedstep_low_freq and speedstep_high_freq, with
 * at least one border included.
 */
static int speedstep_verify(struct cpufreq_policy *policy)
{
	return cpufreq_frequency_table_verify(policy, &speedstep_freqs[0]);
}

struct get_freqs {
	struct cpufreq_policy *policy;
	int ret;
};

static void get_freqs_on_cpu(void *_get_freqs)
{
	struct get_freqs *get_freqs = _get_freqs;

	get_freqs->ret =
		speedstep_get_freqs(speedstep_processor,
			    &speedstep_freqs[SPEEDSTEP_LOW].frequency,
			    &speedstep_freqs[SPEEDSTEP_HIGH].frequency,
			    &get_freqs->policy->cpuinfo.transition_latency,
			    &speedstep_set_state);
}

static int speedstep_cpu_init(struct cpufreq_policy *policy)
{
	int result;
	unsigned int policy_cpu, speed;
	struct get_freqs gf;

	/* only run on CPU to be set, or on its sibling */
#ifdef CONFIG_SMP
	cpumask_copy(policy->cpus, cpu_sibling_mask(policy->cpu));
#endif
	policy_cpu = cpumask_any_and(policy->cpus, cpu_online_mask);

	/* detect low and high frequency and transition latency */
	gf.policy = policy;
	smp_call_function_single(policy_cpu, get_freqs_on_cpu, &gf, 1);
	if (gf.ret)
		return gf.ret;

	/* get current speed setting */
	speed = speedstep_get(policy_cpu);
	if (!speed)
		return -EIO;

	dprintk("currently at %s speed setting - %i MHz\n",
		(speed == speedstep_freqs[SPEEDSTEP_LOW].frequency)
		? "low" : "high",
		(speed / 1000));

	/* cpuinfo and default policy values */
	policy->cur = speed;

	result = cpufreq_frequency_table_cpuinfo(policy, speedstep_freqs);
	if (result)
		return result;

	cpufreq_frequency_table_get_attr(speedstep_freqs, policy->cpu);

	return 0;
}


static int speedstep_cpu_exit(struct cpufreq_policy *policy)
{
	cpufreq_frequency_table_put_attr(policy->cpu);
	return 0;
}

static struct freq_attr *speedstep_attr[] = {
	&cpufreq_freq_attr_scaling_available_freqs,
	NULL,
};


static struct cpufreq_driver speedstep_driver = {
	.name	= "speedstep-ich",
	.verify	= speedstep_verify,
	.target	= speedstep_target,
	.init	= speedstep_cpu_init,
	.exit	= speedstep_cpu_exit,
	.get	= speedstep_get,
	.owner	= THIS_MODULE,
	.attr	= speedstep_attr,
};


/**
 * speedstep_init - initializes the SpeedStep CPUFreq driver
 *
 *   Initializes the SpeedStep support. Returns -ENODEV on unsupported
 * devices, -EINVAL on problems during initiatization, and zero on
 * success.
 */
static int __init speedstep_init(void)
{
	/* detect processor */
	speedstep_processor = speedstep_detect_processor();
	if (!speedstep_processor) {
		dprintk("Intel(R) SpeedStep(TM) capable processor "
				"not found\n");
		return -ENODEV;
	}

	/* detect chipset */
	if (!speedstep_detect_chipset()) {
		dprintk("Intel(R) SpeedStep(TM) for this chipset not "
				"(yet) available.\n");
		return -ENODEV;
	}

	/* activate speedstep support */
	if (speedstep_activate()) {
		pci_dev_put(speedstep_chipset_dev);
		return -EINVAL;
	}

	if (speedstep_find_register())
		return -ENODEV;

	return cpufreq_register_driver(&speedstep_driver);
}


/**
 * speedstep_exit - unregisters SpeedStep support
 *
 *   Unregisters SpeedStep support.
 */
static void __exit speedstep_exit(void)
{
	pci_dev_put(speedstep_chipset_dev);
	cpufreq_unregister_driver(&speedstep_driver);
}


MODULE_AUTHOR("Dave Jones <davej@redhat.com>, "
		"Dominik Brodowski <linux@brodo.de>");
MODULE_DESCRIPTION("Speedstep driver for Intel mobile processors on chipsets "
		"with ICH-M southbridges.");
MODULE_LICENSE("GPL");

module_init(speedstep_init);
module_exit(speedstep_exit);
Commit	Line	Data
1da177e4 LT	1	/*
	2	* (C) 2001 Dave Jones, Arjan van de ven.
	3	* (C) 2002 - 2003 Dominik Brodowski <linux@brodo.de>
	4	*
	5	* Licensed under the terms of the GNU GPL License version 2.
	6	* Based upon reverse engineered information, and on Intel documentation
	7	* for chipsets ICH2-M and ICH3-M.
	8	*
	9	* Many thanks to Ducrot Bruno for finding and fixing the last
	10	* "missing link" for ICH2-M/ICH3-M support, and to Thomas Winkler
	11	* for extensive testing.
	12	*
	13	* BIG FAT DISCLAIMER: Work in progress code. Possibly dangerous
	14	*/
	15
	16
	17	/*********************************************************************
	18	* SPEEDSTEP - DEFINITIONS *
	19	*********************************************************************/
	20
	21	#include <linux/kernel.h>
	22	#include <linux/module.h>
	23	#include <linux/init.h>
	24	#include <linux/cpufreq.h>
	25	#include <linux/pci.h>
	26	#include <linux/slab.h>
e8edc6e0	27	#include <linux/sched.h>
1da177e4 LT	28
	29	#include "speedstep-lib.h"
	30
	31
	32	/* speedstep_chipset:
	33	* It is necessary to know which chipset is used. As accesses to
	34	* this device occur at various places in this module, we need a
	35	* static struct pci_dev * pointing to that device.
	36	*/
	37	static struct pci_dev *speedstep_chipset_dev;
	38
	39
	40	/* speedstep_processor
	41	*/
bbfebd66	42	static unsigned int speedstep_processor;
1da177e4	43
9a7d82a8	44	static u32 pmbase;
1da177e4 LT	45
	46	/*
	47	* There are only two frequency states for each processor. Values
	48	* are in kHz for the time being.
	49	*/
	50	static struct cpufreq_frequency_table speedstep_freqs[] = {
	51	{SPEEDSTEP_HIGH, 0},
	52	{SPEEDSTEP_LOW, 0},
	53	{0, CPUFREQ_TABLE_END},
	54	};
	55
	56
bbfebd66 DJ	57	#define dprintk(msg...) cpufreq_debug_printk(CPUFREQ_DEBUG_DRIVER, \
bbfebd66 DJ	58	"speedstep-ich", msg)
1da177e4 LT	59
	60
	61	/**
9a7d82a8	62	* speedstep_find_register - read the PMBASE address
1da177e4	63	*
9a7d82a8	64	* Returns: -ENODEV if no register could be found
1da177e4	65	*/
bbfebd66	66	static int speedstep_find_register(void)
1da177e4	67	{
9a7d82a8 MD	68	if (!speedstep_chipset_dev)
9a7d82a8 MD	69	return -ENODEV;
1da177e4 LT	70
	71	/* get PMBASE */
	72	pci_read_config_dword(speedstep_chipset_dev, 0x40, &pmbase);
	73	if (!(pmbase & 0x01)) {
	74	printk(KERN_ERR "speedstep-ich: could not find speedstep register\n");
9a7d82a8	75	return -ENODEV;
1da177e4 LT	76	}
	77
	78	pmbase &= 0xFFFFFFFE;
	79	if (!pmbase) {
	80	printk(KERN_ERR "speedstep-ich: could not find speedstep register\n");
9a7d82a8	81	return -ENODEV;
1da177e4 LT	82	}
1da177e4 LT	83
9a7d82a8 MD	84	dprintk("pmbase is 0x%x\n", pmbase);
	85	return 0;
	86	}
	87
	88	/**
	89	* speedstep_set_state - set the SpeedStep state
	90	* @state: new processor frequency state (SPEEDSTEP_LOW or SPEEDSTEP_HIGH)
	91	*
394122ab RR	92	* Tries to change the SpeedStep state. Can be called from
394122ab RR	93	* smp_call_function_single.
9a7d82a8	94	*/
bbfebd66	95	static void speedstep_set_state(unsigned int state)
9a7d82a8 MD	96	{
	97	u8 pm2_blk;
	98	u8 value;
	99	unsigned long flags;
	100
	101	if (state > 0x1)
	102	return;
	103
1da177e4 LT	104	/* Disable IRQs */
	105	local_irq_save(flags);
	106
	107	/* read state */
	108	value = inb(pmbase + 0x50);
	109
	110	dprintk("read at pmbase 0x%x + 0x50 returned 0x%x\n", pmbase, value);
	111
	112	/* write new state */
	113	value &= 0xFE;
	114	value \|= state;
	115
	116	dprintk("writing 0x%x to pmbase 0x%x + 0x50\n", value, pmbase);
	117
	118	/* Disable bus master arbitration */
	119	pm2_blk = inb(pmbase + 0x20);
	120	pm2_blk \|= 0x01;
	121	outb(pm2_blk, (pmbase + 0x20));
	122
	123	/* Actual transition */
	124	outb(value, (pmbase + 0x50));
	125
	126	/* Restore bus master arbitration */
	127	pm2_blk &= 0xfe;
	128	outb(pm2_blk, (pmbase + 0x20));
	129
	130	/* check if transition was successful */
	131	value = inb(pmbase + 0x50);
	132
	133	/* Enable IRQs */
	134	local_irq_restore(flags);
	135
	136	dprintk("read at pmbase 0x%x + 0x50 returned 0x%x\n", pmbase, value);
	137
bbfebd66 DJ	138	if (state == (value & 0x1))
	139	dprintk("change to %u MHz succeeded\n",
	140	speedstep_get_frequency(speedstep_processor) / 1000);
	141	else
	142	printk(KERN_ERR "cpufreq: change failed - I/O error\n");
1da177e4 LT	143
	144	return;
	145	}
	146
394122ab RR	147	/* Wrapper for smp_call_function_single. */
	148	static void _speedstep_set_state(void *_state)
	149	{
	150	speedstep_set_state((unsigned int )_state);
	151	}
1da177e4 LT	152
	153	/**
	154	* speedstep_activate - activate SpeedStep control in the chipset
	155	*
	156	* Tries to activate the SpeedStep status and control registers.
	157	* Returns -EINVAL on an unsupported chipset, and zero on success.
	158	*/
bbfebd66	159	static int speedstep_activate(void)
1da177e4 LT	160	{
	161	u16 value = 0;
	162
	163	if (!speedstep_chipset_dev)
	164	return -EINVAL;
	165
	166	pci_read_config_word(speedstep_chipset_dev, 0x00A0, &value);
	167	if (!(value & 0x08)) {
	168	value \|= 0x08;
	169	dprintk("activating SpeedStep (TM) registers\n");
	170	pci_write_config_word(speedstep_chipset_dev, 0x00A0, value);
	171	}
	172
	173	return 0;
	174	}
	175
	176
	177	/**
	178	* speedstep_detect_chipset - detect the Southbridge which contains SpeedStep logic
	179	*
	180	* Detects ICH2-M, ICH3-M and ICH4-M so far. The pci_dev points to
	181	* the LPC bridge / PM module which contains all power-management
	182	* functions. Returns the SPEEDSTEP_CHIPSET_-number for the detected
	183	* chipset, or zero on failure.
	184	*/
bbfebd66	185	static unsigned int speedstep_detect_chipset(void)
1da177e4 LT	186	{
	187	speedstep_chipset_dev = pci_get_subsys(PCI_VENDOR_ID_INTEL,
	188	PCI_DEVICE_ID_INTEL_82801DB_12,
bbfebd66	189	PCI_ANY_ID, PCI_ANY_ID,
1da177e4 LT	190	NULL);
	191	if (speedstep_chipset_dev)
	192	return 4; /* 4-M */
	193
	194	speedstep_chipset_dev = pci_get_subsys(PCI_VENDOR_ID_INTEL,
	195	PCI_DEVICE_ID_INTEL_82801CA_12,
bbfebd66	196	PCI_ANY_ID, PCI_ANY_ID,
1da177e4 LT	197	NULL);
	198	if (speedstep_chipset_dev)
	199	return 3; /* 3-M */
	200
	201
	202	speedstep_chipset_dev = pci_get_subsys(PCI_VENDOR_ID_INTEL,
	203	PCI_DEVICE_ID_INTEL_82801BA_10,
bbfebd66	204	PCI_ANY_ID, PCI_ANY_ID,
1da177e4 LT	205	NULL);
	206	if (speedstep_chipset_dev) {
	207	/* speedstep.c causes lockups on Dell Inspirons 8000 and
	208	* 8100 which use a pretty old revision of the 82815
	209	* host brige. Abort on these systems.
	210	*/
	211	static struct pci_dev *hostbridge;
1da177e4 LT	212
	213	hostbridge = pci_get_subsys(PCI_VENDOR_ID_INTEL,
	214	PCI_DEVICE_ID_INTEL_82815_MC,
bbfebd66	215	PCI_ANY_ID, PCI_ANY_ID,
1da177e4 LT	216	NULL);
	217
	218	if (!hostbridge)
	219	return 2; /* 2-M */
	220
44c10138	221	if (hostbridge->revision < 5) {
1da177e4 LT	222	dprintk("hostbridge does not support speedstep\n");
	223	speedstep_chipset_dev = NULL;
	224	pci_dev_put(hostbridge);
	225	return 0;
	226	}
	227
	228	pci_dev_put(hostbridge);
	229	return 2; /* 2-M */
	230	}
	231
	232	return 0;
	233	}
	234
8dca15e4	235	static void get_freq_data(void *_speed)
394122ab	236	{
8dca15e4	237	unsigned int *speed = _speed;
394122ab	238
8dca15e4	239	*speed = speedstep_get_frequency(speedstep_processor);
1da177e4 LT	240	}
	241
	242	static unsigned int speedstep_get(unsigned int cpu)
	243	{
8dca15e4	244	unsigned int speed;
394122ab RR	245
394122ab RR	246	/* You're supposed to ensure CPU is online. */
8dca15e4	247	if (smp_call_function_single(cpu, get_freq_data, &speed, 1) != 0)
394122ab RR	248	BUG();
394122ab RR	249
8dca15e4 RR	250	dprintk("detected %u kHz as current frequency\n", speed);
8dca15e4 RR	251	return speed;
1da177e4 LT	252	}
	253
	254	/**
	255	* speedstep_target - set a new CPUFreq policy
	256	* @policy: new policy
	257	* @target_freq: the target frequency
bbfebd66 DJ	258	* @relation: how that frequency relates to achieved frequency
bbfebd66 DJ	259	* (CPUFREQ_RELATION_L or CPUFREQ_RELATION_H)
1da177e4 LT	260	*
	261	* Sets a new CPUFreq policy.
	262	*/
bbfebd66	263	static int speedstep_target(struct cpufreq_policy *policy,
1da177e4 LT	264	unsigned int target_freq,
	265	unsigned int relation)
	266	{
394122ab	267	unsigned int newstate = 0, policy_cpu;
1da177e4	268	struct cpufreq_freqs freqs;
1da177e4 LT	269	int i;
1da177e4 LT	270
bbfebd66 DJ	271	if (cpufreq_frequency_table_target(policy, &speedstep_freqs[0],
bbfebd66 DJ	272	target_freq, relation, &newstate))
1da177e4 LT	273	return -EINVAL;
1da177e4 LT	274
394122ab RR	275	policy_cpu = cpumask_any_and(policy->cpus, cpu_online_mask);
394122ab RR	276	freqs.old = speedstep_get(policy_cpu);
1da177e4 LT	277	freqs.new = speedstep_freqs[newstate].frequency;
	278	freqs.cpu = policy->cpu;
	279
	280	dprintk("transiting from %u to %u kHz\n", freqs.old, freqs.new);
	281
	282	/* no transition necessary */
	283	if (freqs.old == freqs.new)
	284	return 0;
	285
835481d9	286	for_each_cpu(i, policy->cpus) {
1da177e4 LT	287	freqs.cpu = i;
	288	cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE);
	289	}
	290
394122ab RR	291	smp_call_function_single(policy_cpu, _speedstep_set_state, &newstate,
394122ab RR	292	true);
1da177e4	293
835481d9	294	for_each_cpu(i, policy->cpus) {
1da177e4 LT	295	freqs.cpu = i;
	296	cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE);
	297	}
	298
	299	return 0;
	300	}
	301
	302
	303	/**
	304	* speedstep_verify - verifies a new CPUFreq policy
	305	* @policy: new policy
	306	*
	307	* Limit must be within speedstep_low_freq and speedstep_high_freq, with
	308	* at least one border included.
	309	*/
bbfebd66	310	static int speedstep_verify(struct cpufreq_policy *policy)
1da177e4 LT	311	{
	312	return cpufreq_frequency_table_verify(policy, &speedstep_freqs[0]);
	313	}
	314
394122ab RR	315	struct get_freqs {
	316	struct cpufreq_policy *policy;
	317	int ret;
	318	};
	319
	320	static void get_freqs_on_cpu(void *_get_freqs)
	321	{
	322	struct get_freqs *get_freqs = _get_freqs;
	323
	324	get_freqs->ret =
	325	speedstep_get_freqs(speedstep_processor,
	326	&speedstep_freqs[SPEEDSTEP_LOW].frequency,
	327	&speedstep_freqs[SPEEDSTEP_HIGH].frequency,
	328	&get_freqs->policy->cpuinfo.transition_latency,
	329	&speedstep_set_state);
	330	}
1da177e4 LT	331
	332	static int speedstep_cpu_init(struct cpufreq_policy *policy)
	333	{
394122ab RR	334	int result;
	335	unsigned int policy_cpu, speed;
	336	struct get_freqs gf;
1da177e4 LT	337
	338	/* only run on CPU to be set, or on its sibling */
	339	#ifdef CONFIG_SMP
7ad728f9	340	cpumask_copy(policy->cpus, cpu_sibling_mask(policy->cpu));
1da177e4	341	#endif
394122ab	342	policy_cpu = cpumask_any_and(policy->cpus, cpu_online_mask);
1da177e4	343
1a10760c	344	/* detect low and high frequency and transition latency */
394122ab RR	345	gf.policy = policy;
	346	smp_call_function_single(policy_cpu, get_freqs_on_cpu, &gf, 1);
	347	if (gf.ret)
	348	return gf.ret;
1da177e4 LT	349
1da177e4 LT	350	/* get current speed setting */
394122ab	351	speed = speedstep_get(policy_cpu);
1da177e4 LT	352	if (!speed)
	353	return -EIO;
	354
	355	dprintk("currently at %s speed setting - %i MHz\n",
bbfebd66 DJ	356	(speed == speedstep_freqs[SPEEDSTEP_LOW].frequency)
bbfebd66 DJ	357	? "low" : "high",
1da177e4 LT	358	(speed / 1000));
	359
	360	/* cpuinfo and default policy values */
1da177e4 LT	361	policy->cur = speed;
	362
	363	result = cpufreq_frequency_table_cpuinfo(policy, speedstep_freqs);
	364	if (result)
bbfebd66	365	return result;
1da177e4	366
bbfebd66	367	cpufreq_frequency_table_get_attr(speedstep_freqs, policy->cpu);
1da177e4 LT	368
	369	return 0;
	370	}
	371
	372
	373	static int speedstep_cpu_exit(struct cpufreq_policy *policy)
	374	{
	375	cpufreq_frequency_table_put_attr(policy->cpu);
	376	return 0;
	377	}
	378
bbfebd66	379	static struct freq_attr *speedstep_attr[] = {
1da177e4 LT	380	&cpufreq_freq_attr_scaling_available_freqs,
	381	NULL,
	382	};
	383
	384
221dee28	385	static struct cpufreq_driver speedstep_driver = {
1da177e4 LT	386	.name = "speedstep-ich",
	387	.verify = speedstep_verify,
	388	.target = speedstep_target,
	389	.init = speedstep_cpu_init,
	390	.exit = speedstep_cpu_exit,
	391	.get = speedstep_get,
	392	.owner = THIS_MODULE,
	393	.attr = speedstep_attr,
	394	};
	395
	396
	397	/**
	398	* speedstep_init - initializes the SpeedStep CPUFreq driver
	399	*
	400	* Initializes the SpeedStep support. Returns -ENODEV on unsupported
	401	* devices, -EINVAL on problems during initiatization, and zero on
	402	* success.
	403	*/
	404	static int __init speedstep_init(void)
	405	{
	406	/* detect processor */
	407	speedstep_processor = speedstep_detect_processor();
	408	if (!speedstep_processor) {
bbfebd66 DJ	409	dprintk("Intel(R) SpeedStep(TM) capable processor "
bbfebd66 DJ	410	"not found\n");
1da177e4 LT	411	return -ENODEV;
	412	}
	413
	414	/* detect chipset */
	415	if (!speedstep_detect_chipset()) {
bbfebd66 DJ	416	dprintk("Intel(R) SpeedStep(TM) for this chipset not "
bbfebd66 DJ	417	"(yet) available.\n");
1da177e4 LT	418	return -ENODEV;
	419	}
	420
	421	/* activate speedstep support */
	422	if (speedstep_activate()) {
	423	pci_dev_put(speedstep_chipset_dev);
	424	return -EINVAL;
	425	}
	426
9a7d82a8 MD	427	if (speedstep_find_register())
	428	return -ENODEV;
	429
1da177e4 LT	430	return cpufreq_register_driver(&speedstep_driver);
	431	}
	432
	433
	434	/**
	435	* speedstep_exit - unregisters SpeedStep support
	436	*
	437	* Unregisters SpeedStep support.
	438	*/
	439	static void __exit speedstep_exit(void)
	440	{
	441	pci_dev_put(speedstep_chipset_dev);
	442	cpufreq_unregister_driver(&speedstep_driver);
	443	}
	444
	445
bbfebd66 DJ	446	MODULE_AUTHOR("Dave Jones <davej@redhat.com>, "
	447	"Dominik Brodowski <linux@brodo.de>");
	448	MODULE_DESCRIPTION("Speedstep driver for Intel mobile processors on chipsets "
	449	"with ICH-M southbridges.");
	450	MODULE_LICENSE("GPL");
1da177e4 LT	451
	452	module_init(speedstep_init);
	453	module_exit(speedstep_exit);