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KVM: x86: Add KVM_GET/SET_VCPU_EVENTS
[GitHub/mt8127/android_kernel_alcatel_ttab.git] / arch / x86 / include / asm / kvm_host.h
CommitLineData
a656c8ef 1/*
043405e1
CO		 2 * Kernel-based Virtual Machine driver for Linux
3 *
4 * This header defines architecture specific interfaces, x86 version
5 *
6 * This work is licensed under the terms of the GNU GPL, version 2. See
7 * the COPYING file in the top-level directory.
8 *
9 */
10
1965aae3
PA		 11#ifndef _ASM_X86_KVM_HOST_H
12#define _ASM_X86_KVM_HOST_H
043405e1 13
34c16eec
ZX		 14#include <linux/types.h>
15#include <linux/mm.h>
e930bffe 16#include <linux/mmu_notifier.h>
229456fc 17#include <linux/tracepoint.h>
34c16eec
ZX		 18
19#include <linux/kvm.h>
20#include <linux/kvm_para.h>
edf88417 21#include <linux/kvm_types.h>
34c16eec 22
50d0a0f9 23#include <asm/pvclock-abi.h>
e01a1b57 24#include <asm/desc.h>
0bed3b56 25#include <asm/mtrr.h>
9962d032 26#include <asm/msr-index.h>
e01a1b57 27
69a9f69b
AK		 28#define KVM_MAX_VCPUS 16
29#define KVM_MEMORY_SLOTS 32
30/* memory slots that does not exposed to userspace */
31#define KVM_PRIVATE_MEM_SLOTS 4
32
33#define KVM_PIO_PAGE_OFFSET 1
542472b5 34#define KVM_COALESCED_MMIO_PAGE_OFFSET 2
69a9f69b 35
cd6e8f87
ZX		 36#define CR3_PAE_RESERVED_BITS ((X86_CR3_PWT | X86_CR3_PCD) - 1)
37#define CR3_NONPAE_RESERVED_BITS ((PAGE_SIZE-1) & ~(X86_CR3_PWT | X86_CR3_PCD))
7d76b4d3
JP		 38#define CR3_L_MODE_RESERVED_BITS (CR3_NONPAE_RESERVED_BITS | \
39 0xFFFFFF0000000000ULL)
cd6e8f87 40
3a624e29
NK		 41#define KVM_GUEST_CR0_MASK_UNRESTRICTED_GUEST \
42 (X86_CR0_WP | X86_CR0_NE | X86_CR0_NW | X86_CR0_CD)
43#define KVM_GUEST_CR0_MASK \
44 (KVM_GUEST_CR0_MASK_UNRESTRICTED_GUEST | X86_CR0_PG | X86_CR0_PE)
45#define KVM_VM_CR0_ALWAYS_ON_UNRESTRICTED_GUEST \
46 (X86_CR0_WP | X86_CR0_NE | X86_CR0_TS | X86_CR0_MP)
7d76b4d3 47#define KVM_VM_CR0_ALWAYS_ON \
3a624e29 48 (KVM_VM_CR0_ALWAYS_ON_UNRESTRICTED_GUEST | X86_CR0_PG | X86_CR0_PE)
7d76b4d3 49#define KVM_GUEST_CR4_MASK \
cd6e8f87
ZX		 50 (X86_CR4_VME | X86_CR4_PSE | X86_CR4_PAE | X86_CR4_PGE | X86_CR4_VMXE)
51#define KVM_PMODE_VM_CR4_ALWAYS_ON (X86_CR4_PAE | X86_CR4_VMXE)
52#define KVM_RMODE_VM_CR4_ALWAYS_ON (X86_CR4_VME | X86_CR4_PAE | X86_CR4_VMXE)
53
54#define INVALID_PAGE (~(hpa_t)0)
55#define UNMAPPED_GVA (~(gpa_t)0)
56
ec04b260 57/* KVM Hugepage definitions for x86 */
04326caa 58#define KVM_NR_PAGE_SIZES 3
ec04b260
JR		 59#define KVM_HPAGE_SHIFT(x) (PAGE_SHIFT + (((x) - 1) * 9))
60#define KVM_HPAGE_SIZE(x) (1UL << KVM_HPAGE_SHIFT(x))
61#define KVM_HPAGE_MASK(x) (~(KVM_HPAGE_SIZE(x) - 1))
62#define KVM_PAGES_PER_HPAGE(x) (KVM_HPAGE_SIZE(x) / PAGE_SIZE)
05da4558 63
cd6e8f87 64#define DE_VECTOR 0
19bd8afd 65#define DB_VECTOR 1
77ab6db0
JK		 66#define BP_VECTOR 3
67#define OF_VECTOR 4
68#define BR_VECTOR 5
cd6e8f87
ZX		 69#define UD_VECTOR 6
70#define NM_VECTOR 7
71#define DF_VECTOR 8
72#define TS_VECTOR 10
73#define NP_VECTOR 11
74#define SS_VECTOR 12
75#define GP_VECTOR 13
76#define PF_VECTOR 14
77ab6db0 77#define MF_VECTOR 16
53371b50 78#define MC_VECTOR 18
cd6e8f87
ZX		 79
80#define SELECTOR_TI_MASK (1 << 2)
81#define SELECTOR_RPL_MASK 0x03
82
83#define IOPL_SHIFT 12
84
d69fb81f
ZX		 85#define KVM_ALIAS_SLOTS 4
86
d657a98e
ZX		 87#define KVM_PERMILLE_MMU_PAGES 20
88#define KVM_MIN_ALLOC_MMU_PAGES 64
1ae0a13d
DE		 89#define KVM_MMU_HASH_SHIFT 10
90#define KVM_NUM_MMU_PAGES (1 << KVM_MMU_HASH_SHIFT)
d657a98e
ZX		 91#define KVM_MIN_FREE_MMU_PAGES 5
92#define KVM_REFILL_PAGES 25
93#define KVM_MAX_CPUID_ENTRIES 40
0bed3b56 94#define KVM_NR_FIXED_MTRR_REGION 88
9ba075a6 95#define KVM_NR_VAR_MTRR 8
d657a98e 96
e9b11c17
ZX		 97extern spinlock_t kvm_lock;
98extern struct list_head vm_list;
99
d657a98e
ZX		 100struct kvm_vcpu;
101struct kvm;
102
5fdbf976 103enum kvm_reg {
2b3ccfa0
ZX		 104 VCPU_REGS_RAX = 0,
105 VCPU_REGS_RCX = 1,
106 VCPU_REGS_RDX = 2,
107 VCPU_REGS_RBX = 3,
108 VCPU_REGS_RSP = 4,
109 VCPU_REGS_RBP = 5,
110 VCPU_REGS_RSI = 6,
111 VCPU_REGS_RDI = 7,
112#ifdef CONFIG_X86_64
113 VCPU_REGS_R8 = 8,
114 VCPU_REGS_R9 = 9,
115 VCPU_REGS_R10 = 10,
116 VCPU_REGS_R11 = 11,
117 VCPU_REGS_R12 = 12,
118 VCPU_REGS_R13 = 13,
119 VCPU_REGS_R14 = 14,
120 VCPU_REGS_R15 = 15,
121#endif
5fdbf976 122 VCPU_REGS_RIP,
2b3ccfa0
ZX		 123 NR_VCPU_REGS
124};
125
6de4f3ad
AK		 126enum kvm_reg_ex {
127 VCPU_EXREG_PDPTR = NR_VCPU_REGS,
128};
129
2b3ccfa0 130enum {
81609e3e 131 VCPU_SREG_ES,
2b3ccfa0 132 VCPU_SREG_CS,
81609e3e 133 VCPU_SREG_SS,
2b3ccfa0 134 VCPU_SREG_DS,
2b3ccfa0
ZX		 135 VCPU_SREG_FS,
136 VCPU_SREG_GS,
2b3ccfa0
ZX		 137 VCPU_SREG_TR,
138 VCPU_SREG_LDTR,
139};
140
56e82318 141#include <asm/kvm_emulate.h>
2b3ccfa0 142
d657a98e
ZX		 143#define KVM_NR_MEM_OBJS 40
144
42dbaa5a
JK		 145#define KVM_NR_DB_REGS 4
146
147#define DR6_BD (1 << 13)
148#define DR6_BS (1 << 14)
149#define DR6_FIXED_1 0xffff0ff0
150#define DR6_VOLATILE 0x0000e00f
151
152#define DR7_BP_EN_MASK 0x000000ff
153#define DR7_GE (1 << 9)
154#define DR7_GD (1 << 13)
155#define DR7_FIXED_1 0x00000400
156#define DR7_VOLATILE 0xffff23ff
157
d657a98e
ZX		 158/*
159 * We don't want allocation failures within the mmu code, so we preallocate
160 * enough memory for a single page fault in a cache.
161 */
162struct kvm_mmu_memory_cache {
163 int nobjs;
164 void *objects[KVM_NR_MEM_OBJS];
165};
166
167#define NR_PTE_CHAIN_ENTRIES 5
168
169struct kvm_pte_chain {
170 u64 *parent_ptes[NR_PTE_CHAIN_ENTRIES];
171 struct hlist_node link;
172};
173
174/*
175 * kvm_mmu_page_role, below, is defined as:
176 *
177 * bits 0:3 - total guest paging levels (2-4, or zero for real mode)
178 * bits 4:7 - page table level for this shadow (1-4)
179 * bits 8:9 - page table quadrant for 2-level guests
f6e2c02b
AK		 180 * bit 16 - direct mapping of virtual to physical mapping at gfn
181 * used for real mode and two-dimensional paging
d657a98e
ZX		 182 * bits 17:19 - common access permissions for all ptes in this shadow page
183 */
184union kvm_mmu_page_role {
185 unsigned word;
186 struct {
7d76b4d3
JP		 187 unsigned glevels:4;
188 unsigned level:4;
189 unsigned quadrant:2;
190 unsigned pad_for_nice_hex_output:6;
f6e2c02b 191 unsigned direct:1;
7d76b4d3 192 unsigned access:3;
2e53d63a 193 unsigned invalid:1;
2f0b3d60 194 unsigned cr4_pge:1;
9645bb56 195 unsigned nxe:1;
d657a98e
ZX		 196 };
197};
198
199struct kvm_mmu_page {
200 struct list_head link;
201 struct hlist_node hash_link;
202
6cffe8ca
MT		 203 struct list_head oos_link;
204
d657a98e
ZX		 205 /*
206 * The following two entries are used to key the shadow page in the
207 * hash table.
208 */
209 gfn_t gfn;
210 union kvm_mmu_page_role role;
211
212 u64 *spt;
213 /* hold the gfn of each spte inside spt */
214 gfn_t *gfns;
291f26bc
SY		 215 /*
216 * One bit set per slot which has memory
217 * in this shadow page.
218 */
219 DECLARE_BITMAP(slot_bitmap, KVM_MEMORY_SLOTS + KVM_PRIVATE_MEM_SLOTS);
d657a98e
ZX		 220 int multimapped; /* More than one parent_pte? */
221 int root_count; /* Currently serving as active root */
4731d4c7 222 bool unsync;
60c8aec6 223 unsigned int unsync_children;
d657a98e
ZX		 224 union {
225 u64 *parent_pte; /* !multimapped */
226 struct hlist_head parent_ptes; /* multimapped, kvm_pte_chain */
227 };
0074ff63 228 DECLARE_BITMAP(unsync_child_bitmap, 512);
d657a98e
ZX		 229};
230
6ad18fba
DH		 231struct kvm_pv_mmu_op_buffer {
232 void *ptr;
233 unsigned len;
234 unsigned processed;
235 char buf[512] __aligned(sizeof(long));
236};
237
1c08364c
AK		 238struct kvm_pio_request {
239 unsigned long count;
240 int cur_count;
241 gva_t guest_gva;
242 int in;
243 int port;
244 int size;
245 int string;
246 int down;
247 int rep;
248};
249
d657a98e
ZX		 250/*
251 * x86 supports 3 paging modes (4-level 64-bit, 3-level 64-bit, and 2-level
252 * 32-bit). The kvm_mmu structure abstracts the details of the current mmu
253 * mode.
254 */
255struct kvm_mmu {
256 void (*new_cr3)(struct kvm_vcpu *vcpu);
257 int (*page_fault)(struct kvm_vcpu *vcpu, gva_t gva, u32 err);
258 void (*free)(struct kvm_vcpu *vcpu);
259 gpa_t (*gva_to_gpa)(struct kvm_vcpu *vcpu, gva_t gva);
260 void (*prefetch_page)(struct kvm_vcpu *vcpu,
261 struct kvm_mmu_page *page);
e8bc217a
MT		 262 int (*sync_page)(struct kvm_vcpu *vcpu,
263 struct kvm_mmu_page *sp);
a7052897 264 void (*invlpg)(struct kvm_vcpu *vcpu, gva_t gva);
d657a98e
ZX		 265 hpa_t root_hpa;
266 int root_level;
267 int shadow_root_level;
a770f6f2 268 union kvm_mmu_page_role base_role;
d657a98e
ZX		 269
270 u64 *pae_root;
82725b20 271 u64 rsvd_bits_mask[2][4];
d657a98e
ZX		 272};
273
ad312c7c 274struct kvm_vcpu_arch {
34c16eec 275 u64 host_tsc;
5fdbf976
MT		 276 /*
277 * rip and regs accesses must go through
278 * kvm_{register,rip}_{read,write} functions.
279 */
280 unsigned long regs[NR_VCPU_REGS];
281 u32 regs_avail;
282 u32 regs_dirty;
34c16eec
ZX		 283
284 unsigned long cr0;
285 unsigned long cr2;
286 unsigned long cr3;
287 unsigned long cr4;
288 unsigned long cr8;
1371d904 289 u32 hflags;
34c16eec
ZX		 290 u64 pdptrs[4]; /* pae */
291 u64 shadow_efer;
292 u64 apic_base;
293 struct kvm_lapic *apic; /* kernel irqchip context */
e1035715 294 int32_t apic_arb_prio;
34c16eec
ZX		 295 int mp_state;
296 int sipi_vector;
297 u64 ia32_misc_enable_msr;
b209749f 298 bool tpr_access_reporting;
34c16eec
ZX		 299
300 struct kvm_mmu mmu;
6ad18fba
DH		 301 /* only needed in kvm_pv_mmu_op() path, but it's hot so
302 * put it here to avoid allocation */
303 struct kvm_pv_mmu_op_buffer mmu_op_buffer;
34c16eec
ZX		 304
305 struct kvm_mmu_memory_cache mmu_pte_chain_cache;
306 struct kvm_mmu_memory_cache mmu_rmap_desc_cache;
307 struct kvm_mmu_memory_cache mmu_page_cache;
308 struct kvm_mmu_memory_cache mmu_page_header_cache;
309
310 gfn_t last_pt_write_gfn;
311 int last_pt_write_count;
312 u64 *last_pte_updated;
1b7fcd32 313 gfn_t last_pte_gfn;
34c16eec 314
d7824fff 315 struct {
35149e21
AL		 316 gfn_t gfn; /* presumed gfn during guest pte update */
317 pfn_t pfn; /* pfn corresponding to that gfn */
e930bffe 318 unsigned long mmu_seq;
d7824fff
AK		 319 } update_pte;
320
34c16eec
ZX		 321 struct i387_fxsave_struct host_fx_image;
322 struct i387_fxsave_struct guest_fx_image;
323
324 gva_t mmio_fault_cr2;
325 struct kvm_pio_request pio;
326 void *pio_data;
327
66fd3f7f
GN		 328 u8 event_exit_inst_len;
329
298101da
AK		 330 struct kvm_queued_exception {
331 bool pending;
332 bool has_error_code;
333 u8 nr;
334 u32 error_code;
335 } exception;
336
937a7eae
AK		 337 struct kvm_queued_interrupt {
338 bool pending;
66fd3f7f 339 bool soft;
937a7eae
AK		 340 u8 nr;
341 } interrupt;
342
34c16eec
ZX		 343 int halt_request; /* real mode on Intel only */
344
345 int cpuid_nent;
07716717 346 struct kvm_cpuid_entry2 cpuid_entries[KVM_MAX_CPUID_ENTRIES];
34c16eec
ZX		 347 /* emulate context */
348
349 struct x86_emulate_ctxt emulate_ctxt;
18068523
GOC		 350
351 gpa_t time;
50d0a0f9
GH		 352 struct pvclock_vcpu_time_info hv_clock;
353 unsigned int hv_clock_tsc_khz;
18068523
GOC		 354 unsigned int time_offset;
355 struct page *time_page;
3419ffc8
SY		 356
357 bool nmi_pending;
668f612f 358 bool nmi_injected;
9ba075a6 359
0bed3b56
SY		 360 struct mtrr_state_type mtrr_state;
361 u32 pat;
42dbaa5a
JK		 362
363 int switch_db_regs;
42dbaa5a
JK		 364 unsigned long db[KVM_NR_DB_REGS];
365 unsigned long dr6;
366 unsigned long dr7;
367 unsigned long eff_db[KVM_NR_DB_REGS];
890ca9ae
HY		 368
369 u64 mcg_cap;
370 u64 mcg_status;
371 u64 mcg_ctl;
372 u64 *mce_banks;
94fe45da
JK		 373
374 /* used for guest single stepping over the given code position */
375 u16 singlestep_cs;
376 unsigned long singlestep_rip;
34c16eec
ZX		 377};
378
d69fb81f
ZX		 379struct kvm_mem_alias {
380 gfn_t base_gfn;
381 unsigned long npages;
382 gfn_t target_gfn;
383};
384
385struct kvm_arch{
386 int naliases;
387 struct kvm_mem_alias aliases[KVM_ALIAS_SLOTS];
f05e70ac
ZX		 388
389 unsigned int n_free_mmu_pages;
390 unsigned int n_requested_mmu_pages;
391 unsigned int n_alloc_mmu_pages;
392 struct hlist_head mmu_page_hash[KVM_NUM_MMU_PAGES];
393 /*
394 * Hash table of struct kvm_mmu_page.
395 */
396 struct list_head active_mmu_pages;
4d5c5d0f 397 struct list_head assigned_dev_head;
19de40a8 398 struct iommu_domain *iommu_domain;
522c68c4 399 int iommu_flags;
d7deeeb0
ZX		 400 struct kvm_pic *vpic;
401 struct kvm_ioapic *vioapic;
7837699f 402 struct kvm_pit *vpit;
cc6e462c 403 int vapics_in_nmi_mode;
bfc6d222 404
bfc6d222
ZX		 405 unsigned int tss_addr;
406 struct page *apic_access_page;
18068523
GOC		 407
408 gpa_t wall_clock;
b7ebfb05
SY		 409
410 struct page *ept_identity_pagetable;
411 bool ept_identity_pagetable_done;
b927a3ce 412 gpa_t ept_identity_map_addr;
5550af4d
SY		 413
414 unsigned long irq_sources_bitmap;
53f658b3 415 u64 vm_init_tsc;
afbcf7ab 416 s64 kvmclock_offset;
ffde22ac
ES		 417
418 struct kvm_xen_hvm_config xen_hvm_config;
d69fb81f
ZX		 419};
420
0711456c
ZX		 421struct kvm_vm_stat {
422 u32 mmu_shadow_zapped;
423 u32 mmu_pte_write;
424 u32 mmu_pte_updated;
425 u32 mmu_pde_zapped;
426 u32 mmu_flooded;
427 u32 mmu_recycled;
dfc5aa00 428 u32 mmu_cache_miss;
4731d4c7 429 u32 mmu_unsync;
0711456c 430 u32 remote_tlb_flush;
05da4558 431 u32 lpages;
0711456c
ZX		 432};
433
77b4c255
ZX		 434struct kvm_vcpu_stat {
435 u32 pf_fixed;
436 u32 pf_guest;
437 u32 tlb_flush;
438 u32 invlpg;
439
440 u32 exits;
441 u32 io_exits;
442 u32 mmio_exits;
443 u32 signal_exits;
444 u32 irq_window_exits;
f08864b4 445 u32 nmi_window_exits;
77b4c255
ZX		 446 u32 halt_exits;
447 u32 halt_wakeup;
448 u32 request_irq_exits;
449 u32 irq_exits;
450 u32 host_state_reload;
451 u32 efer_reload;
452 u32 fpu_reload;
453 u32 insn_emulation;
454 u32 insn_emulation_fail;
f11c3a8d 455 u32 hypercalls;
fa89a817 456 u32 irq_injections;
c4abb7c9 457 u32 nmi_injections;
77b4c255 458};
ad312c7c 459
e01a1b57
HB		 460struct descriptor_table {
461 u16 limit;
462 unsigned long base;
463} __attribute__((packed));
464
ea4a5ff8
ZX		 465struct kvm_x86_ops {
466 int (*cpu_has_kvm_support)(void); /* __init */
467 int (*disabled_by_bios)(void); /* __init */
10474ae8 468 int (*hardware_enable)(void *dummy);
ea4a5ff8
ZX		 469 void (*hardware_disable)(void *dummy);
470 void (*check_processor_compatibility)(void *rtn);
471 int (*hardware_setup)(void); /* __init */
472 void (*hardware_unsetup)(void); /* __exit */
774ead3a 473 bool (*cpu_has_accelerated_tpr)(void);
ea4a5ff8
ZX		 474
475 /* Create, but do not attach this VCPU */
476 struct kvm_vcpu *(*vcpu_create)(struct kvm *kvm, unsigned id);
477 void (*vcpu_free)(struct kvm_vcpu *vcpu);
478 int (*vcpu_reset)(struct kvm_vcpu *vcpu);
479
480 void (*prepare_guest_switch)(struct kvm_vcpu *vcpu);
481 void (*vcpu_load)(struct kvm_vcpu *vcpu, int cpu);
482 void (*vcpu_put)(struct kvm_vcpu *vcpu);
ea4a5ff8 483
355be0b9
JK		 484 void (*set_guest_debug)(struct kvm_vcpu *vcpu,
485 struct kvm_guest_debug *dbg);
ea4a5ff8
ZX		 486 int (*get_msr)(struct kvm_vcpu *vcpu, u32 msr_index, u64 *pdata);
487 int (*set_msr)(struct kvm_vcpu *vcpu, u32 msr_index, u64 data);
488 u64 (*get_segment_base)(struct kvm_vcpu *vcpu, int seg);
489 void (*get_segment)(struct kvm_vcpu *vcpu,
490 struct kvm_segment *var, int seg);
2e4d2653 491 int (*get_cpl)(struct kvm_vcpu *vcpu);
ea4a5ff8
ZX		 492 void (*set_segment)(struct kvm_vcpu *vcpu,
493 struct kvm_segment *var, int seg);
494 void (*get_cs_db_l_bits)(struct kvm_vcpu *vcpu, int *db, int *l);
495 void (*decache_cr4_guest_bits)(struct kvm_vcpu *vcpu);
496 void (*set_cr0)(struct kvm_vcpu *vcpu, unsigned long cr0);
497 void (*set_cr3)(struct kvm_vcpu *vcpu, unsigned long cr3);
498 void (*set_cr4)(struct kvm_vcpu *vcpu, unsigned long cr4);
499 void (*set_efer)(struct kvm_vcpu *vcpu, u64 efer);
500 void (*get_idt)(struct kvm_vcpu *vcpu, struct descriptor_table *dt);
501 void (*set_idt)(struct kvm_vcpu *vcpu, struct descriptor_table *dt);
502 void (*get_gdt)(struct kvm_vcpu *vcpu, struct descriptor_table *dt);
503 void (*set_gdt)(struct kvm_vcpu *vcpu, struct descriptor_table *dt);
504 unsigned long (*get_dr)(struct kvm_vcpu *vcpu, int dr);
505 void (*set_dr)(struct kvm_vcpu *vcpu, int dr, unsigned long value,
506 int *exception);
5fdbf976 507 void (*cache_reg)(struct kvm_vcpu *vcpu, enum kvm_reg reg);
ea4a5ff8
ZX		 508 unsigned long (*get_rflags)(struct kvm_vcpu *vcpu);
509 void (*set_rflags)(struct kvm_vcpu *vcpu, unsigned long rflags);
510
511 void (*tlb_flush)(struct kvm_vcpu *vcpu);
ea4a5ff8 512
851ba692
AK		 513 void (*run)(struct kvm_vcpu *vcpu);
514 int (*handle_exit)(struct kvm_vcpu *vcpu);
ea4a5ff8 515 void (*skip_emulated_instruction)(struct kvm_vcpu *vcpu);
2809f5d2
GC		 516 void (*set_interrupt_shadow)(struct kvm_vcpu *vcpu, int mask);
517 u32 (*get_interrupt_shadow)(struct kvm_vcpu *vcpu, int mask);
ea4a5ff8
ZX		 518 void (*patch_hypercall)(struct kvm_vcpu *vcpu,
519 unsigned char *hypercall_addr);
66fd3f7f 520 void (*set_irq)(struct kvm_vcpu *vcpu);
95ba8273 521 void (*set_nmi)(struct kvm_vcpu *vcpu);
298101da
AK		 522 void (*queue_exception)(struct kvm_vcpu *vcpu, unsigned nr,
523 bool has_error_code, u32 error_code);
78646121 524 int (*interrupt_allowed)(struct kvm_vcpu *vcpu);
95ba8273 525 int (*nmi_allowed)(struct kvm_vcpu *vcpu);
3cfc3092
JK		 526 bool (*get_nmi_mask)(struct kvm_vcpu *vcpu);
527 void (*set_nmi_mask)(struct kvm_vcpu *vcpu, bool masked);
95ba8273
GN		 528 void (*enable_nmi_window)(struct kvm_vcpu *vcpu);
529 void (*enable_irq_window)(struct kvm_vcpu *vcpu);
530 void (*update_cr8_intercept)(struct kvm_vcpu *vcpu, int tpr, int irr);
ea4a5ff8 531 int (*set_tss_addr)(struct kvm *kvm, unsigned int addr);
67253af5 532 int (*get_tdp_level)(void);
4b12f0de 533 u64 (*get_mt_mask)(struct kvm_vcpu *vcpu, gfn_t gfn, bool is_mmio);
344f414f
JR		 534 bool (*gb_page_enable)(void);
535
229456fc 536 const struct trace_print_flags *exit_reasons_str;
ea4a5ff8
ZX		 537};
538
97896d04
ZX		 539extern struct kvm_x86_ops *kvm_x86_ops;
540
54f1585a
ZX		 541int kvm_mmu_module_init(void);
542void kvm_mmu_module_exit(void);
543
544void kvm_mmu_destroy(struct kvm_vcpu *vcpu);
545int kvm_mmu_create(struct kvm_vcpu *vcpu);
546int kvm_mmu_setup(struct kvm_vcpu *vcpu);
547void kvm_mmu_set_nonpresent_ptes(u64 trap_pte, u64 notrap_pte);
7b52345e
SY		 548void kvm_mmu_set_base_ptes(u64 base_pte);
549void kvm_mmu_set_mask_ptes(u64 user_mask, u64 accessed_mask,
4b12f0de 550 u64 dirty_mask, u64 nx_mask, u64 x_mask);
54f1585a
ZX		 551
552int kvm_mmu_reset_context(struct kvm_vcpu *vcpu);
553void kvm_mmu_slot_remove_write_access(struct kvm *kvm, int slot);
554void kvm_mmu_zap_all(struct kvm *kvm);
3ad82a7e 555unsigned int kvm_mmu_calculate_mmu_pages(struct kvm *kvm);
54f1585a
ZX		 556void kvm_mmu_change_mmu_pages(struct kvm *kvm, unsigned int kvm_nr_mmu_pages);
557
cc4b6871
JR		 558int load_pdptrs(struct kvm_vcpu *vcpu, unsigned long cr3);
559
3200f405 560int emulator_write_phys(struct kvm_vcpu *vcpu, gpa_t gpa,
9f811285 561 const void *val, int bytes);
2f333bcb
MT		 562int kvm_pv_mmu_op(struct kvm_vcpu *vcpu, unsigned long bytes,
563 gpa_t addr, unsigned long *ret);
4b12f0de 564u8 kvm_get_guest_memory_type(struct kvm_vcpu *vcpu, gfn_t gfn);
2f333bcb
MT		 565
566extern bool tdp_enabled;
9f811285 567
54f1585a
ZX		 568enum emulation_result {
569 EMULATE_DONE, /* no further processing */
570 EMULATE_DO_MMIO, /* kvm_run filled with mmio request */
571 EMULATE_FAIL, /* can't emulate this instruction */
572};
573
571008da
SY		 574#define EMULTYPE_NO_DECODE (1 << 0)
575#define EMULTYPE_TRAP_UD (1 << 1)
ba8afb6b 576#define EMULTYPE_SKIP (1 << 2)
851ba692 577int emulate_instruction(struct kvm_vcpu *vcpu,
571008da 578 unsigned long cr2, u16 error_code, int emulation_type);
54f1585a
ZX		 579void kvm_report_emulation_failure(struct kvm_vcpu *cvpu, const char *context);
580void realmode_lgdt(struct kvm_vcpu *vcpu, u16 size, unsigned long address);
581void realmode_lidt(struct kvm_vcpu *vcpu, u16 size, unsigned long address);
582void realmode_lmsw(struct kvm_vcpu *vcpu, unsigned long msw,
583 unsigned long *rflags);
584
585unsigned long realmode_get_cr(struct kvm_vcpu *vcpu, int cr);
586void realmode_set_cr(struct kvm_vcpu *vcpu, int cr, unsigned long value,
587 unsigned long *rflags);
f2b4b7dd 588void kvm_enable_efer_bits(u64);
54f1585a
ZX		 589int kvm_get_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 *data);
590int kvm_set_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 data);
591
592struct x86_emulate_ctxt;
593
851ba692 594int kvm_emulate_pio(struct kvm_vcpu *vcpu, int in,
54f1585a 595 int size, unsigned port);
851ba692 596int kvm_emulate_pio_string(struct kvm_vcpu *vcpu, int in,
54f1585a
ZX		 597 int size, unsigned long count, int down,
598 gva_t address, int rep, unsigned port);
599void kvm_emulate_cpuid(struct kvm_vcpu *vcpu);
600int kvm_emulate_halt(struct kvm_vcpu *vcpu);
601int emulate_invlpg(struct kvm_vcpu *vcpu, gva_t address);
602int emulate_clts(struct kvm_vcpu *vcpu);
603int emulator_get_dr(struct x86_emulate_ctxt *ctxt, int dr,
604 unsigned long *dest);
605int emulator_set_dr(struct x86_emulate_ctxt *ctxt, int dr,
606 unsigned long value);
607
3e6e0aab
GT		 608void kvm_get_segment(struct kvm_vcpu *vcpu, struct kvm_segment *var, int seg);
609int kvm_load_segment_descriptor(struct kvm_vcpu *vcpu, u16 selector,
610 int type_bits, int seg);
611
37817f29
IE		 612int kvm_task_switch(struct kvm_vcpu *vcpu, u16 tss_selector, int reason);
613
2d3ad1f4 614void kvm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0);
9c20456a
JR		 615void kvm_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3);
616void kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4);
617void kvm_set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8);
2d3ad1f4
AK		 618unsigned long kvm_get_cr8(struct kvm_vcpu *vcpu);
619void kvm_lmsw(struct kvm_vcpu *vcpu, unsigned long msw);
54f1585a
ZX		 620void kvm_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l);
621
622int kvm_get_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata);
623int kvm_set_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 data);
624
91586a3b
JK		 625unsigned long kvm_get_rflags(struct kvm_vcpu *vcpu);
626void kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags);
627
298101da
AK		 628void kvm_queue_exception(struct kvm_vcpu *vcpu, unsigned nr);
629void kvm_queue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code);
c3c91fee
AK		 630void kvm_inject_page_fault(struct kvm_vcpu *vcpu, unsigned long cr2,
631 u32 error_code);
0a79b009 632bool kvm_require_cpl(struct kvm_vcpu *vcpu, int required_cpl);
298101da 633
4925663a 634int kvm_pic_set_irq(void *opaque, int irq, int level);
3de42dc0 635
3419ffc8
SY		 636void kvm_inject_nmi(struct kvm_vcpu *vcpu);
637
54f1585a
ZX		 638void fx_init(struct kvm_vcpu *vcpu);
639
54f1585a
ZX		 640int emulator_write_emulated(unsigned long addr,
641 const void *val,
642 unsigned int bytes,
643 struct kvm_vcpu *vcpu);
644
645unsigned long segment_base(u16 selector);
646
d835dfec 647void kvm_mmu_flush_tlb(struct kvm_vcpu *vcpu);
54f1585a 648void kvm_mmu_pte_write(struct kvm_vcpu *vcpu, gpa_t gpa,
ad218f85
MT		 649 const u8 *new, int bytes,
650 bool guest_initiated);
54f1585a
ZX		 651int kvm_mmu_unprotect_page_virt(struct kvm_vcpu *vcpu, gva_t gva);
652void __kvm_mmu_free_some_pages(struct kvm_vcpu *vcpu);
653int kvm_mmu_load(struct kvm_vcpu *vcpu);
654void kvm_mmu_unload(struct kvm_vcpu *vcpu);
0ba73cda 655void kvm_mmu_sync_roots(struct kvm_vcpu *vcpu);
54f1585a
ZX		 656
657int kvm_emulate_hypercall(struct kvm_vcpu *vcpu);
658
659int kvm_fix_hypercall(struct kvm_vcpu *vcpu);
660
3067714c 661int kvm_mmu_page_fault(struct kvm_vcpu *vcpu, gva_t gva, u32 error_code);
a7052897 662void kvm_mmu_invlpg(struct kvm_vcpu *vcpu, gva_t gva);
34c16eec 663
18552672 664void kvm_enable_tdp(void);
5f4cb662 665void kvm_disable_tdp(void);
18552672 666
a03490ed 667int load_pdptrs(struct kvm_vcpu *vcpu, unsigned long cr3);
de7d789a 668int complete_pio(struct kvm_vcpu *vcpu);
ec6d273d 669
2843099f
IE		 670struct kvm_memory_slot *gfn_to_memslot_unaliased(struct kvm *kvm, gfn_t gfn);
671
ec6d273d
ZX		 672static inline struct kvm_mmu_page *page_header(hpa_t shadow_page)
673{
674 struct page *page = pfn_to_page(shadow_page >> PAGE_SHIFT);
675
676 return (struct kvm_mmu_page *)page_private(page);
677}
678
d6e88aec 679static inline u16 kvm_read_fs(void)
ec6d273d
ZX		 680{
681 u16 seg;
682 asm("mov %%fs, %0" : "=g"(seg));
683 return seg;
684}
685
d6e88aec 686static inline u16 kvm_read_gs(void)
ec6d273d
ZX		 687{
688 u16 seg;
689 asm("mov %%gs, %0" : "=g"(seg));
690 return seg;
691}
692
d6e88aec 693static inline u16 kvm_read_ldt(void)
ec6d273d
ZX		 694{
695 u16 ldt;
696 asm("sldt %0" : "=g"(ldt));
697 return ldt;
698}
699
d6e88aec 700static inline void kvm_load_fs(u16 sel)
ec6d273d
ZX		 701{
702 asm("mov %0, %%fs" : : "rm"(sel));
703}
704
d6e88aec 705static inline void kvm_load_gs(u16 sel)
ec6d273d
ZX		 706{
707 asm("mov %0, %%gs" : : "rm"(sel));
708}
709
d6e88aec 710static inline void kvm_load_ldt(u16 sel)
ec6d273d
ZX		 711{
712 asm("lldt %0" : : "rm"(sel));
713}
ec6d273d 714
d6e88aec 715static inline void kvm_get_idt(struct descriptor_table *table)
ec6d273d
ZX		 716{
717 asm("sidt %0" : "=m"(*table));
718}
719
d6e88aec 720static inline void kvm_get_gdt(struct descriptor_table *table)
ec6d273d
ZX		 721{
722 asm("sgdt %0" : "=m"(*table));
723}
724
d6e88aec 725static inline unsigned long kvm_read_tr_base(void)
ec6d273d
ZX		 726{
727 u16 tr;
728 asm("str %0" : "=g"(tr));
729 return segment_base(tr);
730}
731
732#ifdef CONFIG_X86_64
733static inline unsigned long read_msr(unsigned long msr)
734{
735 u64 value;
736
737 rdmsrl(msr, value);
738 return value;
739}
740#endif
741
d6e88aec 742static inline void kvm_fx_save(struct i387_fxsave_struct *image)
ec6d273d
ZX		 743{
744 asm("fxsave (%0)":: "r" (image));
745}
746
d6e88aec 747static inline void kvm_fx_restore(struct i387_fxsave_struct *image)
ec6d273d
ZX		 748{
749 asm("fxrstor (%0)":: "r" (image));
750}
751
d6e88aec 752static inline void kvm_fx_finit(void)
ec6d273d
ZX		 753{
754 asm("finit");
755}
756
757static inline u32 get_rdx_init_val(void)
758{
759 return 0x600; /* P6 family */
760}
761
c1a5d4f9
AK		 762static inline void kvm_inject_gp(struct kvm_vcpu *vcpu, u32 error_code)
763{
764 kvm_queue_exception_e(vcpu, GP_VECTOR, error_code);
765}
766
ec6d273d
ZX		 767#define TSS_IOPB_BASE_OFFSET 0x66
768#define TSS_BASE_SIZE 0x68
769#define TSS_IOPB_SIZE (65536 / 8)
770#define TSS_REDIRECTION_SIZE (256 / 8)
7d76b4d3
JP		 771#define RMODE_TSS_SIZE \
772 (TSS_BASE_SIZE + TSS_REDIRECTION_SIZE + TSS_IOPB_SIZE + 1)
53e0aa7b 773
37817f29
IE		 774enum {
775 TASK_SWITCH_CALL = 0,
776 TASK_SWITCH_IRET = 1,
777 TASK_SWITCH_JMP = 2,
778 TASK_SWITCH_GATE = 3,
779};
780
1371d904 781#define HF_GIF_MASK (1 << 0)
3d6368ef
AG		 782#define HF_HIF_MASK (1 << 1)
783#define HF_VINTR_MASK (1 << 2)
95ba8273 784#define HF_NMI_MASK (1 << 3)
44c11430 785#define HF_IRET_MASK (1 << 4)
1371d904 786
4ecac3fd
AK		 787/*
788 * Hardware virtualization extension instructions may fault if a
789 * reboot turns off virtualization while processes are running.
790 * Trap the fault and ignore the instruction if that happens.
791 */
792asmlinkage void kvm_handle_fault_on_reboot(void);
793
794#define __kvm_handle_fault_on_reboot(insn) \
795 "666: " insn "\n\t" \
18b13e54 796 ".pushsection .fixup, \"ax\" \n" \
4ecac3fd 797 "667: \n\t" \
8ceed347 798 __ASM_SIZE(push) " $666b \n\t" \
4ecac3fd
AK		 799 "jmp kvm_handle_fault_on_reboot \n\t" \
800 ".popsection \n\t" \
801 ".pushsection __ex_table, \"a\" \n\t" \
8ceed347 802 _ASM_PTR " 666b, 667b \n\t" \
4ecac3fd
AK		 803 ".popsection"
804
e930bffe
AA		 805#define KVM_ARCH_WANT_MMU_NOTIFIER
806int kvm_unmap_hva(struct kvm *kvm, unsigned long hva);
807int kvm_age_hva(struct kvm *kvm, unsigned long hva);
3da0dd43 808void kvm_set_spte_hva(struct kvm *kvm, unsigned long hva, pte_t pte);
82725b20 809int cpuid_maxphyaddr(struct kvm_vcpu *vcpu);
a1b37100
GN		 810int kvm_cpu_has_interrupt(struct kvm_vcpu *vcpu);
811int kvm_arch_interrupt_allowed(struct kvm_vcpu *vcpu);
0b71785d 812int kvm_cpu_get_interrupt(struct kvm_vcpu *v);
e930bffe 813
18863bdd
AK		 814void kvm_define_shared_msr(unsigned index, u32 msr);
815void kvm_set_shared_msr(unsigned index, u64 val);
816
1965aae3 817#endif /* _ASM_X86_KVM_HOST_H */
kernel source for telekom puls (alcatel/mediatek)