remove libdss from Makefile
[GitHub/moto-9609/android_kernel_motorola_exynos9610.git] / arch / um / include / asm / pgtable.h
CommitLineData
1da177e4 1/*
d83ecf08 2 * Copyright (C) 2000 - 2007 Jeff Dike (jdike@{addtoit,linux.intel}.com)
1da177e4
LT
3 * Copyright 2003 PathScale, Inc.
4 * Derived from include/asm-i386/pgtable.h
5 * Licensed under the GPL
6 */
7
8#ifndef __UM_PGTABLE_H
9#define __UM_PGTABLE_H
10
300ecf59 11#include <asm/fixmap.h>
1da177e4
LT
12
13#define _PAGE_PRESENT 0x001
14#define _PAGE_NEWPAGE 0x002
9b4ee40e 15#define _PAGE_NEWPROT 0x004
1da177e4
LT
16#define _PAGE_RW 0x020
17#define _PAGE_USER 0x040
18#define _PAGE_ACCESSED 0x080
19#define _PAGE_DIRTY 0x100
9b4ee40e 20/* If _PAGE_PRESENT is clear, we use these: */
9b4ee40e
PBG
21#define _PAGE_PROTNONE 0x010 /* if the user mapped it with PROT_NONE;
22 pte_present gives true */
1da177e4
LT
23
24#ifdef CONFIG_3_LEVEL_PGTABLES
37185b33 25#include <asm/pgtable-3level.h>
1da177e4 26#else
37185b33 27#include <asm/pgtable-2level.h>
1da177e4
LT
28#endif
29
30extern pgd_t swapper_pg_dir[PTRS_PER_PGD];
31
1da177e4
LT
32/* zero page used for uninitialized stuff */
33extern unsigned long *empty_zero_page;
34
35#define pgtable_cache_init() do ; while (0)
36
1da177e4
LT
37/* Just any arbitrary offset to the start of the vmalloc VM area: the
38 * current 8MB value just means that there will be a 8MB "hole" after the
39 * physical memory until the kernel virtual memory starts. That means that
40 * any out-of-bounds memory accesses will hopefully be caught.
41 * The vmalloc() routines leaves a hole of 4kB between each vmalloced
42 * area for the same reason. ;)
43 */
44
45extern unsigned long end_iomem;
46
47#define VMALLOC_OFFSET (__va_space)
48#define VMALLOC_START ((end_iomem + VMALLOC_OFFSET) & ~(VMALLOC_OFFSET-1))
fe1cd987 49#define PKMAP_BASE ((FIXADDR_START - LAST_PKMAP * PAGE_SIZE) & PMD_MASK)
a98a6d86 50#define VMALLOC_END (FIXADDR_START-2*PAGE_SIZE)
c398df30
AW
51#define MODULES_VADDR VMALLOC_START
52#define MODULES_END VMALLOC_END
53#define MODULES_LEN (MODULES_VADDR - MODULES_END)
1da177e4 54
1da177e4
LT
55#define _PAGE_TABLE (_PAGE_PRESENT | _PAGE_RW | _PAGE_USER | _PAGE_ACCESSED | _PAGE_DIRTY)
56#define _KERNPG_TABLE (_PAGE_PRESENT | _PAGE_RW | _PAGE_ACCESSED | _PAGE_DIRTY)
57#define _PAGE_CHG_MASK (PAGE_MASK | _PAGE_ACCESSED | _PAGE_DIRTY)
c398df30
AW
58#define __PAGE_KERNEL_EXEC \
59 (_PAGE_PRESENT | _PAGE_RW | _PAGE_DIRTY | _PAGE_ACCESSED)
1da177e4
LT
60#define PAGE_NONE __pgprot(_PAGE_PROTNONE | _PAGE_ACCESSED)
61#define PAGE_SHARED __pgprot(_PAGE_PRESENT | _PAGE_RW | _PAGE_USER | _PAGE_ACCESSED)
62#define PAGE_COPY __pgprot(_PAGE_PRESENT | _PAGE_USER | _PAGE_ACCESSED)
63#define PAGE_READONLY __pgprot(_PAGE_PRESENT | _PAGE_USER | _PAGE_ACCESSED)
64#define PAGE_KERNEL __pgprot(_PAGE_PRESENT | _PAGE_RW | _PAGE_DIRTY | _PAGE_ACCESSED)
c398df30 65#define PAGE_KERNEL_EXEC __pgprot(__PAGE_KERNEL_EXEC)
1da177e4
LT
66
67/*
d83ecf08
JD
68 * The i386 can't do page protection for execute, and considers that the same
69 * are read.
70 * Also, write permissions imply read permissions. This is the closest we can
71 * get..
1da177e4
LT
72 */
73#define __P000 PAGE_NONE
74#define __P001 PAGE_READONLY
75#define __P010 PAGE_COPY
76#define __P011 PAGE_COPY
77#define __P100 PAGE_READONLY
78#define __P101 PAGE_READONLY
79#define __P110 PAGE_COPY
80#define __P111 PAGE_COPY
81
82#define __S000 PAGE_NONE
83#define __S001 PAGE_READONLY
84#define __S010 PAGE_SHARED
85#define __S011 PAGE_SHARED
86#define __S100 PAGE_READONLY
87#define __S101 PAGE_READONLY
88#define __S110 PAGE_SHARED
89#define __S111 PAGE_SHARED
90
1da177e4 91/*
1da177e4
LT
92 * ZERO_PAGE is a global shared page that is always zero: used
93 * for zero-mapped memory areas etc..
94 */
1da177e4
LT
95#define ZERO_PAGE(vaddr) virt_to_page(empty_zero_page)
96
1da177e4
LT
97#define pte_clear(mm,addr,xp) pte_set_val(*(xp), (phys_t) 0, __pgprot(_PAGE_NEWPAGE))
98
705e87c0 99#define pmd_none(x) (!((unsigned long)pmd_val(x) & ~_PAGE_NEWPAGE))
1da177e4 100#define pmd_bad(x) ((pmd_val(x) & (~PAGE_MASK & ~_PAGE_USER)) != _KERNPG_TABLE)
d83ecf08 101
1da177e4
LT
102#define pmd_present(x) (pmd_val(x) & _PAGE_PRESENT)
103#define pmd_clear(xp) do { pmd_val(*(xp)) = _PAGE_NEWPAGE; } while (0)
104
105#define pmd_newpage(x) (pmd_val(x) & _PAGE_NEWPAGE)
106#define pmd_mkuptodate(x) (pmd_val(x) &= ~_PAGE_NEWPAGE)
107
108#define pud_newpage(x) (pud_val(x) & _PAGE_NEWPAGE)
109#define pud_mkuptodate(x) (pud_val(x) &= ~_PAGE_NEWPAGE)
110
1da177e4
LT
111#define pmd_page(pmd) phys_to_page(pmd_val(pmd) & PAGE_MASK)
112
08964c56 113#define pte_page(x) pfn_to_page(pte_pfn(x))
1da177e4 114
08964c56
JD
115#define pte_present(x) pte_get_bits(x, (_PAGE_PRESENT | _PAGE_PROTNONE))
116
117/*
118 * =================================
119 * Flags checking section.
120 * =================================
121 */
122
123static inline int pte_none(pte_t pte)
124{
125 return pte_is_zero(pte);
126}
127
1da177e4
LT
128/*
129 * The following only work if pte_present() is true.
130 * Undefined behaviour if not..
131 */
1da177e4
LT
132static inline int pte_read(pte_t pte)
133{
134 return((pte_get_bits(pte, _PAGE_USER)) &&
135 !(pte_get_bits(pte, _PAGE_PROTNONE)));
136}
137
138static inline int pte_exec(pte_t pte){
139 return((pte_get_bits(pte, _PAGE_USER)) &&
140 !(pte_get_bits(pte, _PAGE_PROTNONE)));
141}
142
143static inline int pte_write(pte_t pte)
144{
145 return((pte_get_bits(pte, _PAGE_RW)) &&
146 !(pte_get_bits(pte, _PAGE_PROTNONE)));
147}
148
1da177e4
LT
149static inline int pte_dirty(pte_t pte)
150{
151 return pte_get_bits(pte, _PAGE_DIRTY);
152}
153
154static inline int pte_young(pte_t pte)
155{
156 return pte_get_bits(pte, _PAGE_ACCESSED);
157}
158
159static inline int pte_newpage(pte_t pte)
160{
161 return pte_get_bits(pte, _PAGE_NEWPAGE);
162}
163
164static inline int pte_newprot(pte_t pte)
165{
166 return(pte_present(pte) && (pte_get_bits(pte, _PAGE_NEWPROT)));
167}
168
7e675137
NP
169static inline int pte_special(pte_t pte)
170{
171 return 0;
172}
173
08964c56
JD
174/*
175 * =================================
176 * Flags setting section.
177 * =================================
178 */
179
180static inline pte_t pte_mknewprot(pte_t pte)
181{
182 pte_set_bits(pte, _PAGE_NEWPROT);
183 return(pte);
184}
185
1da177e4
LT
186static inline pte_t pte_mkclean(pte_t pte)
187{
188 pte_clear_bits(pte, _PAGE_DIRTY);
189 return(pte);
190}
191
192static inline pte_t pte_mkold(pte_t pte)
193{
194 pte_clear_bits(pte, _PAGE_ACCESSED);
195 return(pte);
196}
197
198static inline pte_t pte_wrprotect(pte_t pte)
199{
e8f13f32
AI
200 if (likely(pte_get_bits(pte, _PAGE_RW)))
201 pte_clear_bits(pte, _PAGE_RW);
202 else
203 return pte;
1da177e4
LT
204 return(pte_mknewprot(pte));
205}
206
207static inline pte_t pte_mkread(pte_t pte)
208{
e8f13f32
AI
209 if (unlikely(pte_get_bits(pte, _PAGE_USER)))
210 return pte;
1463fdbc 211 pte_set_bits(pte, _PAGE_USER);
1da177e4
LT
212 return(pte_mknewprot(pte));
213}
214
1da177e4
LT
215static inline pte_t pte_mkdirty(pte_t pte)
216{
217 pte_set_bits(pte, _PAGE_DIRTY);
218 return(pte);
219}
220
221static inline pte_t pte_mkyoung(pte_t pte)
222{
223 pte_set_bits(pte, _PAGE_ACCESSED);
224 return(pte);
225}
226
227static inline pte_t pte_mkwrite(pte_t pte)
228{
e8f13f32
AI
229 if (unlikely(pte_get_bits(pte, _PAGE_RW)))
230 return pte;
1da177e4
LT
231 pte_set_bits(pte, _PAGE_RW);
232 return(pte_mknewprot(pte));
233}
234
235static inline pte_t pte_mkuptodate(pte_t pte)
236{
237 pte_clear_bits(pte, _PAGE_NEWPAGE);
238 if(pte_present(pte))
239 pte_clear_bits(pte, _PAGE_NEWPROT);
240 return(pte);
241}
242
08964c56
JD
243static inline pte_t pte_mknewpage(pte_t pte)
244{
245 pte_set_bits(pte, _PAGE_NEWPAGE);
246 return(pte);
247}
248
7e675137
NP
249static inline pte_t pte_mkspecial(pte_t pte)
250{
251 return(pte);
252}
253
08964c56
JD
254static inline void set_pte(pte_t *pteptr, pte_t pteval)
255{
256 pte_copy(*pteptr, pteval);
257
258 /* If it's a swap entry, it needs to be marked _PAGE_NEWPAGE so
259 * fix_range knows to unmap it. _PAGE_NEWPROT is specific to
260 * mapped pages.
261 */
262
263 *pteptr = pte_mknewpage(*pteptr);
264 if(pte_present(*pteptr)) *pteptr = pte_mknewprot(*pteptr);
265}
266#define set_pte_at(mm,addr,ptep,pteval) set_pte(ptep,pteval)
267
f15b9000
RW
268#define __HAVE_ARCH_PTE_SAME
269static inline int pte_same(pte_t pte_a, pte_t pte_b)
270{
271 return !((pte_val(pte_a) ^ pte_val(pte_b)) & ~_PAGE_NEWPAGE);
272}
273
1da177e4
LT
274/*
275 * Conversion functions: convert a page and protection to a page entry,
276 * and a page entry and page directory to the page they refer to.
277 */
278
d99c4022
PBG
279#define phys_to_page(phys) pfn_to_page(phys_to_pfn(phys))
280#define __virt_to_page(virt) phys_to_page(__pa(virt))
16da3068 281#define page_to_phys(page) pfn_to_phys(page_to_pfn(page))
d83ecf08 282#define virt_to_page(addr) __virt_to_page((const unsigned long) addr)
d99c4022
PBG
283
284#define mk_pte(page, pgprot) \
285 ({ pte_t pte; \
286 \
287 pte_set_val(pte, page_to_phys(page), (pgprot)); \
288 if (pte_present(pte)) \
289 pte_mknewprot(pte_mknewpage(pte)); \
290 pte;})
1da177e4
LT
291
292static inline pte_t pte_modify(pte_t pte, pgprot_t newprot)
293{
294 pte_set_val(pte, (pte_val(pte) & _PAGE_CHG_MASK), newprot);
1da177e4
LT
295 return pte;
296}
297
1da177e4
LT
298/*
299 * the pgd page can be thought of an array like this: pgd_t[PTRS_PER_PGD]
300 *
301 * this macro returns the index of the entry in the pgd page which would
302 * control the given virtual address
303 */
304#define pgd_index(address) (((address) >> PGDIR_SHIFT) & (PTRS_PER_PGD-1))
305
1da177e4
LT
306/*
307 * pgd_offset() returns a (pgd_t *)
308 * pgd_index() is used get the offset into the pgd page's array of pgd_t's;
309 */
310#define pgd_offset(mm, address) ((mm)->pgd+pgd_index(address))
311
312/*
313 * a shortcut which implies the use of the kernel's pgd, instead
314 * of a process's
315 */
316#define pgd_offset_k(address) pgd_offset(&init_mm, address)
317
318/*
319 * the pmd page can be thought of an array like this: pmd_t[PTRS_PER_PMD]
320 *
321 * this macro returns the index of the entry in the pmd page which would
322 * control the given virtual address
323 */
300ecf59 324#define pmd_page_vaddr(pmd) ((unsigned long) __va(pmd_val(pmd) & PAGE_MASK))
1da177e4
LT
325#define pmd_index(address) (((address) >> PMD_SHIFT) & (PTRS_PER_PMD-1))
326
909e90d3
JD
327#define pmd_page_vaddr(pmd) \
328 ((unsigned long) __va(pmd_val(pmd) & PAGE_MASK))
329
1da177e4
LT
330/*
331 * the pte page can be thought of an array like this: pte_t[PTRS_PER_PTE]
332 *
333 * this macro returns the index of the entry in the pte page which would
334 * control the given virtual address
335 */
336#define pte_index(address) (((address) >> PAGE_SHIFT) & (PTRS_PER_PTE - 1))
337#define pte_offset_kernel(dir, address) \
46a82b2d 338 ((pte_t *) pmd_page_vaddr(*(dir)) + pte_index(address))
1da177e4
LT
339#define pte_offset_map(dir, address) \
340 ((pte_t *)page_address(pmd_page(*(dir))) + pte_index(address))
1da177e4 341#define pte_unmap(pte) do { } while (0)
1da177e4 342
ca77b555
JD
343struct mm_struct;
344extern pte_t *virt_to_pte(struct mm_struct *mm, unsigned long addr);
345
4b3073e1 346#define update_mmu_cache(vma,address,ptep) do ; while (0)
1da177e4
LT
347
348/* Encode and de-code a swap entry */
2b76ebaa 349#define __swp_type(x) (((x).val >> 5) & 0x1f)
1da177e4
LT
350#define __swp_offset(x) ((x).val >> 11)
351
352#define __swp_entry(type, offset) \
2b76ebaa 353 ((swp_entry_t) { ((type) << 5) | ((offset) << 11) })
1da177e4
LT
354#define __pte_to_swp_entry(pte) \
355 ((swp_entry_t) { pte_val(pte_mkuptodate(pte)) })
356#define __swp_entry_to_pte(x) ((pte_t) { (x).val })
357
358#define kern_addr_valid(addr) (1)
359
360#include <asm-generic/pgtable.h>
361
fe1cd987
AV
362/* Clear a kernel PTE and flush it from the TLB */
363#define kpte_clear_flush(ptep, vaddr) \
364do { \
365 pte_clear(&init_mm, (vaddr), (ptep)); \
366 __flush_tlb_one((vaddr)); \
367} while (0)
368
04add672 369#endif