[SPARC/64] Rename some functions like PowerPC
[GitHub/mt8127/android_kernel_alcatel_ttab.git] / arch / sparc / kernel / time.c
CommitLineData
1da177e4
LT
1/* $Id: time.c,v 1.60 2002/01/23 14:33:55 davem Exp $
2 * linux/arch/sparc/kernel/time.c
3 *
4 * Copyright (C) 1995 David S. Miller (davem@caip.rutgers.edu)
5 * Copyright (C) 1996 Thomas K. Dyas (tdyas@eden.rutgers.edu)
6 *
7 * Chris Davis (cdavis@cois.on.ca) 03/27/1998
8 * Added support for the intersil on the sun4/4200
9 *
10 * Gleb Raiko (rajko@mech.math.msu.su) 08/18/1998
11 * Support for MicroSPARC-IIep, PCI CPU.
12 *
13 * This file handles the Sparc specific time handling details.
14 *
15 * 1997-09-10 Updated NTP code according to technical memorandum Jan '96
16 * "A Kernel Model for Precision Timekeeping" by Dave Mills
17 */
1da177e4
LT
18#include <linux/errno.h>
19#include <linux/module.h>
20#include <linux/sched.h>
21#include <linux/kernel.h>
22#include <linux/param.h>
23#include <linux/string.h>
24#include <linux/mm.h>
25#include <linux/interrupt.h>
26#include <linux/time.h>
27#include <linux/timex.h>
28#include <linux/init.h>
29#include <linux/pci.h>
30#include <linux/ioport.h>
31#include <linux/profile.h>
32
33#include <asm/oplib.h>
1da177e4
LT
34#include <asm/timer.h>
35#include <asm/mostek.h>
36#include <asm/system.h>
37#include <asm/irq.h>
38#include <asm/io.h>
39#include <asm/idprom.h>
40#include <asm/machines.h>
41#include <asm/sun4paddr.h>
42#include <asm/page.h>
43#include <asm/pcic.h>
ee5caf0e 44#include <asm/of_device.h>
0d84438d 45#include <asm/irq_regs.h>
1da177e4 46
1da177e4
LT
47DEFINE_SPINLOCK(rtc_lock);
48enum sparc_clock_type sp_clock_typ;
49DEFINE_SPINLOCK(mostek_lock);
50void __iomem *mstk48t02_regs = NULL;
c316ef04 51static struct mostek48t08 __iomem *mstk48t08_regs = NULL;
1da177e4
LT
52static int set_rtc_mmss(unsigned long);
53static int sbus_do_settimeofday(struct timespec *tv);
54
55#ifdef CONFIG_SUN4
56struct intersil *intersil_clock;
57#define intersil_cmd(intersil_reg, intsil_cmd) intersil_reg->int_cmd_reg = \
58 (intsil_cmd)
59
60#define intersil_intr(intersil_reg, intsil_cmd) intersil_reg->int_intr_reg = \
61 (intsil_cmd)
62
63#define intersil_start(intersil_reg) intersil_cmd(intersil_reg, \
64 ( INTERSIL_START | INTERSIL_32K | INTERSIL_NORMAL | INTERSIL_24H |\
65 INTERSIL_INTR_ENABLE))
66
67#define intersil_stop(intersil_reg) intersil_cmd(intersil_reg, \
68 ( INTERSIL_STOP | INTERSIL_32K | INTERSIL_NORMAL | INTERSIL_24H |\
69 INTERSIL_INTR_ENABLE))
70
71#define intersil_read_intr(intersil_reg, towhere) towhere = \
72 intersil_reg->int_intr_reg
73
74#endif
75
76unsigned long profile_pc(struct pt_regs *regs)
77{
78 extern char __copy_user_begin[], __copy_user_end[];
79 extern char __atomic_begin[], __atomic_end[];
80 extern char __bzero_begin[], __bzero_end[];
1da177e4
LT
81
82 unsigned long pc = regs->pc;
83
84 if (in_lock_functions(pc) ||
85 (pc >= (unsigned long) __copy_user_begin &&
86 pc < (unsigned long) __copy_user_end) ||
87 (pc >= (unsigned long) __atomic_begin &&
88 pc < (unsigned long) __atomic_end) ||
89 (pc >= (unsigned long) __bzero_begin &&
8a8b836b 90 pc < (unsigned long) __bzero_end))
1da177e4
LT
91 pc = regs->u_regs[UREG_RETPC];
92 return pc;
93}
94
9550e59c
MH
95EXPORT_SYMBOL(profile_pc);
96
1da177e4
LT
97__volatile__ unsigned int *master_l10_counter;
98__volatile__ unsigned int *master_l10_limit;
99
100/*
101 * timer_interrupt() needs to keep up the real-time clock,
102 * as well as call the "do_timer()" routine every clocktick
103 */
104
105#define TICK_SIZE (tick_nsec / 1000)
106
0d84438d 107irqreturn_t timer_interrupt(int irq, void *dev_id)
1da177e4
LT
108{
109 /* last time the cmos clock got updated */
110 static long last_rtc_update;
111
112#ifndef CONFIG_SMP
0d84438d 113 profile_tick(CPU_PROFILING);
1da177e4
LT
114#endif
115
116 /* Protect counter clear so that do_gettimeoffset works */
117 write_seqlock(&xtime_lock);
118#ifdef CONFIG_SUN4
119 if((idprom->id_machtype == (SM_SUN4 | SM_4_260)) ||
120 (idprom->id_machtype == (SM_SUN4 | SM_4_110))) {
121 int temp;
122 intersil_read_intr(intersil_clock, temp);
123 /* re-enable the irq */
124 enable_pil_irq(10);
125 }
126#endif
127 clear_clock_irq();
128
3171a030 129 do_timer(1);
1da177e4 130#ifndef CONFIG_SMP
0d84438d 131 update_process_times(user_mode(get_irq_regs()));
1da177e4
LT
132#endif
133
134
135 /* Determine when to update the Mostek clock. */
b149ee22 136 if (ntp_synced() &&
1da177e4
LT
137 xtime.tv_sec > last_rtc_update + 660 &&
138 (xtime.tv_nsec / 1000) >= 500000 - ((unsigned) TICK_SIZE) / 2 &&
139 (xtime.tv_nsec / 1000) <= 500000 + ((unsigned) TICK_SIZE) / 2) {
140 if (set_rtc_mmss(xtime.tv_sec) == 0)
141 last_rtc_update = xtime.tv_sec;
142 else
143 last_rtc_update = xtime.tv_sec - 600; /* do it again in 60 s */
144 }
145 write_sequnlock(&xtime_lock);
146
147 return IRQ_HANDLED;
148}
149
150/* Kick start a stopped clock (procedure from the Sun NVRAM/hostid FAQ). */
42e28264 151static void __devinit kick_start_clock(void)
1da177e4
LT
152{
153 struct mostek48t02 *regs = (struct mostek48t02 *)mstk48t02_regs;
154 unsigned char sec;
155 int i, count;
156
157 prom_printf("CLOCK: Clock was stopped. Kick start ");
158
159 spin_lock_irq(&mostek_lock);
160
161 /* Turn on the kick start bit to start the oscillator. */
162 regs->creg |= MSTK_CREG_WRITE;
163 regs->sec &= ~MSTK_STOP;
164 regs->hour |= MSTK_KICK_START;
165 regs->creg &= ~MSTK_CREG_WRITE;
166
167 spin_unlock_irq(&mostek_lock);
168
169 /* Delay to allow the clock oscillator to start. */
170 sec = MSTK_REG_SEC(regs);
171 for (i = 0; i < 3; i++) {
172 while (sec == MSTK_REG_SEC(regs))
173 for (count = 0; count < 100000; count++)
174 /* nothing */ ;
175 prom_printf(".");
176 sec = regs->sec;
177 }
178 prom_printf("\n");
179
180 spin_lock_irq(&mostek_lock);
181
182 /* Turn off kick start and set a "valid" time and date. */
183 regs->creg |= MSTK_CREG_WRITE;
184 regs->hour &= ~MSTK_KICK_START;
185 MSTK_SET_REG_SEC(regs,0);
186 MSTK_SET_REG_MIN(regs,0);
187 MSTK_SET_REG_HOUR(regs,0);
188 MSTK_SET_REG_DOW(regs,5);
189 MSTK_SET_REG_DOM(regs,1);
190 MSTK_SET_REG_MONTH(regs,8);
191 MSTK_SET_REG_YEAR(regs,1996 - MSTK_YEAR_ZERO);
192 regs->creg &= ~MSTK_CREG_WRITE;
193
194 spin_unlock_irq(&mostek_lock);
195
196 /* Ensure the kick start bit is off. If it isn't, turn it off. */
197 while (regs->hour & MSTK_KICK_START) {
198 prom_printf("CLOCK: Kick start still on!\n");
199
200 spin_lock_irq(&mostek_lock);
201 regs->creg |= MSTK_CREG_WRITE;
202 regs->hour &= ~MSTK_KICK_START;
203 regs->creg &= ~MSTK_CREG_WRITE;
204 spin_unlock_irq(&mostek_lock);
205 }
206
207 prom_printf("CLOCK: Kick start procedure successful.\n");
208}
209
210/* Return nonzero if the clock chip battery is low. */
211static __inline__ int has_low_battery(void)
212{
213 struct mostek48t02 *regs = (struct mostek48t02 *)mstk48t02_regs;
214 unsigned char data1, data2;
215
216 spin_lock_irq(&mostek_lock);
217 data1 = regs->eeprom[0]; /* Read some data. */
218 regs->eeprom[0] = ~data1; /* Write back the complement. */
219 data2 = regs->eeprom[0]; /* Read back the complement. */
220 regs->eeprom[0] = data1; /* Restore the original value. */
221 spin_unlock_irq(&mostek_lock);
222
223 return (data1 == data2); /* Was the write blocked? */
224}
225
42e28264 226static void __devinit mostek_set_system_time(void)
96ba989d
BB
227{
228 unsigned int year, mon, day, hour, min, sec;
229 struct mostek48t02 *mregs;
230
231 mregs = (struct mostek48t02 *)mstk48t02_regs;
232 if(!mregs) {
233 prom_printf("Something wrong, clock regs not mapped yet.\n");
234 prom_halt();
235 }
236 spin_lock_irq(&mostek_lock);
237 mregs->creg |= MSTK_CREG_READ;
238 sec = MSTK_REG_SEC(mregs);
239 min = MSTK_REG_MIN(mregs);
240 hour = MSTK_REG_HOUR(mregs);
241 day = MSTK_REG_DOM(mregs);
242 mon = MSTK_REG_MONTH(mregs);
243 year = MSTK_CVT_YEAR( MSTK_REG_YEAR(mregs) );
244 xtime.tv_sec = mktime(year, mon, day, hour, min, sec);
245 xtime.tv_nsec = (INITIAL_JIFFIES % HZ) * (NSEC_PER_SEC / HZ);
246 set_normalized_timespec(&wall_to_monotonic,
247 -xtime.tv_sec, -xtime.tv_nsec);
248 mregs->creg &= ~MSTK_CREG_READ;
249 spin_unlock_irq(&mostek_lock);
250}
251
1da177e4
LT
252/* Probe for the real time clock chip on Sun4 */
253static __inline__ void sun4_clock_probe(void)
254{
255#ifdef CONFIG_SUN4
256 int temp;
257 struct resource r;
258
259 memset(&r, 0, sizeof(r));
260 if( idprom->id_machtype == (SM_SUN4 | SM_4_330) ) {
261 sp_clock_typ = MSTK48T02;
262 r.start = sun4_clock_physaddr;
263 mstk48t02_regs = sbus_ioremap(&r, 0,
264 sizeof(struct mostek48t02), NULL);
265 mstk48t08_regs = NULL; /* To catch weirdness */
266 intersil_clock = NULL; /* just in case */
267
268 /* Kick start the clock if it is completely stopped. */
269 if (mostek_read(mstk48t02_regs + MOSTEK_SEC) & MSTK_STOP)
270 kick_start_clock();
271 } else if( idprom->id_machtype == (SM_SUN4 | SM_4_260)) {
272 /* intersil setup code */
273 printk("Clock: INTERSIL at %8x ",sun4_clock_physaddr);
274 sp_clock_typ = INTERSIL;
275 r.start = sun4_clock_physaddr;
276 intersil_clock = (struct intersil *)
277 sbus_ioremap(&r, 0, sizeof(*intersil_clock), "intersil");
278 mstk48t02_regs = 0; /* just be sure */
279 mstk48t08_regs = NULL; /* ditto */
280 /* initialise the clock */
281
282 intersil_intr(intersil_clock,INTERSIL_INT_100HZ);
283
284 intersil_start(intersil_clock);
285
286 intersil_read_intr(intersil_clock, temp);
287 while (!(temp & 0x80))
288 intersil_read_intr(intersil_clock, temp);
289
290 intersil_read_intr(intersil_clock, temp);
291 while (!(temp & 0x80))
292 intersil_read_intr(intersil_clock, temp);
293
294 intersil_stop(intersil_clock);
295
296 }
297#endif
298}
299
96ba989d 300#ifndef CONFIG_SUN4
ee5caf0e 301static int __devinit clock_probe(struct of_device *op, const struct of_device_id *match)
1da177e4 302{
ee5caf0e 303 struct device_node *dp = op->node;
8271f042 304 const char *model = of_get_property(dp, "model", NULL);
1da177e4 305
ee5caf0e
DM
306 if (!model)
307 return -ENODEV;
1da177e4 308
ee5caf0e 309 if (!strcmp(model, "mk48t02")) {
1da177e4 310 sp_clock_typ = MSTK48T02;
ee5caf0e 311
1da177e4 312 /* Map the clock register io area read-only */
ee5caf0e
DM
313 mstk48t02_regs = of_ioremap(&op->resource[0], 0,
314 sizeof(struct mostek48t02),
315 "mk48t02");
1da177e4 316 mstk48t08_regs = NULL; /* To catch weirdness */
ee5caf0e 317 } else if (!strcmp(model, "mk48t08")) {
1da177e4 318 sp_clock_typ = MSTK48T08;
ee5caf0e
DM
319 mstk48t08_regs = of_ioremap(&op->resource[0], 0,
320 sizeof(struct mostek48t08),
321 "mk48t08");
1da177e4
LT
322
323 mstk48t02_regs = &mstk48t08_regs->regs;
ee5caf0e
DM
324 } else
325 return -ENODEV;
1da177e4
LT
326
327 /* Report a low battery voltage condition. */
328 if (has_low_battery())
329 printk(KERN_CRIT "NVRAM: Low battery voltage!\n");
330
331 /* Kick start the clock if it is completely stopped. */
332 if (mostek_read(mstk48t02_regs + MOSTEK_SEC) & MSTK_STOP)
333 kick_start_clock();
ee5caf0e 334
96ba989d
BB
335 mostek_set_system_time();
336
ee5caf0e
DM
337 return 0;
338}
339
340static struct of_device_id clock_match[] = {
341 {
342 .name = "eeprom",
343 },
344 {},
345};
346
347static struct of_platform_driver clock_driver = {
348 .name = "clock",
349 .match_table = clock_match,
350 .probe = clock_probe,
351};
352
353
354/* Probe for the mostek real time clock chip. */
96ba989d 355static int __init clock_init(void)
ee5caf0e 356{
37b7754a 357 return of_register_driver(&clock_driver, &of_platform_bus_type);
1da177e4
LT
358}
359
96ba989d
BB
360/* Must be after subsys_initcall() so that busses are probed. Must
361 * be before device_initcall() because things like the RTC driver
362 * need to see the clock registers.
363 */
364fs_initcall(clock_init);
365#endif /* !CONFIG_SUN4 */
366
1da177e4
LT
367void __init sbus_time_init(void)
368{
1da177e4
LT
369
370 BTFIXUPSET_CALL(bus_do_settimeofday, sbus_do_settimeofday, BTFIXUPCALL_NORM);
371 btfixup();
372
373 if (ARCH_SUN4)
374 sun4_clock_probe();
1da177e4
LT
375
376 sparc_init_timers(timer_interrupt);
377
378#ifdef CONFIG_SUN4
379 if(idprom->id_machtype == (SM_SUN4 | SM_4_330)) {
96ba989d 380 mostek_set_system_time();
1da177e4
LT
381 } else if(idprom->id_machtype == (SM_SUN4 | SM_4_260) ) {
382 /* initialise the intersil on sun4 */
96ba989d
BB
383 unsigned int year, mon, day, hour, min, sec;
384 int temp;
385 struct intersil *iregs;
1da177e4
LT
386
387 iregs=intersil_clock;
388 if(!iregs) {
389 prom_printf("Something wrong, clock regs not mapped yet.\n");
390 prom_halt();
391 }
392
393 intersil_intr(intersil_clock,INTERSIL_INT_100HZ);
394 disable_pil_irq(10);
395 intersil_stop(iregs);
396 intersil_read_intr(intersil_clock, temp);
397
398 temp = iregs->clk.int_csec;
399
400 sec = iregs->clk.int_sec;
401 min = iregs->clk.int_min;
402 hour = iregs->clk.int_hour;
403 day = iregs->clk.int_day;
404 mon = iregs->clk.int_month;
405 year = MSTK_CVT_YEAR(iregs->clk.int_year);
406
407 enable_pil_irq(10);
408 intersil_start(iregs);
409
410 xtime.tv_sec = mktime(year, mon, day, hour, min, sec);
411 xtime.tv_nsec = (INITIAL_JIFFIES % HZ) * (NSEC_PER_SEC / HZ);
412 set_normalized_timespec(&wall_to_monotonic,
413 -xtime.tv_sec, -xtime.tv_nsec);
414 printk("%u/%u/%u %u:%u:%u\n",day,mon,year,hour,min,sec);
415 }
416#endif
417
418 /* Now that OBP ticker has been silenced, it is safe to enable IRQ. */
419 local_irq_enable();
420}
421
422void __init time_init(void)
423{
424#ifdef CONFIG_PCI
425 extern void pci_time_init(void);
426 if (pcic_present()) {
427 pci_time_init();
428 return;
429 }
430#endif
431 sbus_time_init();
432}
433
3115624e 434static inline unsigned long do_gettimeoffset(void)
1da177e4
LT
435{
436 return (*master_l10_counter >> 10) & 0x1fffff;
437}
438
1da177e4
LT
439/* Ok, my cute asm atomicity trick doesn't work anymore.
440 * There are just too many variables that need to be protected
8ef38609 441 * now (both members of xtime, et al.)
1da177e4
LT
442 */
443void do_gettimeofday(struct timeval *tv)
444{
445 unsigned long flags;
446 unsigned long seq;
447 unsigned long usec, sec;
448 unsigned long max_ntp_tick = tick_usec - tickadj;
449
450 do {
1da177e4
LT
451 seq = read_seqbegin_irqsave(&xtime_lock, flags);
452 usec = do_gettimeoffset();
1da177e4
LT
453
454 /*
455 * If time_adjust is negative then NTP is slowing the clock
456 * so make sure not to go into next possible interval.
457 * Better to lose some accuracy than have time go backwards..
458 */
8ef38609 459 if (unlikely(time_adjust < 0))
1da177e4
LT
460 usec = min(usec, max_ntp_tick);
461
1da177e4
LT
462 sec = xtime.tv_sec;
463 usec += (xtime.tv_nsec / 1000);
464 } while (read_seqretry_irqrestore(&xtime_lock, seq, flags));
465
466 while (usec >= 1000000) {
467 usec -= 1000000;
468 sec++;
469 }
470
471 tv->tv_sec = sec;
472 tv->tv_usec = usec;
473}
474
475EXPORT_SYMBOL(do_gettimeofday);
476
477int do_settimeofday(struct timespec *tv)
478{
479 int ret;
480
481 write_seqlock_irq(&xtime_lock);
482 ret = bus_do_settimeofday(tv);
483 write_sequnlock_irq(&xtime_lock);
484 clock_was_set();
485 return ret;
486}
487
488EXPORT_SYMBOL(do_settimeofday);
489
490static int sbus_do_settimeofday(struct timespec *tv)
491{
492 time_t wtm_sec, sec = tv->tv_sec;
493 long wtm_nsec, nsec = tv->tv_nsec;
494
495 if ((unsigned long)tv->tv_nsec >= NSEC_PER_SEC)
496 return -EINVAL;
497
498 /*
499 * This is revolting. We need to set "xtime" correctly. However, the
500 * value in this location is the value at the most recent update of
501 * wall time. Discover what correction gettimeofday() would have
502 * made, and then undo it!
503 */
8ef38609 504 nsec -= 1000 * do_gettimeoffset();
1da177e4
LT
505
506 wtm_sec = wall_to_monotonic.tv_sec + (xtime.tv_sec - sec);
507 wtm_nsec = wall_to_monotonic.tv_nsec + (xtime.tv_nsec - nsec);
508
509 set_normalized_timespec(&xtime, sec, nsec);
510 set_normalized_timespec(&wall_to_monotonic, wtm_sec, wtm_nsec);
511
b149ee22 512 ntp_clear();
1da177e4
LT
513 return 0;
514}
515
516/*
517 * BUG: This routine does not handle hour overflow properly; it just
518 * sets the minutes. Usually you won't notice until after reboot!
519 */
520static int set_rtc_mmss(unsigned long nowtime)
521{
522 int real_seconds, real_minutes, mostek_minutes;
523 struct mostek48t02 *regs = (struct mostek48t02 *)mstk48t02_regs;
524 unsigned long flags;
525#ifdef CONFIG_SUN4
526 struct intersil *iregs = intersil_clock;
527 int temp;
528#endif
529
530 /* Not having a register set can lead to trouble. */
531 if (!regs) {
532#ifdef CONFIG_SUN4
533 if(!iregs)
534 return -1;
535 else {
536 temp = iregs->clk.int_csec;
537
538 mostek_minutes = iregs->clk.int_min;
539
540 real_seconds = nowtime % 60;
541 real_minutes = nowtime / 60;
542 if (((abs(real_minutes - mostek_minutes) + 15)/30) & 1)
543 real_minutes += 30; /* correct for half hour time zone */
544 real_minutes %= 60;
545
546 if (abs(real_minutes - mostek_minutes) < 30) {
547 intersil_stop(iregs);
548 iregs->clk.int_sec=real_seconds;
549 iregs->clk.int_min=real_minutes;
550 intersil_start(iregs);
551 } else {
552 printk(KERN_WARNING
553 "set_rtc_mmss: can't update from %d to %d\n",
554 mostek_minutes, real_minutes);
555 return -1;
556 }
557
558 return 0;
559 }
560#endif
561 }
562
563 spin_lock_irqsave(&mostek_lock, flags);
564 /* Read the current RTC minutes. */
565 regs->creg |= MSTK_CREG_READ;
566 mostek_minutes = MSTK_REG_MIN(regs);
567 regs->creg &= ~MSTK_CREG_READ;
568
569 /*
570 * since we're only adjusting minutes and seconds,
571 * don't interfere with hour overflow. This avoids
572 * messing with unknown time zones but requires your
573 * RTC not to be off by more than 15 minutes
574 */
575 real_seconds = nowtime % 60;
576 real_minutes = nowtime / 60;
577 if (((abs(real_minutes - mostek_minutes) + 15)/30) & 1)
578 real_minutes += 30; /* correct for half hour time zone */
579 real_minutes %= 60;
580
581 if (abs(real_minutes - mostek_minutes) < 30) {
582 regs->creg |= MSTK_CREG_WRITE;
583 MSTK_SET_REG_SEC(regs,real_seconds);
584 MSTK_SET_REG_MIN(regs,real_minutes);
585 regs->creg &= ~MSTK_CREG_WRITE;
586 spin_unlock_irqrestore(&mostek_lock, flags);
587 return 0;
588 } else {
589 spin_unlock_irqrestore(&mostek_lock, flags);
590 return -1;
591 }
592}