Commit | Line | Data |
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1da177e4 LT |
1 | /* |
2 | * arch/s390/kernel/smp.c | |
3 | * | |
39ce010d | 4 | * Copyright IBM Corp. 1999,2007 |
1da177e4 | 5 | * Author(s): Denis Joseph Barrow (djbarrow@de.ibm.com,barrow_dj@yahoo.com), |
39ce010d HC |
6 | * Martin Schwidefsky (schwidefsky@de.ibm.com) |
7 | * Heiko Carstens (heiko.carstens@de.ibm.com) | |
1da177e4 | 8 | * |
39ce010d | 9 | * based on other smp stuff by |
1da177e4 LT |
10 | * (c) 1995 Alan Cox, CymruNET Ltd <alan@cymru.net> |
11 | * (c) 1998 Ingo Molnar | |
12 | * | |
13 | * We work with logical cpu numbering everywhere we can. The only | |
14 | * functions using the real cpu address (got from STAP) are the sigp | |
15 | * functions. For all other functions we use the identity mapping. | |
16 | * That means that cpu_number_map[i] == i for every cpu. cpu_number_map is | |
17 | * used e.g. to find the idle task belonging to a logical cpu. Every array | |
18 | * in the kernel is sorted by the logical cpu number and not by the physical | |
19 | * one which is causing all the confusion with __cpu_logical_map and | |
20 | * cpu_number_map in other architectures. | |
21 | */ | |
22 | ||
23 | #include <linux/module.h> | |
24 | #include <linux/init.h> | |
1da177e4 | 25 | #include <linux/mm.h> |
4e950f6f | 26 | #include <linux/err.h> |
1da177e4 LT |
27 | #include <linux/spinlock.h> |
28 | #include <linux/kernel_stat.h> | |
1da177e4 LT |
29 | #include <linux/delay.h> |
30 | #include <linux/cache.h> | |
31 | #include <linux/interrupt.h> | |
32 | #include <linux/cpu.h> | |
2b67fc46 | 33 | #include <linux/timex.h> |
411ed322 | 34 | #include <linux/bootmem.h> |
46b05d26 | 35 | #include <asm/ipl.h> |
2b67fc46 | 36 | #include <asm/setup.h> |
1da177e4 LT |
37 | #include <asm/sigp.h> |
38 | #include <asm/pgalloc.h> | |
39 | #include <asm/irq.h> | |
40 | #include <asm/s390_ext.h> | |
41 | #include <asm/cpcmd.h> | |
42 | #include <asm/tlbflush.h> | |
2b67fc46 | 43 | #include <asm/timer.h> |
411ed322 | 44 | #include <asm/lowcore.h> |
08d07968 | 45 | #include <asm/sclp.h> |
fae8b22d | 46 | #include <asm/cpu.h> |
a806170e | 47 | #include "entry.h" |
1da177e4 | 48 | |
1da177e4 LT |
49 | /* |
50 | * An array with a pointer the lowcore of every CPU. | |
51 | */ | |
1da177e4 | 52 | struct _lowcore *lowcore_ptr[NR_CPUS]; |
39ce010d | 53 | EXPORT_SYMBOL(lowcore_ptr); |
1da177e4 | 54 | |
255acee7 | 55 | cpumask_t cpu_online_map = CPU_MASK_NONE; |
39ce010d HC |
56 | EXPORT_SYMBOL(cpu_online_map); |
57 | ||
48483b32 | 58 | cpumask_t cpu_possible_map = CPU_MASK_ALL; |
39ce010d | 59 | EXPORT_SYMBOL(cpu_possible_map); |
1da177e4 LT |
60 | |
61 | static struct task_struct *current_set[NR_CPUS]; | |
62 | ||
08d07968 HC |
63 | static u8 smp_cpu_type; |
64 | static int smp_use_sigp_detection; | |
65 | ||
66 | enum s390_cpu_state { | |
67 | CPU_STATE_STANDBY, | |
68 | CPU_STATE_CONFIGURED, | |
69 | }; | |
70 | ||
dbd70fb4 | 71 | DEFINE_MUTEX(smp_cpu_state_mutex); |
c10fde0d | 72 | int smp_cpu_polarization[NR_CPUS]; |
08d07968 | 73 | static int smp_cpu_state[NR_CPUS]; |
c10fde0d | 74 | static int cpu_management; |
08d07968 HC |
75 | |
76 | static DEFINE_PER_CPU(struct cpu, cpu_devices); | |
08d07968 | 77 | |
1da177e4 | 78 | static void smp_ext_bitcall(int, ec_bit_sig); |
1da177e4 LT |
79 | |
80 | /* | |
63db6e8d JG |
81 | * Structure and data for __smp_call_function_map(). This is designed to |
82 | * minimise static memory requirements. It also looks cleaner. | |
1da177e4 LT |
83 | */ |
84 | static DEFINE_SPINLOCK(call_lock); | |
85 | ||
86 | struct call_data_struct { | |
87 | void (*func) (void *info); | |
88 | void *info; | |
63db6e8d JG |
89 | cpumask_t started; |
90 | cpumask_t finished; | |
1da177e4 LT |
91 | int wait; |
92 | }; | |
93 | ||
39ce010d | 94 | static struct call_data_struct *call_data; |
1da177e4 LT |
95 | |
96 | /* | |
97 | * 'Call function' interrupt callback | |
98 | */ | |
99 | static void do_call_function(void) | |
100 | { | |
101 | void (*func) (void *info) = call_data->func; | |
102 | void *info = call_data->info; | |
103 | int wait = call_data->wait; | |
104 | ||
63db6e8d | 105 | cpu_set(smp_processor_id(), call_data->started); |
1da177e4 LT |
106 | (*func)(info); |
107 | if (wait) | |
63db6e8d | 108 | cpu_set(smp_processor_id(), call_data->finished);; |
1da177e4 LT |
109 | } |
110 | ||
63db6e8d | 111 | static void __smp_call_function_map(void (*func) (void *info), void *info, |
8691e5a8 | 112 | int wait, cpumask_t map) |
1da177e4 LT |
113 | { |
114 | struct call_data_struct data; | |
63db6e8d | 115 | int cpu, local = 0; |
1da177e4 | 116 | |
63db6e8d | 117 | /* |
25864162 | 118 | * Can deadlock when interrupts are disabled or if in wrong context. |
63db6e8d | 119 | */ |
25864162 | 120 | WARN_ON(irqs_disabled() || in_irq()); |
1da177e4 | 121 | |
63db6e8d JG |
122 | /* |
123 | * Check for local function call. We have to have the same call order | |
124 | * as in on_each_cpu() because of machine_restart_smp(). | |
125 | */ | |
126 | if (cpu_isset(smp_processor_id(), map)) { | |
127 | local = 1; | |
128 | cpu_clear(smp_processor_id(), map); | |
129 | } | |
130 | ||
131 | cpus_and(map, map, cpu_online_map); | |
132 | if (cpus_empty(map)) | |
133 | goto out; | |
1da177e4 LT |
134 | |
135 | data.func = func; | |
136 | data.info = info; | |
63db6e8d | 137 | data.started = CPU_MASK_NONE; |
1da177e4 LT |
138 | data.wait = wait; |
139 | if (wait) | |
63db6e8d | 140 | data.finished = CPU_MASK_NONE; |
1da177e4 | 141 | |
1da177e4 | 142 | call_data = &data; |
63db6e8d JG |
143 | |
144 | for_each_cpu_mask(cpu, map) | |
145 | smp_ext_bitcall(cpu, ec_call_function); | |
1da177e4 LT |
146 | |
147 | /* Wait for response */ | |
63db6e8d | 148 | while (!cpus_equal(map, data.started)) |
1da177e4 | 149 | cpu_relax(); |
1da177e4 | 150 | if (wait) |
63db6e8d | 151 | while (!cpus_equal(map, data.finished)) |
1da177e4 | 152 | cpu_relax(); |
63db6e8d | 153 | out: |
8da1aecd HC |
154 | if (local) { |
155 | local_irq_disable(); | |
63db6e8d | 156 | func(info); |
8da1aecd HC |
157 | local_irq_enable(); |
158 | } | |
1da177e4 LT |
159 | } |
160 | ||
161 | /* | |
63db6e8d JG |
162 | * smp_call_function: |
163 | * @func: the function to run; this must be fast and non-blocking | |
164 | * @info: an arbitrary pointer to pass to the function | |
63db6e8d | 165 | * @wait: if true, wait (atomically) until function has completed on other CPUs |
1da177e4 | 166 | * |
63db6e8d | 167 | * Run a function on all other CPUs. |
1da177e4 | 168 | * |
39ce010d HC |
169 | * You must not call this function with disabled interrupts, from a |
170 | * hardware interrupt handler or from a bottom half. | |
1da177e4 | 171 | */ |
8691e5a8 | 172 | int smp_call_function(void (*func) (void *info), void *info, int wait) |
1da177e4 | 173 | { |
63db6e8d | 174 | cpumask_t map; |
1da177e4 | 175 | |
85cb185d | 176 | spin_lock(&call_lock); |
63db6e8d JG |
177 | map = cpu_online_map; |
178 | cpu_clear(smp_processor_id(), map); | |
8691e5a8 | 179 | __smp_call_function_map(func, info, wait, map); |
85cb185d | 180 | spin_unlock(&call_lock); |
63db6e8d JG |
181 | return 0; |
182 | } | |
183 | EXPORT_SYMBOL(smp_call_function); | |
1da177e4 | 184 | |
63db6e8d | 185 | /* |
3bb447fc HC |
186 | * smp_call_function_single: |
187 | * @cpu: the CPU where func should run | |
63db6e8d JG |
188 | * @func: the function to run; this must be fast and non-blocking |
189 | * @info: an arbitrary pointer to pass to the function | |
63db6e8d | 190 | * @wait: if true, wait (atomically) until function has completed on other CPUs |
63db6e8d JG |
191 | * |
192 | * Run a function on one processor. | |
193 | * | |
39ce010d HC |
194 | * You must not call this function with disabled interrupts, from a |
195 | * hardware interrupt handler or from a bottom half. | |
63db6e8d | 196 | */ |
3bb447fc | 197 | int smp_call_function_single(int cpu, void (*func) (void *info), void *info, |
8691e5a8 | 198 | int wait) |
63db6e8d | 199 | { |
85cb185d | 200 | spin_lock(&call_lock); |
8691e5a8 | 201 | __smp_call_function_map(func, info, wait, cpumask_of_cpu(cpu)); |
85cb185d | 202 | spin_unlock(&call_lock); |
1da177e4 LT |
203 | return 0; |
204 | } | |
3bb447fc | 205 | EXPORT_SYMBOL(smp_call_function_single); |
1da177e4 | 206 | |
dab5209c CO |
207 | /** |
208 | * smp_call_function_mask(): Run a function on a set of other CPUs. | |
209 | * @mask: The set of cpus to run on. Must not include the current cpu. | |
210 | * @func: The function to run. This must be fast and non-blocking. | |
211 | * @info: An arbitrary pointer to pass to the function. | |
212 | * @wait: If true, wait (atomically) until function has completed on other CPUs. | |
213 | * | |
214 | * Returns 0 on success, else a negative status code. | |
215 | * | |
216 | * If @wait is true, then returns once @func has returned; otherwise | |
217 | * it returns just before the target cpu calls @func. | |
218 | * | |
219 | * You must not call this function with disabled interrupts or from a | |
220 | * hardware interrupt handler or from a bottom half handler. | |
221 | */ | |
37c5f719 HC |
222 | int smp_call_function_mask(cpumask_t mask, void (*func)(void *), void *info, |
223 | int wait) | |
dab5209c | 224 | { |
85cb185d | 225 | spin_lock(&call_lock); |
37c5f719 | 226 | cpu_clear(smp_processor_id(), mask); |
8691e5a8 | 227 | __smp_call_function_map(func, info, wait, mask); |
85cb185d | 228 | spin_unlock(&call_lock); |
dab5209c CO |
229 | return 0; |
230 | } | |
231 | EXPORT_SYMBOL(smp_call_function_mask); | |
232 | ||
677d7623 | 233 | void smp_send_stop(void) |
1da177e4 | 234 | { |
39ce010d | 235 | int cpu, rc; |
1da177e4 | 236 | |
677d7623 HC |
237 | /* Disable all interrupts/machine checks */ |
238 | __load_psw_mask(psw_kernel_bits & ~PSW_MASK_MCHECK); | |
1da177e4 | 239 | |
677d7623 HC |
240 | /* write magic number to zero page (absolute 0) */ |
241 | lowcore_ptr[smp_processor_id()]->panic_magic = __PANIC_MAGIC; | |
1da177e4 | 242 | |
677d7623 | 243 | /* stop all processors */ |
1da177e4 LT |
244 | for_each_online_cpu(cpu) { |
245 | if (cpu == smp_processor_id()) | |
246 | continue; | |
247 | do { | |
677d7623 | 248 | rc = signal_processor(cpu, sigp_stop); |
39ce010d | 249 | } while (rc == sigp_busy); |
1da177e4 | 250 | |
39ce010d | 251 | while (!smp_cpu_not_running(cpu)) |
c6b5b847 HC |
252 | cpu_relax(); |
253 | } | |
254 | } | |
255 | ||
1da177e4 LT |
256 | /* |
257 | * This is the main routine where commands issued by other | |
258 | * cpus are handled. | |
259 | */ | |
260 | ||
2b67fc46 | 261 | static void do_ext_call_interrupt(__u16 code) |
1da177e4 | 262 | { |
39ce010d | 263 | unsigned long bits; |
1da177e4 | 264 | |
39ce010d HC |
265 | /* |
266 | * handle bit signal external calls | |
267 | * | |
268 | * For the ec_schedule signal we have to do nothing. All the work | |
269 | * is done automatically when we return from the interrupt. | |
270 | */ | |
1da177e4 LT |
271 | bits = xchg(&S390_lowcore.ext_call_fast, 0); |
272 | ||
39ce010d | 273 | if (test_bit(ec_call_function, &bits)) |
1da177e4 LT |
274 | do_call_function(); |
275 | } | |
276 | ||
277 | /* | |
278 | * Send an external call sigp to another cpu and return without waiting | |
279 | * for its completion. | |
280 | */ | |
281 | static void smp_ext_bitcall(int cpu, ec_bit_sig sig) | |
282 | { | |
39ce010d HC |
283 | /* |
284 | * Set signaling bit in lowcore of target cpu and kick it | |
285 | */ | |
1da177e4 | 286 | set_bit(sig, (unsigned long *) &lowcore_ptr[cpu]->ext_call_fast); |
39ce010d | 287 | while (signal_processor(cpu, sigp_emergency_signal) == sigp_busy) |
1da177e4 LT |
288 | udelay(10); |
289 | } | |
290 | ||
347a8dc3 | 291 | #ifndef CONFIG_64BIT |
1da177e4 LT |
292 | /* |
293 | * this function sends a 'purge tlb' signal to another CPU. | |
294 | */ | |
a806170e | 295 | static void smp_ptlb_callback(void *info) |
1da177e4 | 296 | { |
ba8a9229 | 297 | __tlb_flush_local(); |
1da177e4 LT |
298 | } |
299 | ||
300 | void smp_ptlb_all(void) | |
301 | { | |
15c8b6c1 | 302 | on_each_cpu(smp_ptlb_callback, NULL, 1); |
1da177e4 LT |
303 | } |
304 | EXPORT_SYMBOL(smp_ptlb_all); | |
347a8dc3 | 305 | #endif /* ! CONFIG_64BIT */ |
1da177e4 LT |
306 | |
307 | /* | |
308 | * this function sends a 'reschedule' IPI to another CPU. | |
309 | * it goes straight through and wastes no time serializing | |
310 | * anything. Worst case is that we lose a reschedule ... | |
311 | */ | |
312 | void smp_send_reschedule(int cpu) | |
313 | { | |
39ce010d | 314 | smp_ext_bitcall(cpu, ec_schedule); |
1da177e4 LT |
315 | } |
316 | ||
317 | /* | |
318 | * parameter area for the set/clear control bit callbacks | |
319 | */ | |
94c12cc7 | 320 | struct ec_creg_mask_parms { |
1da177e4 LT |
321 | unsigned long orvals[16]; |
322 | unsigned long andvals[16]; | |
94c12cc7 | 323 | }; |
1da177e4 LT |
324 | |
325 | /* | |
326 | * callback for setting/clearing control bits | |
327 | */ | |
39ce010d HC |
328 | static void smp_ctl_bit_callback(void *info) |
329 | { | |
94c12cc7 | 330 | struct ec_creg_mask_parms *pp = info; |
1da177e4 LT |
331 | unsigned long cregs[16]; |
332 | int i; | |
39ce010d | 333 | |
94c12cc7 MS |
334 | __ctl_store(cregs, 0, 15); |
335 | for (i = 0; i <= 15; i++) | |
1da177e4 | 336 | cregs[i] = (cregs[i] & pp->andvals[i]) | pp->orvals[i]; |
94c12cc7 | 337 | __ctl_load(cregs, 0, 15); |
1da177e4 LT |
338 | } |
339 | ||
340 | /* | |
341 | * Set a bit in a control register of all cpus | |
342 | */ | |
94c12cc7 MS |
343 | void smp_ctl_set_bit(int cr, int bit) |
344 | { | |
345 | struct ec_creg_mask_parms parms; | |
1da177e4 | 346 | |
94c12cc7 MS |
347 | memset(&parms.orvals, 0, sizeof(parms.orvals)); |
348 | memset(&parms.andvals, 0xff, sizeof(parms.andvals)); | |
1da177e4 | 349 | parms.orvals[cr] = 1 << bit; |
15c8b6c1 | 350 | on_each_cpu(smp_ctl_bit_callback, &parms, 1); |
1da177e4 | 351 | } |
39ce010d | 352 | EXPORT_SYMBOL(smp_ctl_set_bit); |
1da177e4 LT |
353 | |
354 | /* | |
355 | * Clear a bit in a control register of all cpus | |
356 | */ | |
94c12cc7 MS |
357 | void smp_ctl_clear_bit(int cr, int bit) |
358 | { | |
359 | struct ec_creg_mask_parms parms; | |
1da177e4 | 360 | |
94c12cc7 MS |
361 | memset(&parms.orvals, 0, sizeof(parms.orvals)); |
362 | memset(&parms.andvals, 0xff, sizeof(parms.andvals)); | |
1da177e4 | 363 | parms.andvals[cr] = ~(1L << bit); |
15c8b6c1 | 364 | on_each_cpu(smp_ctl_bit_callback, &parms, 1); |
1da177e4 | 365 | } |
39ce010d | 366 | EXPORT_SYMBOL(smp_ctl_clear_bit); |
1da177e4 | 367 | |
08d07968 HC |
368 | /* |
369 | * In early ipl state a temp. logically cpu number is needed, so the sigp | |
370 | * functions can be used to sense other cpus. Since NR_CPUS is >= 2 on | |
371 | * CONFIG_SMP and the ipl cpu is logical cpu 0, it must be 1. | |
372 | */ | |
373 | #define CPU_INIT_NO 1 | |
374 | ||
411ed322 MH |
375 | #if defined(CONFIG_ZFCPDUMP) || defined(CONFIG_ZFCPDUMP_MODULE) |
376 | ||
377 | /* | |
378 | * zfcpdump_prefix_array holds prefix registers for the following scenario: | |
379 | * 64 bit zfcpdump kernel and 31 bit kernel which is to be dumped. We have to | |
380 | * save its prefix registers, since they get lost, when switching from 31 bit | |
381 | * to 64 bit. | |
382 | */ | |
383 | unsigned int zfcpdump_prefix_array[NR_CPUS + 1] \ | |
384 | __attribute__((__section__(".data"))); | |
385 | ||
285f6722 | 386 | static void __init smp_get_save_area(unsigned int cpu, unsigned int phy_cpu) |
411ed322 | 387 | { |
411ed322 MH |
388 | if (ipl_info.type != IPL_TYPE_FCP_DUMP) |
389 | return; | |
285f6722 HC |
390 | if (cpu >= NR_CPUS) { |
391 | printk(KERN_WARNING "Registers for cpu %i not saved since dump " | |
392 | "kernel was compiled with NR_CPUS=%i\n", cpu, NR_CPUS); | |
393 | return; | |
411ed322 | 394 | } |
48483b32 | 395 | zfcpdump_save_areas[cpu] = kmalloc(sizeof(union save_area), GFP_KERNEL); |
08d07968 HC |
396 | __cpu_logical_map[CPU_INIT_NO] = (__u16) phy_cpu; |
397 | while (signal_processor(CPU_INIT_NO, sigp_stop_and_store_status) == | |
398 | sigp_busy) | |
285f6722 HC |
399 | cpu_relax(); |
400 | memcpy(zfcpdump_save_areas[cpu], | |
401 | (void *)(unsigned long) store_prefix() + SAVE_AREA_BASE, | |
402 | SAVE_AREA_SIZE); | |
403 | #ifdef CONFIG_64BIT | |
404 | /* copy original prefix register */ | |
405 | zfcpdump_save_areas[cpu]->s390x.pref_reg = zfcpdump_prefix_array[cpu]; | |
406 | #endif | |
411ed322 MH |
407 | } |
408 | ||
409 | union save_area *zfcpdump_save_areas[NR_CPUS + 1]; | |
410 | EXPORT_SYMBOL_GPL(zfcpdump_save_areas); | |
411 | ||
412 | #else | |
285f6722 HC |
413 | |
414 | static inline void smp_get_save_area(unsigned int cpu, unsigned int phy_cpu) { } | |
415 | ||
416 | #endif /* CONFIG_ZFCPDUMP || CONFIG_ZFCPDUMP_MODULE */ | |
411ed322 | 417 | |
08d07968 HC |
418 | static int cpu_stopped(int cpu) |
419 | { | |
420 | __u32 status; | |
421 | ||
422 | /* Check for stopped state */ | |
423 | if (signal_processor_ps(&status, 0, cpu, sigp_sense) == | |
424 | sigp_status_stored) { | |
425 | if (status & 0x40) | |
426 | return 1; | |
427 | } | |
428 | return 0; | |
429 | } | |
430 | ||
08d07968 HC |
431 | static int cpu_known(int cpu_id) |
432 | { | |
433 | int cpu; | |
434 | ||
435 | for_each_present_cpu(cpu) { | |
436 | if (__cpu_logical_map[cpu] == cpu_id) | |
437 | return 1; | |
438 | } | |
439 | return 0; | |
440 | } | |
441 | ||
442 | static int smp_rescan_cpus_sigp(cpumask_t avail) | |
443 | { | |
444 | int cpu_id, logical_cpu; | |
445 | ||
446 | logical_cpu = first_cpu(avail); | |
447 | if (logical_cpu == NR_CPUS) | |
448 | return 0; | |
449 | for (cpu_id = 0; cpu_id <= 65535; cpu_id++) { | |
450 | if (cpu_known(cpu_id)) | |
451 | continue; | |
452 | __cpu_logical_map[logical_cpu] = cpu_id; | |
c10fde0d | 453 | smp_cpu_polarization[logical_cpu] = POLARIZATION_UNKNWN; |
08d07968 HC |
454 | if (!cpu_stopped(logical_cpu)) |
455 | continue; | |
456 | cpu_set(logical_cpu, cpu_present_map); | |
457 | smp_cpu_state[logical_cpu] = CPU_STATE_CONFIGURED; | |
458 | logical_cpu = next_cpu(logical_cpu, avail); | |
459 | if (logical_cpu == NR_CPUS) | |
460 | break; | |
461 | } | |
462 | return 0; | |
463 | } | |
464 | ||
48483b32 | 465 | static int smp_rescan_cpus_sclp(cpumask_t avail) |
08d07968 HC |
466 | { |
467 | struct sclp_cpu_info *info; | |
468 | int cpu_id, logical_cpu, cpu; | |
469 | int rc; | |
470 | ||
471 | logical_cpu = first_cpu(avail); | |
472 | if (logical_cpu == NR_CPUS) | |
473 | return 0; | |
48483b32 | 474 | info = kmalloc(sizeof(*info), GFP_KERNEL); |
08d07968 HC |
475 | if (!info) |
476 | return -ENOMEM; | |
477 | rc = sclp_get_cpu_info(info); | |
478 | if (rc) | |
479 | goto out; | |
480 | for (cpu = 0; cpu < info->combined; cpu++) { | |
481 | if (info->has_cpu_type && info->cpu[cpu].type != smp_cpu_type) | |
482 | continue; | |
483 | cpu_id = info->cpu[cpu].address; | |
484 | if (cpu_known(cpu_id)) | |
485 | continue; | |
486 | __cpu_logical_map[logical_cpu] = cpu_id; | |
c10fde0d | 487 | smp_cpu_polarization[logical_cpu] = POLARIZATION_UNKNWN; |
08d07968 HC |
488 | cpu_set(logical_cpu, cpu_present_map); |
489 | if (cpu >= info->configured) | |
490 | smp_cpu_state[logical_cpu] = CPU_STATE_STANDBY; | |
491 | else | |
492 | smp_cpu_state[logical_cpu] = CPU_STATE_CONFIGURED; | |
493 | logical_cpu = next_cpu(logical_cpu, avail); | |
494 | if (logical_cpu == NR_CPUS) | |
495 | break; | |
496 | } | |
497 | out: | |
48483b32 | 498 | kfree(info); |
08d07968 HC |
499 | return rc; |
500 | } | |
501 | ||
1e489518 | 502 | static int __smp_rescan_cpus(void) |
08d07968 HC |
503 | { |
504 | cpumask_t avail; | |
505 | ||
48483b32 | 506 | cpus_xor(avail, cpu_possible_map, cpu_present_map); |
08d07968 HC |
507 | if (smp_use_sigp_detection) |
508 | return smp_rescan_cpus_sigp(avail); | |
509 | else | |
510 | return smp_rescan_cpus_sclp(avail); | |
1da177e4 LT |
511 | } |
512 | ||
48483b32 HC |
513 | static void __init smp_detect_cpus(void) |
514 | { | |
515 | unsigned int cpu, c_cpus, s_cpus; | |
516 | struct sclp_cpu_info *info; | |
517 | u16 boot_cpu_addr, cpu_addr; | |
518 | ||
519 | c_cpus = 1; | |
520 | s_cpus = 0; | |
521 | boot_cpu_addr = S390_lowcore.cpu_data.cpu_addr; | |
522 | info = kmalloc(sizeof(*info), GFP_KERNEL); | |
523 | if (!info) | |
524 | panic("smp_detect_cpus failed to allocate memory\n"); | |
525 | /* Use sigp detection algorithm if sclp doesn't work. */ | |
526 | if (sclp_get_cpu_info(info)) { | |
527 | smp_use_sigp_detection = 1; | |
528 | for (cpu = 0; cpu <= 65535; cpu++) { | |
529 | if (cpu == boot_cpu_addr) | |
530 | continue; | |
531 | __cpu_logical_map[CPU_INIT_NO] = cpu; | |
532 | if (!cpu_stopped(CPU_INIT_NO)) | |
533 | continue; | |
534 | smp_get_save_area(c_cpus, cpu); | |
535 | c_cpus++; | |
536 | } | |
537 | goto out; | |
538 | } | |
539 | ||
540 | if (info->has_cpu_type) { | |
541 | for (cpu = 0; cpu < info->combined; cpu++) { | |
542 | if (info->cpu[cpu].address == boot_cpu_addr) { | |
543 | smp_cpu_type = info->cpu[cpu].type; | |
544 | break; | |
545 | } | |
546 | } | |
547 | } | |
548 | ||
549 | for (cpu = 0; cpu < info->combined; cpu++) { | |
550 | if (info->has_cpu_type && info->cpu[cpu].type != smp_cpu_type) | |
551 | continue; | |
552 | cpu_addr = info->cpu[cpu].address; | |
553 | if (cpu_addr == boot_cpu_addr) | |
554 | continue; | |
555 | __cpu_logical_map[CPU_INIT_NO] = cpu_addr; | |
556 | if (!cpu_stopped(CPU_INIT_NO)) { | |
557 | s_cpus++; | |
558 | continue; | |
559 | } | |
560 | smp_get_save_area(c_cpus, cpu_addr); | |
561 | c_cpus++; | |
562 | } | |
563 | out: | |
564 | kfree(info); | |
565 | printk(KERN_INFO "CPUs: %d configured, %d standby\n", c_cpus, s_cpus); | |
9d40d2e3 | 566 | get_online_cpus(); |
1e489518 | 567 | __smp_rescan_cpus(); |
9d40d2e3 | 568 | put_online_cpus(); |
48483b32 HC |
569 | } |
570 | ||
1da177e4 | 571 | /* |
39ce010d | 572 | * Activate a secondary processor. |
1da177e4 | 573 | */ |
ea1f4eec | 574 | int __cpuinit start_secondary(void *cpuvoid) |
1da177e4 | 575 | { |
39ce010d HC |
576 | /* Setup the cpu */ |
577 | cpu_init(); | |
5bfb5d69 | 578 | preempt_disable(); |
d54853ef | 579 | /* Enable TOD clock interrupts on the secondary cpu. */ |
39ce010d | 580 | init_cpu_timer(); |
1da177e4 | 581 | #ifdef CONFIG_VIRT_TIMER |
d54853ef | 582 | /* Enable cpu timer interrupts on the secondary cpu. */ |
39ce010d | 583 | init_cpu_vtimer(); |
1da177e4 | 584 | #endif |
1da177e4 | 585 | /* Enable pfault pseudo page faults on this cpu. */ |
29b08d2b HC |
586 | pfault_init(); |
587 | ||
1da177e4 | 588 | /* Mark this cpu as online */ |
85cb185d | 589 | spin_lock(&call_lock); |
1da177e4 | 590 | cpu_set(smp_processor_id(), cpu_online_map); |
85cb185d | 591 | spin_unlock(&call_lock); |
1da177e4 LT |
592 | /* Switch on interrupts */ |
593 | local_irq_enable(); | |
39ce010d HC |
594 | /* Print info about this processor */ |
595 | print_cpu_info(&S390_lowcore.cpu_data); | |
596 | /* cpu_idle will call schedule for us */ | |
597 | cpu_idle(); | |
598 | return 0; | |
1da177e4 LT |
599 | } |
600 | ||
601 | static void __init smp_create_idle(unsigned int cpu) | |
602 | { | |
603 | struct task_struct *p; | |
604 | ||
605 | /* | |
606 | * don't care about the psw and regs settings since we'll never | |
607 | * reschedule the forked task. | |
608 | */ | |
609 | p = fork_idle(cpu); | |
610 | if (IS_ERR(p)) | |
611 | panic("failed fork for CPU %u: %li", cpu, PTR_ERR(p)); | |
612 | current_set[cpu] = p; | |
fae8b22d | 613 | spin_lock_init(&(&per_cpu(s390_idle, cpu))->lock); |
1da177e4 LT |
614 | } |
615 | ||
1cb6bb4b HC |
616 | static int __cpuinit smp_alloc_lowcore(int cpu) |
617 | { | |
618 | unsigned long async_stack, panic_stack; | |
619 | struct _lowcore *lowcore; | |
620 | int lc_order; | |
621 | ||
622 | lc_order = sizeof(long) == 8 ? 1 : 0; | |
623 | lowcore = (void *) __get_free_pages(GFP_KERNEL | GFP_DMA, lc_order); | |
624 | if (!lowcore) | |
625 | return -ENOMEM; | |
626 | async_stack = __get_free_pages(GFP_KERNEL, ASYNC_ORDER); | |
1cb6bb4b | 627 | panic_stack = __get_free_page(GFP_KERNEL); |
591bb4f6 HC |
628 | if (!panic_stack || !async_stack) |
629 | goto out; | |
98c7b388 HC |
630 | memcpy(lowcore, &S390_lowcore, 512); |
631 | memset((char *)lowcore + 512, 0, sizeof(*lowcore) - 512); | |
1cb6bb4b HC |
632 | lowcore->async_stack = async_stack + ASYNC_SIZE; |
633 | lowcore->panic_stack = panic_stack + PAGE_SIZE; | |
634 | ||
635 | #ifndef CONFIG_64BIT | |
636 | if (MACHINE_HAS_IEEE) { | |
637 | unsigned long save_area; | |
638 | ||
639 | save_area = get_zeroed_page(GFP_KERNEL); | |
640 | if (!save_area) | |
641 | goto out_save_area; | |
642 | lowcore->extended_save_area_addr = (u32) save_area; | |
643 | } | |
644 | #endif | |
645 | lowcore_ptr[cpu] = lowcore; | |
646 | return 0; | |
647 | ||
648 | #ifndef CONFIG_64BIT | |
649 | out_save_area: | |
650 | free_page(panic_stack); | |
651 | #endif | |
591bb4f6 | 652 | out: |
1cb6bb4b | 653 | free_pages(async_stack, ASYNC_ORDER); |
1cb6bb4b HC |
654 | free_pages((unsigned long) lowcore, lc_order); |
655 | return -ENOMEM; | |
656 | } | |
657 | ||
658 | #ifdef CONFIG_HOTPLUG_CPU | |
659 | static void smp_free_lowcore(int cpu) | |
660 | { | |
661 | struct _lowcore *lowcore; | |
662 | int lc_order; | |
663 | ||
664 | lc_order = sizeof(long) == 8 ? 1 : 0; | |
665 | lowcore = lowcore_ptr[cpu]; | |
666 | #ifndef CONFIG_64BIT | |
667 | if (MACHINE_HAS_IEEE) | |
668 | free_page((unsigned long) lowcore->extended_save_area_addr); | |
669 | #endif | |
670 | free_page(lowcore->panic_stack - PAGE_SIZE); | |
671 | free_pages(lowcore->async_stack - ASYNC_SIZE, ASYNC_ORDER); | |
672 | free_pages((unsigned long) lowcore, lc_order); | |
673 | lowcore_ptr[cpu] = NULL; | |
674 | } | |
675 | #endif /* CONFIG_HOTPLUG_CPU */ | |
676 | ||
1da177e4 | 677 | /* Upping and downing of CPUs */ |
1cb6bb4b | 678 | int __cpuinit __cpu_up(unsigned int cpu) |
1da177e4 LT |
679 | { |
680 | struct task_struct *idle; | |
39ce010d | 681 | struct _lowcore *cpu_lowcore; |
1da177e4 | 682 | struct stack_frame *sf; |
39ce010d | 683 | sigp_ccode ccode; |
1da177e4 | 684 | |
08d07968 HC |
685 | if (smp_cpu_state[cpu] != CPU_STATE_CONFIGURED) |
686 | return -EIO; | |
1cb6bb4b HC |
687 | if (smp_alloc_lowcore(cpu)) |
688 | return -ENOMEM; | |
1da177e4 LT |
689 | |
690 | ccode = signal_processor_p((__u32)(unsigned long)(lowcore_ptr[cpu]), | |
691 | cpu, sigp_set_prefix); | |
39ce010d | 692 | if (ccode) { |
1da177e4 LT |
693 | printk("sigp_set_prefix failed for cpu %d " |
694 | "with condition code %d\n", | |
695 | (int) cpu, (int) ccode); | |
696 | return -EIO; | |
697 | } | |
698 | ||
699 | idle = current_set[cpu]; | |
39ce010d | 700 | cpu_lowcore = lowcore_ptr[cpu]; |
1da177e4 | 701 | cpu_lowcore->kernel_stack = (unsigned long) |
39ce010d | 702 | task_stack_page(idle) + THREAD_SIZE; |
1cb6bb4b | 703 | cpu_lowcore->thread_info = (unsigned long) task_thread_info(idle); |
1da177e4 LT |
704 | sf = (struct stack_frame *) (cpu_lowcore->kernel_stack |
705 | - sizeof(struct pt_regs) | |
706 | - sizeof(struct stack_frame)); | |
707 | memset(sf, 0, sizeof(struct stack_frame)); | |
708 | sf->gprs[9] = (unsigned long) sf; | |
709 | cpu_lowcore->save_area[15] = (unsigned long) sf; | |
24d3e210 | 710 | __ctl_store(cpu_lowcore->cregs_save_area, 0, 15); |
94c12cc7 MS |
711 | asm volatile( |
712 | " stam 0,15,0(%0)" | |
713 | : : "a" (&cpu_lowcore->access_regs_save_area) : "memory"); | |
1da177e4 | 714 | cpu_lowcore->percpu_offset = __per_cpu_offset[cpu]; |
39ce010d HC |
715 | cpu_lowcore->current_task = (unsigned long) idle; |
716 | cpu_lowcore->cpu_data.cpu_nr = cpu; | |
591bb4f6 HC |
717 | cpu_lowcore->kernel_asce = S390_lowcore.kernel_asce; |
718 | cpu_lowcore->ipl_device = S390_lowcore.ipl_device; | |
1da177e4 | 719 | eieio(); |
699ff13f | 720 | |
39ce010d | 721 | while (signal_processor(cpu, sigp_restart) == sigp_busy) |
699ff13f | 722 | udelay(10); |
1da177e4 LT |
723 | |
724 | while (!cpu_online(cpu)) | |
725 | cpu_relax(); | |
726 | return 0; | |
727 | } | |
728 | ||
48483b32 | 729 | static int __init setup_possible_cpus(char *s) |
255acee7 | 730 | { |
48483b32 | 731 | int pcpus, cpu; |
255acee7 | 732 | |
48483b32 HC |
733 | pcpus = simple_strtoul(s, NULL, 0); |
734 | cpu_possible_map = cpumask_of_cpu(0); | |
735 | for (cpu = 1; cpu < pcpus && cpu < NR_CPUS; cpu++) | |
255acee7 | 736 | cpu_set(cpu, cpu_possible_map); |
37a33026 HC |
737 | return 0; |
738 | } | |
739 | early_param("possible_cpus", setup_possible_cpus); | |
740 | ||
48483b32 HC |
741 | #ifdef CONFIG_HOTPLUG_CPU |
742 | ||
39ce010d | 743 | int __cpu_disable(void) |
1da177e4 | 744 | { |
94c12cc7 | 745 | struct ec_creg_mask_parms cr_parms; |
f3705136 | 746 | int cpu = smp_processor_id(); |
1da177e4 | 747 | |
f3705136 | 748 | cpu_clear(cpu, cpu_online_map); |
1da177e4 | 749 | |
1da177e4 | 750 | /* Disable pfault pseudo page faults on this cpu. */ |
29b08d2b | 751 | pfault_fini(); |
1da177e4 | 752 | |
94c12cc7 MS |
753 | memset(&cr_parms.orvals, 0, sizeof(cr_parms.orvals)); |
754 | memset(&cr_parms.andvals, 0xff, sizeof(cr_parms.andvals)); | |
1da177e4 | 755 | |
94c12cc7 | 756 | /* disable all external interrupts */ |
1da177e4 | 757 | cr_parms.orvals[0] = 0; |
39ce010d HC |
758 | cr_parms.andvals[0] = ~(1 << 15 | 1 << 14 | 1 << 13 | 1 << 12 | |
759 | 1 << 11 | 1 << 10 | 1 << 6 | 1 << 4); | |
1da177e4 | 760 | /* disable all I/O interrupts */ |
1da177e4 | 761 | cr_parms.orvals[6] = 0; |
39ce010d HC |
762 | cr_parms.andvals[6] = ~(1 << 31 | 1 << 30 | 1 << 29 | 1 << 28 | |
763 | 1 << 27 | 1 << 26 | 1 << 25 | 1 << 24); | |
1da177e4 | 764 | /* disable most machine checks */ |
1da177e4 | 765 | cr_parms.orvals[14] = 0; |
39ce010d HC |
766 | cr_parms.andvals[14] = ~(1 << 28 | 1 << 27 | 1 << 26 | |
767 | 1 << 25 | 1 << 24); | |
94c12cc7 | 768 | |
1da177e4 LT |
769 | smp_ctl_bit_callback(&cr_parms); |
770 | ||
1da177e4 LT |
771 | return 0; |
772 | } | |
773 | ||
39ce010d | 774 | void __cpu_die(unsigned int cpu) |
1da177e4 LT |
775 | { |
776 | /* Wait until target cpu is down */ | |
777 | while (!smp_cpu_not_running(cpu)) | |
778 | cpu_relax(); | |
1cb6bb4b | 779 | smp_free_lowcore(cpu); |
08d07968 | 780 | printk(KERN_INFO "Processor %d spun down\n", cpu); |
1da177e4 LT |
781 | } |
782 | ||
39ce010d | 783 | void cpu_die(void) |
1da177e4 LT |
784 | { |
785 | idle_task_exit(); | |
786 | signal_processor(smp_processor_id(), sigp_stop); | |
787 | BUG(); | |
39ce010d | 788 | for (;;); |
1da177e4 LT |
789 | } |
790 | ||
255acee7 HC |
791 | #endif /* CONFIG_HOTPLUG_CPU */ |
792 | ||
1da177e4 LT |
793 | void __init smp_prepare_cpus(unsigned int max_cpus) |
794 | { | |
591bb4f6 HC |
795 | #ifndef CONFIG_64BIT |
796 | unsigned long save_area = 0; | |
797 | #endif | |
798 | unsigned long async_stack, panic_stack; | |
799 | struct _lowcore *lowcore; | |
1da177e4 | 800 | unsigned int cpu; |
591bb4f6 | 801 | int lc_order; |
39ce010d | 802 | |
48483b32 HC |
803 | smp_detect_cpus(); |
804 | ||
39ce010d HC |
805 | /* request the 0x1201 emergency signal external interrupt */ |
806 | if (register_external_interrupt(0x1201, do_ext_call_interrupt) != 0) | |
807 | panic("Couldn't request external interrupt 0x1201"); | |
1da177e4 LT |
808 | print_cpu_info(&S390_lowcore.cpu_data); |
809 | ||
591bb4f6 HC |
810 | /* Reallocate current lowcore, but keep its contents. */ |
811 | lc_order = sizeof(long) == 8 ? 1 : 0; | |
812 | lowcore = (void *) __get_free_pages(GFP_KERNEL | GFP_DMA, lc_order); | |
813 | panic_stack = __get_free_page(GFP_KERNEL); | |
814 | async_stack = __get_free_pages(GFP_KERNEL, ASYNC_ORDER); | |
347a8dc3 | 815 | #ifndef CONFIG_64BIT |
77fa2245 | 816 | if (MACHINE_HAS_IEEE) |
591bb4f6 | 817 | save_area = get_zeroed_page(GFP_KERNEL); |
77fa2245 | 818 | #endif |
591bb4f6 HC |
819 | local_irq_disable(); |
820 | local_mcck_disable(); | |
821 | lowcore_ptr[smp_processor_id()] = lowcore; | |
822 | *lowcore = S390_lowcore; | |
823 | lowcore->panic_stack = panic_stack + PAGE_SIZE; | |
824 | lowcore->async_stack = async_stack + ASYNC_SIZE; | |
825 | #ifndef CONFIG_64BIT | |
826 | if (MACHINE_HAS_IEEE) | |
827 | lowcore->extended_save_area_addr = (u32) save_area; | |
828 | #endif | |
829 | set_prefix((u32)(unsigned long) lowcore); | |
830 | local_mcck_enable(); | |
831 | local_irq_enable(); | |
97db7fbf | 832 | for_each_possible_cpu(cpu) |
1da177e4 LT |
833 | if (cpu != smp_processor_id()) |
834 | smp_create_idle(cpu); | |
835 | } | |
836 | ||
ea1f4eec | 837 | void __init smp_prepare_boot_cpu(void) |
1da177e4 LT |
838 | { |
839 | BUG_ON(smp_processor_id() != 0); | |
840 | ||
48483b32 HC |
841 | current_thread_info()->cpu = 0; |
842 | cpu_set(0, cpu_present_map); | |
1da177e4 | 843 | cpu_set(0, cpu_online_map); |
1da177e4 LT |
844 | S390_lowcore.percpu_offset = __per_cpu_offset[0]; |
845 | current_set[0] = current; | |
08d07968 | 846 | smp_cpu_state[0] = CPU_STATE_CONFIGURED; |
c10fde0d | 847 | smp_cpu_polarization[0] = POLARIZATION_UNKNWN; |
fae8b22d | 848 | spin_lock_init(&(&__get_cpu_var(s390_idle))->lock); |
1da177e4 LT |
849 | } |
850 | ||
ea1f4eec | 851 | void __init smp_cpus_done(unsigned int max_cpus) |
1da177e4 | 852 | { |
1da177e4 LT |
853 | } |
854 | ||
855 | /* | |
856 | * the frequency of the profiling timer can be changed | |
857 | * by writing a multiplier value into /proc/profile. | |
858 | * | |
859 | * usually you want to run this on all CPUs ;) | |
860 | */ | |
861 | int setup_profiling_timer(unsigned int multiplier) | |
862 | { | |
39ce010d | 863 | return 0; |
1da177e4 LT |
864 | } |
865 | ||
08d07968 | 866 | #ifdef CONFIG_HOTPLUG_CPU |
4a0b2b4d AK |
867 | static ssize_t cpu_configure_show(struct sys_device *dev, |
868 | struct sysdev_attribute *attr, char *buf) | |
08d07968 HC |
869 | { |
870 | ssize_t count; | |
871 | ||
872 | mutex_lock(&smp_cpu_state_mutex); | |
873 | count = sprintf(buf, "%d\n", smp_cpu_state[dev->id]); | |
874 | mutex_unlock(&smp_cpu_state_mutex); | |
875 | return count; | |
876 | } | |
877 | ||
4a0b2b4d AK |
878 | static ssize_t cpu_configure_store(struct sys_device *dev, |
879 | struct sysdev_attribute *attr, | |
880 | const char *buf, size_t count) | |
08d07968 HC |
881 | { |
882 | int cpu = dev->id; | |
883 | int val, rc; | |
884 | char delim; | |
885 | ||
886 | if (sscanf(buf, "%d %c", &val, &delim) != 1) | |
887 | return -EINVAL; | |
888 | if (val != 0 && val != 1) | |
889 | return -EINVAL; | |
890 | ||
9d40d2e3 | 891 | get_online_cpus(); |
0b18d318 | 892 | mutex_lock(&smp_cpu_state_mutex); |
08d07968 HC |
893 | rc = -EBUSY; |
894 | if (cpu_online(cpu)) | |
895 | goto out; | |
896 | rc = 0; | |
897 | switch (val) { | |
898 | case 0: | |
899 | if (smp_cpu_state[cpu] == CPU_STATE_CONFIGURED) { | |
900 | rc = sclp_cpu_deconfigure(__cpu_logical_map[cpu]); | |
c10fde0d | 901 | if (!rc) { |
08d07968 | 902 | smp_cpu_state[cpu] = CPU_STATE_STANDBY; |
c10fde0d HC |
903 | smp_cpu_polarization[cpu] = POLARIZATION_UNKNWN; |
904 | } | |
08d07968 HC |
905 | } |
906 | break; | |
907 | case 1: | |
908 | if (smp_cpu_state[cpu] == CPU_STATE_STANDBY) { | |
909 | rc = sclp_cpu_configure(__cpu_logical_map[cpu]); | |
c10fde0d | 910 | if (!rc) { |
08d07968 | 911 | smp_cpu_state[cpu] = CPU_STATE_CONFIGURED; |
c10fde0d HC |
912 | smp_cpu_polarization[cpu] = POLARIZATION_UNKNWN; |
913 | } | |
08d07968 HC |
914 | } |
915 | break; | |
916 | default: | |
917 | break; | |
918 | } | |
919 | out: | |
08d07968 | 920 | mutex_unlock(&smp_cpu_state_mutex); |
0b18d318 | 921 | put_online_cpus(); |
08d07968 HC |
922 | return rc ? rc : count; |
923 | } | |
924 | static SYSDEV_ATTR(configure, 0644, cpu_configure_show, cpu_configure_store); | |
925 | #endif /* CONFIG_HOTPLUG_CPU */ | |
926 | ||
4a0b2b4d AK |
927 | static ssize_t cpu_polarization_show(struct sys_device *dev, |
928 | struct sysdev_attribute *attr, char *buf) | |
c10fde0d HC |
929 | { |
930 | int cpu = dev->id; | |
931 | ssize_t count; | |
932 | ||
933 | mutex_lock(&smp_cpu_state_mutex); | |
934 | switch (smp_cpu_polarization[cpu]) { | |
935 | case POLARIZATION_HRZ: | |
936 | count = sprintf(buf, "horizontal\n"); | |
937 | break; | |
938 | case POLARIZATION_VL: | |
939 | count = sprintf(buf, "vertical:low\n"); | |
940 | break; | |
941 | case POLARIZATION_VM: | |
942 | count = sprintf(buf, "vertical:medium\n"); | |
943 | break; | |
944 | case POLARIZATION_VH: | |
945 | count = sprintf(buf, "vertical:high\n"); | |
946 | break; | |
947 | default: | |
948 | count = sprintf(buf, "unknown\n"); | |
949 | break; | |
950 | } | |
951 | mutex_unlock(&smp_cpu_state_mutex); | |
952 | return count; | |
953 | } | |
954 | static SYSDEV_ATTR(polarization, 0444, cpu_polarization_show, NULL); | |
955 | ||
4a0b2b4d AK |
956 | static ssize_t show_cpu_address(struct sys_device *dev, |
957 | struct sysdev_attribute *attr, char *buf) | |
08d07968 HC |
958 | { |
959 | return sprintf(buf, "%d\n", __cpu_logical_map[dev->id]); | |
960 | } | |
961 | static SYSDEV_ATTR(address, 0444, show_cpu_address, NULL); | |
962 | ||
963 | ||
964 | static struct attribute *cpu_common_attrs[] = { | |
965 | #ifdef CONFIG_HOTPLUG_CPU | |
966 | &attr_configure.attr, | |
967 | #endif | |
968 | &attr_address.attr, | |
c10fde0d | 969 | &attr_polarization.attr, |
08d07968 HC |
970 | NULL, |
971 | }; | |
972 | ||
973 | static struct attribute_group cpu_common_attr_group = { | |
974 | .attrs = cpu_common_attrs, | |
975 | }; | |
1da177e4 | 976 | |
4a0b2b4d AK |
977 | static ssize_t show_capability(struct sys_device *dev, |
978 | struct sysdev_attribute *attr, char *buf) | |
2fc2d1e9 HC |
979 | { |
980 | unsigned int capability; | |
981 | int rc; | |
982 | ||
983 | rc = get_cpu_capability(&capability); | |
984 | if (rc) | |
985 | return rc; | |
986 | return sprintf(buf, "%u\n", capability); | |
987 | } | |
988 | static SYSDEV_ATTR(capability, 0444, show_capability, NULL); | |
989 | ||
4a0b2b4d AK |
990 | static ssize_t show_idle_count(struct sys_device *dev, |
991 | struct sysdev_attribute *attr, char *buf) | |
fae8b22d HC |
992 | { |
993 | struct s390_idle_data *idle; | |
994 | unsigned long long idle_count; | |
995 | ||
996 | idle = &per_cpu(s390_idle, dev->id); | |
997 | spin_lock_irq(&idle->lock); | |
998 | idle_count = idle->idle_count; | |
999 | spin_unlock_irq(&idle->lock); | |
1000 | return sprintf(buf, "%llu\n", idle_count); | |
1001 | } | |
1002 | static SYSDEV_ATTR(idle_count, 0444, show_idle_count, NULL); | |
1003 | ||
4a0b2b4d AK |
1004 | static ssize_t show_idle_time(struct sys_device *dev, |
1005 | struct sysdev_attribute *attr, char *buf) | |
fae8b22d HC |
1006 | { |
1007 | struct s390_idle_data *idle; | |
1008 | unsigned long long new_time; | |
1009 | ||
1010 | idle = &per_cpu(s390_idle, dev->id); | |
1011 | spin_lock_irq(&idle->lock); | |
1012 | if (idle->in_idle) { | |
1013 | new_time = get_clock(); | |
1014 | idle->idle_time += new_time - idle->idle_enter; | |
1015 | idle->idle_enter = new_time; | |
1016 | } | |
1017 | new_time = idle->idle_time; | |
1018 | spin_unlock_irq(&idle->lock); | |
69d39d66 | 1019 | return sprintf(buf, "%llu\n", new_time >> 12); |
fae8b22d | 1020 | } |
69d39d66 | 1021 | static SYSDEV_ATTR(idle_time_us, 0444, show_idle_time, NULL); |
fae8b22d | 1022 | |
08d07968 | 1023 | static struct attribute *cpu_online_attrs[] = { |
fae8b22d HC |
1024 | &attr_capability.attr, |
1025 | &attr_idle_count.attr, | |
69d39d66 | 1026 | &attr_idle_time_us.attr, |
fae8b22d HC |
1027 | NULL, |
1028 | }; | |
1029 | ||
08d07968 HC |
1030 | static struct attribute_group cpu_online_attr_group = { |
1031 | .attrs = cpu_online_attrs, | |
fae8b22d HC |
1032 | }; |
1033 | ||
2fc2d1e9 HC |
1034 | static int __cpuinit smp_cpu_notify(struct notifier_block *self, |
1035 | unsigned long action, void *hcpu) | |
1036 | { | |
1037 | unsigned int cpu = (unsigned int)(long)hcpu; | |
1038 | struct cpu *c = &per_cpu(cpu_devices, cpu); | |
1039 | struct sys_device *s = &c->sysdev; | |
fae8b22d | 1040 | struct s390_idle_data *idle; |
2fc2d1e9 HC |
1041 | |
1042 | switch (action) { | |
1043 | case CPU_ONLINE: | |
8bb78442 | 1044 | case CPU_ONLINE_FROZEN: |
fae8b22d HC |
1045 | idle = &per_cpu(s390_idle, cpu); |
1046 | spin_lock_irq(&idle->lock); | |
1047 | idle->idle_enter = 0; | |
1048 | idle->idle_time = 0; | |
1049 | idle->idle_count = 0; | |
1050 | spin_unlock_irq(&idle->lock); | |
08d07968 | 1051 | if (sysfs_create_group(&s->kobj, &cpu_online_attr_group)) |
2fc2d1e9 HC |
1052 | return NOTIFY_BAD; |
1053 | break; | |
1054 | case CPU_DEAD: | |
8bb78442 | 1055 | case CPU_DEAD_FROZEN: |
08d07968 | 1056 | sysfs_remove_group(&s->kobj, &cpu_online_attr_group); |
2fc2d1e9 HC |
1057 | break; |
1058 | } | |
1059 | return NOTIFY_OK; | |
1060 | } | |
1061 | ||
1062 | static struct notifier_block __cpuinitdata smp_cpu_nb = { | |
39ce010d | 1063 | .notifier_call = smp_cpu_notify, |
2fc2d1e9 HC |
1064 | }; |
1065 | ||
2bc89b5e | 1066 | static int __devinit smp_add_present_cpu(int cpu) |
08d07968 HC |
1067 | { |
1068 | struct cpu *c = &per_cpu(cpu_devices, cpu); | |
1069 | struct sys_device *s = &c->sysdev; | |
1070 | int rc; | |
1071 | ||
1072 | c->hotpluggable = 1; | |
1073 | rc = register_cpu(c, cpu); | |
1074 | if (rc) | |
1075 | goto out; | |
1076 | rc = sysfs_create_group(&s->kobj, &cpu_common_attr_group); | |
1077 | if (rc) | |
1078 | goto out_cpu; | |
1079 | if (!cpu_online(cpu)) | |
1080 | goto out; | |
1081 | rc = sysfs_create_group(&s->kobj, &cpu_online_attr_group); | |
1082 | if (!rc) | |
1083 | return 0; | |
1084 | sysfs_remove_group(&s->kobj, &cpu_common_attr_group); | |
1085 | out_cpu: | |
1086 | #ifdef CONFIG_HOTPLUG_CPU | |
1087 | unregister_cpu(c); | |
1088 | #endif | |
1089 | out: | |
1090 | return rc; | |
1091 | } | |
1092 | ||
1093 | #ifdef CONFIG_HOTPLUG_CPU | |
1e489518 | 1094 | |
67060d9c | 1095 | int __ref smp_rescan_cpus(void) |
08d07968 HC |
1096 | { |
1097 | cpumask_t newcpus; | |
1098 | int cpu; | |
1099 | int rc; | |
1100 | ||
9d40d2e3 | 1101 | get_online_cpus(); |
0b18d318 | 1102 | mutex_lock(&smp_cpu_state_mutex); |
08d07968 | 1103 | newcpus = cpu_present_map; |
1e489518 | 1104 | rc = __smp_rescan_cpus(); |
08d07968 HC |
1105 | if (rc) |
1106 | goto out; | |
1107 | cpus_andnot(newcpus, cpu_present_map, newcpus); | |
1108 | for_each_cpu_mask(cpu, newcpus) { | |
1109 | rc = smp_add_present_cpu(cpu); | |
1110 | if (rc) | |
1111 | cpu_clear(cpu, cpu_present_map); | |
1112 | } | |
1113 | rc = 0; | |
1114 | out: | |
08d07968 | 1115 | mutex_unlock(&smp_cpu_state_mutex); |
0b18d318 | 1116 | put_online_cpus(); |
c10fde0d HC |
1117 | if (!cpus_empty(newcpus)) |
1118 | topology_schedule_update(); | |
1e489518 HC |
1119 | return rc; |
1120 | } | |
1121 | ||
4a0b2b4d AK |
1122 | static ssize_t __ref rescan_store(struct sys_device *dev, |
1123 | struct sysdev_attribute *attr, | |
1124 | const char *buf, | |
1e489518 HC |
1125 | size_t count) |
1126 | { | |
1127 | int rc; | |
1128 | ||
1129 | rc = smp_rescan_cpus(); | |
08d07968 HC |
1130 | return rc ? rc : count; |
1131 | } | |
1132 | static SYSDEV_ATTR(rescan, 0200, NULL, rescan_store); | |
1133 | #endif /* CONFIG_HOTPLUG_CPU */ | |
1134 | ||
4a0b2b4d AK |
1135 | static ssize_t dispatching_show(struct sys_device *dev, |
1136 | struct sysdev_attribute *attr, | |
1137 | char *buf) | |
c10fde0d HC |
1138 | { |
1139 | ssize_t count; | |
1140 | ||
1141 | mutex_lock(&smp_cpu_state_mutex); | |
1142 | count = sprintf(buf, "%d\n", cpu_management); | |
1143 | mutex_unlock(&smp_cpu_state_mutex); | |
1144 | return count; | |
1145 | } | |
1146 | ||
4a0b2b4d AK |
1147 | static ssize_t dispatching_store(struct sys_device *dev, |
1148 | struct sysdev_attribute *attr, | |
1149 | const char *buf, size_t count) | |
c10fde0d HC |
1150 | { |
1151 | int val, rc; | |
1152 | char delim; | |
1153 | ||
1154 | if (sscanf(buf, "%d %c", &val, &delim) != 1) | |
1155 | return -EINVAL; | |
1156 | if (val != 0 && val != 1) | |
1157 | return -EINVAL; | |
1158 | rc = 0; | |
c10fde0d | 1159 | get_online_cpus(); |
0b18d318 | 1160 | mutex_lock(&smp_cpu_state_mutex); |
c10fde0d HC |
1161 | if (cpu_management == val) |
1162 | goto out; | |
1163 | rc = topology_set_cpu_management(val); | |
1164 | if (!rc) | |
1165 | cpu_management = val; | |
1166 | out: | |
c10fde0d | 1167 | mutex_unlock(&smp_cpu_state_mutex); |
0b18d318 | 1168 | put_online_cpus(); |
c10fde0d HC |
1169 | return rc ? rc : count; |
1170 | } | |
1171 | static SYSDEV_ATTR(dispatching, 0644, dispatching_show, dispatching_store); | |
1172 | ||
1da177e4 LT |
1173 | static int __init topology_init(void) |
1174 | { | |
1175 | int cpu; | |
fae8b22d | 1176 | int rc; |
2fc2d1e9 HC |
1177 | |
1178 | register_cpu_notifier(&smp_cpu_nb); | |
1da177e4 | 1179 | |
08d07968 HC |
1180 | #ifdef CONFIG_HOTPLUG_CPU |
1181 | rc = sysfs_create_file(&cpu_sysdev_class.kset.kobj, | |
1182 | &attr_rescan.attr); | |
1183 | if (rc) | |
1184 | return rc; | |
1185 | #endif | |
c10fde0d HC |
1186 | rc = sysfs_create_file(&cpu_sysdev_class.kset.kobj, |
1187 | &attr_dispatching.attr); | |
1188 | if (rc) | |
1189 | return rc; | |
08d07968 HC |
1190 | for_each_present_cpu(cpu) { |
1191 | rc = smp_add_present_cpu(cpu); | |
fae8b22d HC |
1192 | if (rc) |
1193 | return rc; | |
1da177e4 LT |
1194 | } |
1195 | return 0; | |
1196 | } | |
1da177e4 | 1197 | subsys_initcall(topology_init); |