Commit | Line | Data |
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1da177e4 LT |
1 | /* |
2 | * arch/s390/kernel/entry.S | |
3 | * S390 low-level entry points. | |
4 | * | |
54dfe5dd | 5 | * Copyright (C) IBM Corp. 1999,2006 |
1da177e4 | 6 | * Author(s): Martin Schwidefsky (schwidefsky@de.ibm.com), |
25d83cbf HC |
7 | * Hartmut Penner (hp@de.ibm.com), |
8 | * Denis Joseph Barrow (djbarrow@de.ibm.com,barrow_dj@yahoo.com), | |
77fa2245 | 9 | * Heiko Carstens <heiko.carstens@de.ibm.com> |
1da177e4 LT |
10 | */ |
11 | ||
12 | #include <linux/sys.h> | |
13 | #include <linux/linkage.h> | |
2bc89b5e | 14 | #include <linux/init.h> |
1da177e4 LT |
15 | #include <asm/cache.h> |
16 | #include <asm/lowcore.h> | |
17 | #include <asm/errno.h> | |
18 | #include <asm/ptrace.h> | |
19 | #include <asm/thread_info.h> | |
0013a854 | 20 | #include <asm/asm-offsets.h> |
1da177e4 LT |
21 | #include <asm/unistd.h> |
22 | #include <asm/page.h> | |
23 | ||
24 | /* | |
25 | * Stack layout for the system_call stack entry. | |
26 | * The first few entries are identical to the user_regs_struct. | |
27 | */ | |
25d83cbf HC |
28 | SP_PTREGS = STACK_FRAME_OVERHEAD |
29 | SP_ARGS = STACK_FRAME_OVERHEAD + __PT_ARGS | |
30 | SP_PSW = STACK_FRAME_OVERHEAD + __PT_PSW | |
31 | SP_R0 = STACK_FRAME_OVERHEAD + __PT_GPRS | |
32 | SP_R1 = STACK_FRAME_OVERHEAD + __PT_GPRS + 4 | |
33 | SP_R2 = STACK_FRAME_OVERHEAD + __PT_GPRS + 8 | |
34 | SP_R3 = STACK_FRAME_OVERHEAD + __PT_GPRS + 12 | |
35 | SP_R4 = STACK_FRAME_OVERHEAD + __PT_GPRS + 16 | |
36 | SP_R5 = STACK_FRAME_OVERHEAD + __PT_GPRS + 20 | |
37 | SP_R6 = STACK_FRAME_OVERHEAD + __PT_GPRS + 24 | |
38 | SP_R7 = STACK_FRAME_OVERHEAD + __PT_GPRS + 28 | |
39 | SP_R8 = STACK_FRAME_OVERHEAD + __PT_GPRS + 32 | |
40 | SP_R9 = STACK_FRAME_OVERHEAD + __PT_GPRS + 36 | |
41 | SP_R10 = STACK_FRAME_OVERHEAD + __PT_GPRS + 40 | |
42 | SP_R11 = STACK_FRAME_OVERHEAD + __PT_GPRS + 44 | |
43 | SP_R12 = STACK_FRAME_OVERHEAD + __PT_GPRS + 48 | |
44 | SP_R13 = STACK_FRAME_OVERHEAD + __PT_GPRS + 52 | |
45 | SP_R14 = STACK_FRAME_OVERHEAD + __PT_GPRS + 56 | |
46 | SP_R15 = STACK_FRAME_OVERHEAD + __PT_GPRS + 60 | |
47 | SP_ORIG_R2 = STACK_FRAME_OVERHEAD + __PT_ORIG_GPR2 | |
48 | SP_ILC = STACK_FRAME_OVERHEAD + __PT_ILC | |
59da2139 | 49 | SP_SVCNR = STACK_FRAME_OVERHEAD + __PT_SVCNR |
25d83cbf | 50 | SP_SIZE = STACK_FRAME_OVERHEAD + __PT_SIZE |
1da177e4 | 51 | |
753c4dd6 | 52 | _TIF_WORK_SVC = (_TIF_SIGPENDING | _TIF_NOTIFY_RESUME | _TIF_NEED_RESCHED | \ |
54dfe5dd | 53 | _TIF_MCCK_PENDING | _TIF_RESTART_SVC | _TIF_SINGLE_STEP ) |
753c4dd6 | 54 | _TIF_WORK_INT = (_TIF_SIGPENDING | _TIF_NOTIFY_RESUME | _TIF_NEED_RESCHED | \ |
54dfe5dd | 55 | _TIF_MCCK_PENDING) |
9bf1226b | 56 | _TIF_SYSCALL = (_TIF_SYSCALL_TRACE>>8 | _TIF_SYSCALL_AUDIT>>8 | \ |
66700001 | 57 | _TIF_SECCOMP>>8 | _TIF_SYSCALL_TRACEPOINT>>8) |
1da177e4 LT |
58 | |
59 | STACK_SHIFT = PAGE_SHIFT + THREAD_ORDER | |
60 | STACK_SIZE = 1 << STACK_SHIFT | |
61 | ||
62 | #define BASED(name) name-system_call(%r13) | |
63 | ||
1f194a4c HC |
64 | #ifdef CONFIG_TRACE_IRQFLAGS |
65 | .macro TRACE_IRQS_ON | |
50bec4ce HC |
66 | basr %r2,%r0 |
67 | l %r1,BASED(.Ltrace_irq_on_caller) | |
1f194a4c HC |
68 | basr %r14,%r1 |
69 | .endm | |
70 | ||
71 | .macro TRACE_IRQS_OFF | |
50bec4ce HC |
72 | basr %r2,%r0 |
73 | l %r1,BASED(.Ltrace_irq_off_caller) | |
1f194a4c HC |
74 | basr %r14,%r1 |
75 | .endm | |
523b44cf | 76 | |
411788ea | 77 | .macro TRACE_IRQS_CHECK |
50bec4ce | 78 | basr %r2,%r0 |
411788ea HC |
79 | tm SP_PSW(%r15),0x03 # irqs enabled? |
80 | jz 0f | |
50bec4ce | 81 | l %r1,BASED(.Ltrace_irq_on_caller) |
523b44cf | 82 | basr %r14,%r1 |
411788ea | 83 | j 1f |
50bec4ce | 84 | 0: l %r1,BASED(.Ltrace_irq_off_caller) |
411788ea HC |
85 | basr %r14,%r1 |
86 | 1: | |
523b44cf | 87 | .endm |
1f194a4c HC |
88 | #else |
89 | #define TRACE_IRQS_ON | |
90 | #define TRACE_IRQS_OFF | |
411788ea HC |
91 | #define TRACE_IRQS_CHECK |
92 | #endif | |
93 | ||
94 | #ifdef CONFIG_LOCKDEP | |
95 | .macro LOCKDEP_SYS_EXIT | |
96 | tm SP_PSW+1(%r15),0x01 # returning to user ? | |
97 | jz 0f | |
98 | l %r1,BASED(.Llockdep_sys_exit) | |
99 | basr %r14,%r1 | |
100 | 0: | |
101 | .endm | |
102 | #else | |
523b44cf | 103 | #define LOCKDEP_SYS_EXIT |
1f194a4c HC |
104 | #endif |
105 | ||
1da177e4 LT |
106 | /* |
107 | * Register usage in interrupt handlers: | |
108 | * R9 - pointer to current task structure | |
109 | * R13 - pointer to literal pool | |
110 | * R14 - return register for function calls | |
111 | * R15 - kernel stack pointer | |
112 | */ | |
113 | ||
25d83cbf | 114 | .macro UPDATE_VTIME lc_from,lc_to,lc_sum |
1da177e4 LT |
115 | lm %r10,%r11,\lc_from |
116 | sl %r10,\lc_to | |
117 | sl %r11,\lc_to+4 | |
118 | bc 3,BASED(0f) | |
119 | sl %r10,BASED(.Lc_1) | |
120 | 0: al %r10,\lc_sum | |
121 | al %r11,\lc_sum+4 | |
122 | bc 12,BASED(1f) | |
123 | al %r10,BASED(.Lc_1) | |
124 | 1: stm %r10,%r11,\lc_sum | |
125 | .endm | |
1da177e4 LT |
126 | |
127 | .macro SAVE_ALL_BASE savearea | |
128 | stm %r12,%r15,\savearea | |
129 | l %r13,__LC_SVC_NEW_PSW+4 # load &system_call to %r13 | |
130 | .endm | |
131 | ||
987ad70a MS |
132 | .macro SAVE_ALL_SVC psworg,savearea |
133 | la %r12,\psworg | |
134 | l %r15,__LC_KERNEL_STACK # problem state -> load ksp | |
135 | .endm | |
136 | ||
63b12246 | 137 | .macro SAVE_ALL_SYNC psworg,savearea |
1da177e4 | 138 | la %r12,\psworg |
1da177e4 LT |
139 | tm \psworg+1,0x01 # test problem state bit |
140 | bz BASED(2f) # skip stack setup save | |
141 | l %r15,__LC_KERNEL_STACK # problem state -> load ksp | |
63b12246 MS |
142 | #ifdef CONFIG_CHECK_STACK |
143 | b BASED(3f) | |
144 | 2: tml %r15,STACK_SIZE - CONFIG_STACK_GUARD | |
145 | bz BASED(stack_overflow) | |
146 | 3: | |
147 | #endif | |
148 | 2: | |
149 | .endm | |
150 | ||
151 | .macro SAVE_ALL_ASYNC psworg,savearea | |
152 | la %r12,\psworg | |
1da177e4 LT |
153 | tm \psworg+1,0x01 # test problem state bit |
154 | bnz BASED(1f) # from user -> load async stack | |
155 | clc \psworg+4(4),BASED(.Lcritical_end) | |
156 | bhe BASED(0f) | |
157 | clc \psworg+4(4),BASED(.Lcritical_start) | |
158 | bl BASED(0f) | |
159 | l %r14,BASED(.Lcleanup_critical) | |
160 | basr %r14,%r14 | |
6add9f7f | 161 | tm 1(%r12),0x01 # retest problem state after cleanup |
1da177e4 LT |
162 | bnz BASED(1f) |
163 | 0: l %r14,__LC_ASYNC_STACK # are we already on the async stack ? | |
164 | slr %r14,%r15 | |
165 | sra %r14,STACK_SHIFT | |
166 | be BASED(2f) | |
167 | 1: l %r15,__LC_ASYNC_STACK | |
1da177e4 LT |
168 | #ifdef CONFIG_CHECK_STACK |
169 | b BASED(3f) | |
170 | 2: tml %r15,STACK_SIZE - CONFIG_STACK_GUARD | |
171 | bz BASED(stack_overflow) | |
172 | 3: | |
173 | #endif | |
77fa2245 HC |
174 | 2: |
175 | .endm | |
176 | ||
25d83cbf | 177 | .macro CREATE_STACK_FRAME psworg,savearea |
77fa2245 | 178 | s %r15,BASED(.Lc_spsize) # make room for registers & psw |
1da177e4 | 179 | mvc SP_PSW(8,%r15),0(%r12) # move user PSW to stack |
1da177e4 | 180 | st %r2,SP_ORIG_R2(%r15) # store original content of gpr 2 |
59da2139 | 181 | icm %r12,3,__LC_SVC_ILC |
1da177e4 | 182 | stm %r0,%r11,SP_R0(%r15) # store gprs %r0-%r11 to kernel stack |
59da2139 | 183 | st %r12,SP_SVCNR(%r15) |
1da177e4 LT |
184 | mvc SP_R12(16,%r15),\savearea # move %r12-%r15 to stack |
185 | la %r12,0 | |
186 | st %r12,__SF_BACKCHAIN(%r15) # clear back chain | |
187 | .endm | |
188 | ||
25d83cbf | 189 | .macro RESTORE_ALL psworg,sync |
ae6aa2ea | 190 | mvc \psworg(8),SP_PSW(%r15) # move user PSW to lowcore |
1da177e4 | 191 | .if !\sync |
ae6aa2ea | 192 | ni \psworg+1,0xfd # clear wait state bit |
1da177e4 LT |
193 | .endif |
194 | lm %r0,%r15,SP_R0(%r15) # load gprs 0-15 of user | |
c185b783 | 195 | stpt __LC_EXIT_TIMER |
ae6aa2ea | 196 | lpsw \psworg # back to caller |
1da177e4 LT |
197 | .endm |
198 | ||
199 | /* | |
200 | * Scheduler resume function, called by switch_to | |
201 | * gpr2 = (task_struct *) prev | |
202 | * gpr3 = (task_struct *) next | |
203 | * Returns: | |
204 | * gpr2 = prev | |
205 | */ | |
25d83cbf | 206 | .globl __switch_to |
1da177e4 | 207 | __switch_to: |
25d83cbf | 208 | basr %r1,0 |
1da177e4 LT |
209 | __switch_to_base: |
210 | tm __THREAD_per(%r3),0xe8 # new process is using per ? | |
211 | bz __switch_to_noper-__switch_to_base(%r1) # if not we're fine | |
25d83cbf HC |
212 | stctl %c9,%c11,__SF_EMPTY(%r15) # We are using per stuff |
213 | clc __THREAD_per(12,%r3),__SF_EMPTY(%r15) | |
214 | be __switch_to_noper-__switch_to_base(%r1) # we got away w/o bashing TLB's | |
215 | lctl %c9,%c11,__THREAD_per(%r3) # Nope we didn't | |
1da177e4 | 216 | __switch_to_noper: |
77fa2245 HC |
217 | l %r4,__THREAD_info(%r2) # get thread_info of prev |
218 | tm __TI_flags+3(%r4),_TIF_MCCK_PENDING # machine check pending? | |
219 | bz __switch_to_no_mcck-__switch_to_base(%r1) | |
220 | ni __TI_flags+3(%r4),255-_TIF_MCCK_PENDING # clear flag in prev | |
221 | l %r4,__THREAD_info(%r3) # get thread_info of next | |
222 | oi __TI_flags+3(%r4),_TIF_MCCK_PENDING # set it in next | |
223 | __switch_to_no_mcck: | |
25d83cbf | 224 | stm %r6,%r15,__SF_GPRS(%r15)# store __switch_to registers of prev task |
1da177e4 LT |
225 | st %r15,__THREAD_ksp(%r2) # store kernel stack to prev->tss.ksp |
226 | l %r15,__THREAD_ksp(%r3) # load kernel stack from next->tss.ksp | |
227 | lm %r6,%r15,__SF_GPRS(%r15)# load __switch_to registers of next task | |
228 | st %r3,__LC_CURRENT # __LC_CURRENT = current task struct | |
229 | lctl %c4,%c4,__TASK_pid(%r3) # load pid to control reg. 4 | |
25d83cbf | 230 | l %r3,__THREAD_info(%r3) # load thread_info from task struct |
1da177e4 LT |
231 | st %r3,__LC_THREAD_INFO |
232 | ahi %r3,STACK_SIZE | |
233 | st %r3,__LC_KERNEL_STACK # __LC_KERNEL_STACK = new kernel stack | |
234 | br %r14 | |
235 | ||
236 | __critical_start: | |
237 | /* | |
238 | * SVC interrupt handler routine. System calls are synchronous events and | |
239 | * are executed with interrupts enabled. | |
240 | */ | |
241 | ||
25d83cbf | 242 | .globl system_call |
1da177e4 | 243 | system_call: |
c185b783 | 244 | stpt __LC_SYNC_ENTER_TIMER |
1da177e4 LT |
245 | sysc_saveall: |
246 | SAVE_ALL_BASE __LC_SAVE_AREA | |
987ad70a | 247 | SAVE_ALL_SVC __LC_SVC_OLD_PSW,__LC_SAVE_AREA |
77fa2245 | 248 | CREATE_STACK_FRAME __LC_SVC_OLD_PSW,__LC_SAVE_AREA |
1da177e4 | 249 | lh %r7,0x8a # get svc number from lowcore |
1da177e4 | 250 | sysc_vtime: |
1da177e4 LT |
251 | UPDATE_VTIME __LC_EXIT_TIMER,__LC_SYNC_ENTER_TIMER,__LC_USER_TIMER |
252 | sysc_stime: | |
253 | UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER | |
254 | sysc_update: | |
255 | mvc __LC_LAST_UPDATE_TIMER(8),__LC_SYNC_ENTER_TIMER | |
1da177e4 LT |
256 | sysc_do_svc: |
257 | l %r9,__LC_THREAD_INFO # load pointer to thread_info struct | |
59da2139 | 258 | ltr %r7,%r7 # test for svc 0 |
25d83cbf | 259 | bnz BASED(sysc_nr_ok) # svc number > 0 |
1da177e4 LT |
260 | # svc 0: system call number in %r1 |
261 | cl %r1,BASED(.Lnr_syscalls) | |
262 | bnl BASED(sysc_nr_ok) | |
25d83cbf | 263 | lr %r7,%r1 # copy svc number to %r7 |
1da177e4 LT |
264 | sysc_nr_ok: |
265 | mvc SP_ARGS(4,%r15),SP_R7(%r15) | |
266 | sysc_do_restart: | |
59da2139 MS |
267 | sth %r7,SP_SVCNR(%r15) |
268 | sll %r7,2 # svc number *4 | |
d882b172 | 269 | l %r8,BASED(.Lsysc_table) |
bcf5cef7 | 270 | tm __TI_flags+2(%r9),_TIF_SYSCALL |
d882b172 | 271 | l %r8,0(%r7,%r8) # get system call addr. |
25d83cbf HC |
272 | bnz BASED(sysc_tracesys) |
273 | basr %r14,%r8 # call sys_xxxx | |
274 | st %r2,SP_R2(%r15) # store return value (change R2 on stack) | |
1da177e4 LT |
275 | |
276 | sysc_return: | |
1da177e4 LT |
277 | tm __TI_flags+3(%r9),_TIF_WORK_SVC |
278 | bnz BASED(sysc_work) # there is work to do (signals etc.) | |
411788ea HC |
279 | sysc_restore: |
280 | #ifdef CONFIG_TRACE_IRQFLAGS | |
a8c3cb49 HB |
281 | la %r1,BASED(sysc_restore_trace_psw_addr) |
282 | l %r1,0(%r1) | |
411788ea HC |
283 | lpsw 0(%r1) |
284 | sysc_restore_trace: | |
285 | TRACE_IRQS_CHECK | |
523b44cf | 286 | LOCKDEP_SYS_EXIT |
411788ea | 287 | #endif |
1da177e4 | 288 | sysc_leave: |
25d83cbf | 289 | RESTORE_ALL __LC_RETURN_PSW,1 |
411788ea HC |
290 | sysc_done: |
291 | ||
292 | #ifdef CONFIG_TRACE_IRQFLAGS | |
a8c3cb49 HB |
293 | sysc_restore_trace_psw_addr: |
294 | .long sysc_restore_trace_psw | |
295 | ||
296 | .section .data,"aw",@progbits | |
411788ea HC |
297 | .align 8 |
298 | .globl sysc_restore_trace_psw | |
299 | sysc_restore_trace_psw: | |
300 | .long 0, sysc_restore_trace + 0x80000000 | |
a8c3cb49 | 301 | .previous |
411788ea | 302 | #endif |
1da177e4 LT |
303 | |
304 | # | |
305 | # recheck if there is more work to do | |
306 | # | |
307 | sysc_work_loop: | |
308 | tm __TI_flags+3(%r9),_TIF_WORK_SVC | |
411788ea | 309 | bz BASED(sysc_restore) # there is no work to do |
1da177e4 LT |
310 | # |
311 | # One of the work bits is on. Find out which one. | |
312 | # | |
313 | sysc_work: | |
2688905e MS |
314 | tm SP_PSW+1(%r15),0x01 # returning to user ? |
315 | bno BASED(sysc_restore) | |
77fa2245 HC |
316 | tm __TI_flags+3(%r9),_TIF_MCCK_PENDING |
317 | bo BASED(sysc_mcck_pending) | |
1da177e4 LT |
318 | tm __TI_flags+3(%r9),_TIF_NEED_RESCHED |
319 | bo BASED(sysc_reschedule) | |
02a029b3 | 320 | tm __TI_flags+3(%r9),_TIF_SIGPENDING |
54dfe5dd | 321 | bnz BASED(sysc_sigpending) |
753c4dd6 MS |
322 | tm __TI_flags+3(%r9),_TIF_NOTIFY_RESUME |
323 | bnz BASED(sysc_notify_resume) | |
1da177e4 LT |
324 | tm __TI_flags+3(%r9),_TIF_RESTART_SVC |
325 | bo BASED(sysc_restart) | |
326 | tm __TI_flags+3(%r9),_TIF_SINGLE_STEP | |
327 | bo BASED(sysc_singlestep) | |
411788ea HC |
328 | b BASED(sysc_restore) |
329 | sysc_work_done: | |
1da177e4 LT |
330 | |
331 | # | |
332 | # _TIF_NEED_RESCHED is set, call schedule | |
25d83cbf HC |
333 | # |
334 | sysc_reschedule: | |
335 | l %r1,BASED(.Lschedule) | |
336 | la %r14,BASED(sysc_work_loop) | |
337 | br %r1 # call scheduler | |
1da177e4 | 338 | |
77fa2245 HC |
339 | # |
340 | # _TIF_MCCK_PENDING is set, call handler | |
341 | # | |
342 | sysc_mcck_pending: | |
343 | l %r1,BASED(.Ls390_handle_mcck) | |
344 | la %r14,BASED(sysc_work_loop) | |
345 | br %r1 # TIF bit will be cleared by handler | |
346 | ||
1da177e4 | 347 | # |
02a029b3 | 348 | # _TIF_SIGPENDING is set, call do_signal |
1da177e4 | 349 | # |
25d83cbf | 350 | sysc_sigpending: |
1da177e4 | 351 | ni __TI_flags+3(%r9),255-_TIF_SINGLE_STEP # clear TIF_SINGLE_STEP |
25d83cbf HC |
352 | la %r2,SP_PTREGS(%r15) # load pt_regs |
353 | l %r1,BASED(.Ldo_signal) | |
354 | basr %r14,%r1 # call do_signal | |
1da177e4 LT |
355 | tm __TI_flags+3(%r9),_TIF_RESTART_SVC |
356 | bo BASED(sysc_restart) | |
357 | tm __TI_flags+3(%r9),_TIF_SINGLE_STEP | |
358 | bo BASED(sysc_singlestep) | |
e1c3ad96 | 359 | b BASED(sysc_work_loop) |
1da177e4 | 360 | |
753c4dd6 MS |
361 | # |
362 | # _TIF_NOTIFY_RESUME is set, call do_notify_resume | |
363 | # | |
364 | sysc_notify_resume: | |
365 | la %r2,SP_PTREGS(%r15) # load pt_regs | |
366 | l %r1,BASED(.Ldo_notify_resume) | |
367 | la %r14,BASED(sysc_work_loop) | |
368 | br %r1 # call do_notify_resume | |
369 | ||
370 | ||
1da177e4 LT |
371 | # |
372 | # _TIF_RESTART_SVC is set, set up registers and restart svc | |
373 | # | |
374 | sysc_restart: | |
375 | ni __TI_flags+3(%r9),255-_TIF_RESTART_SVC # clear TIF_RESTART_SVC | |
25d83cbf | 376 | l %r7,SP_R2(%r15) # load new svc number |
1da177e4 | 377 | mvc SP_R2(4,%r15),SP_ORIG_R2(%r15) # restore first argument |
25d83cbf HC |
378 | lm %r2,%r6,SP_R2(%r15) # load svc arguments |
379 | b BASED(sysc_do_restart) # restart svc | |
1da177e4 LT |
380 | |
381 | # | |
382 | # _TIF_SINGLE_STEP is set, call do_single_step | |
383 | # | |
384 | sysc_singlestep: | |
385 | ni __TI_flags+3(%r9),255-_TIF_SINGLE_STEP # clear TIF_SINGLE_STEP | |
59da2139 MS |
386 | mvi SP_SVCNR(%r15),0xff # set trap indication to pgm check |
387 | mvi SP_SVCNR+1(%r15),0xff | |
1da177e4 LT |
388 | la %r2,SP_PTREGS(%r15) # address of register-save area |
389 | l %r1,BASED(.Lhandle_per) # load adr. of per handler | |
390 | la %r14,BASED(sysc_return) # load adr. of system return | |
391 | br %r1 # branch to do_single_step | |
392 | ||
1da177e4 | 393 | # |
753c4dd6 MS |
394 | # call tracehook_report_syscall_entry/tracehook_report_syscall_exit before |
395 | # and after the system call | |
1da177e4 LT |
396 | # |
397 | sysc_tracesys: | |
753c4dd6 | 398 | l %r1,BASED(.Ltrace_entry) |
25d83cbf | 399 | la %r2,SP_PTREGS(%r15) # load pt_regs |
1da177e4 LT |
400 | la %r3,0 |
401 | srl %r7,2 | |
402 | st %r7,SP_R2(%r15) | |
403 | basr %r14,%r1 | |
753c4dd6 | 404 | cl %r2,BASED(.Lnr_syscalls) |
1da177e4 | 405 | bnl BASED(sysc_tracenogo) |
d882b172 | 406 | l %r8,BASED(.Lsysc_table) |
753c4dd6 | 407 | lr %r7,%r2 |
59da2139 | 408 | sll %r7,2 # svc number *4 |
d882b172 | 409 | l %r8,0(%r7,%r8) |
1da177e4 LT |
410 | sysc_tracego: |
411 | lm %r3,%r6,SP_R3(%r15) | |
412 | l %r2,SP_ORIG_R2(%r15) | |
25d83cbf HC |
413 | basr %r14,%r8 # call sys_xxx |
414 | st %r2,SP_R2(%r15) # store return value | |
1da177e4 | 415 | sysc_tracenogo: |
bcf5cef7 | 416 | tm __TI_flags+2(%r9),_TIF_SYSCALL |
25d83cbf | 417 | bz BASED(sysc_return) |
753c4dd6 | 418 | l %r1,BASED(.Ltrace_exit) |
25d83cbf | 419 | la %r2,SP_PTREGS(%r15) # load pt_regs |
1da177e4 LT |
420 | la %r14,BASED(sysc_return) |
421 | br %r1 | |
422 | ||
423 | # | |
424 | # a new process exits the kernel with ret_from_fork | |
425 | # | |
25d83cbf | 426 | .globl ret_from_fork |
1da177e4 LT |
427 | ret_from_fork: |
428 | l %r13,__LC_SVC_NEW_PSW+4 | |
429 | l %r9,__LC_THREAD_INFO # load pointer to thread_info struct | |
430 | tm SP_PSW+1(%r15),0x01 # forking a kernel thread ? | |
431 | bo BASED(0f) | |
432 | st %r15,SP_R15(%r15) # store stack pointer for new kthread | |
25d83cbf HC |
433 | 0: l %r1,BASED(.Lschedtail) |
434 | basr %r14,%r1 | |
1f194a4c | 435 | TRACE_IRQS_ON |
25d83cbf | 436 | stosm __SF_EMPTY(%r15),0x03 # reenable interrupts |
8f2961c3 | 437 | b BASED(sysc_tracenogo) |
1da177e4 LT |
438 | |
439 | # | |
03ff9a23 MS |
440 | # kernel_execve function needs to deal with pt_regs that is not |
441 | # at the usual place | |
1da177e4 | 442 | # |
03ff9a23 MS |
443 | .globl kernel_execve |
444 | kernel_execve: | |
445 | stm %r12,%r15,48(%r15) | |
446 | lr %r14,%r15 | |
447 | l %r13,__LC_SVC_NEW_PSW+4 | |
448 | s %r15,BASED(.Lc_spsize) | |
449 | st %r14,__SF_BACKCHAIN(%r15) | |
450 | la %r12,SP_PTREGS(%r15) | |
451 | xc 0(__PT_SIZE,%r12),0(%r12) | |
452 | l %r1,BASED(.Ldo_execve) | |
453 | lr %r5,%r12 | |
454 | basr %r14,%r1 | |
455 | ltr %r2,%r2 | |
456 | be BASED(0f) | |
457 | a %r15,BASED(.Lc_spsize) | |
458 | lm %r12,%r15,48(%r15) | |
459 | br %r14 | |
460 | # execve succeeded. | |
461 | 0: stnsm __SF_EMPTY(%r15),0xfc # disable interrupts | |
462 | l %r15,__LC_KERNEL_STACK # load ksp | |
463 | s %r15,BASED(.Lc_spsize) # make room for registers & psw | |
464 | l %r9,__LC_THREAD_INFO | |
465 | mvc SP_PTREGS(__PT_SIZE,%r15),0(%r12) # copy pt_regs | |
466 | xc __SF_BACKCHAIN(4,%r15),__SF_BACKCHAIN(%r15) | |
467 | stosm __SF_EMPTY(%r15),0x03 # reenable interrupts | |
468 | l %r1,BASED(.Lexecve_tail) | |
469 | basr %r14,%r1 | |
470 | b BASED(sysc_return) | |
1da177e4 LT |
471 | |
472 | /* | |
473 | * Program check handler routine | |
474 | */ | |
475 | ||
25d83cbf | 476 | .globl pgm_check_handler |
1da177e4 LT |
477 | pgm_check_handler: |
478 | /* | |
479 | * First we need to check for a special case: | |
480 | * Single stepping an instruction that disables the PER event mask will | |
481 | * cause a PER event AFTER the mask has been set. Example: SVC or LPSW. | |
482 | * For a single stepped SVC the program check handler gets control after | |
483 | * the SVC new PSW has been loaded. But we want to execute the SVC first and | |
484 | * then handle the PER event. Therefore we update the SVC old PSW to point | |
485 | * to the pgm_check_handler and branch to the SVC handler after we checked | |
486 | * if we have to load the kernel stack register. | |
487 | * For every other possible cause for PER event without the PER mask set | |
488 | * we just ignore the PER event (FIXME: is there anything we have to do | |
489 | * for LPSW?). | |
490 | */ | |
c185b783 | 491 | stpt __LC_SYNC_ENTER_TIMER |
1da177e4 | 492 | SAVE_ALL_BASE __LC_SAVE_AREA |
25d83cbf HC |
493 | tm __LC_PGM_INT_CODE+1,0x80 # check whether we got a per exception |
494 | bnz BASED(pgm_per) # got per exception -> special case | |
63b12246 | 495 | SAVE_ALL_SYNC __LC_PGM_OLD_PSW,__LC_SAVE_AREA |
77fa2245 | 496 | CREATE_STACK_FRAME __LC_PGM_OLD_PSW,__LC_SAVE_AREA |
1da177e4 LT |
497 | tm SP_PSW+1(%r15),0x01 # interrupting from user ? |
498 | bz BASED(pgm_no_vtime) | |
499 | UPDATE_VTIME __LC_EXIT_TIMER,__LC_SYNC_ENTER_TIMER,__LC_USER_TIMER | |
500 | UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER | |
501 | mvc __LC_LAST_UPDATE_TIMER(8),__LC_SYNC_ENTER_TIMER | |
502 | pgm_no_vtime: | |
1da177e4 | 503 | l %r9,__LC_THREAD_INFO # load pointer to thread_info struct |
411788ea | 504 | TRACE_IRQS_OFF |
25d83cbf | 505 | l %r3,__LC_PGM_ILC # load program interruption code |
1da177e4 LT |
506 | la %r8,0x7f |
507 | nr %r8,%r3 | |
508 | pgm_do_call: | |
25d83cbf HC |
509 | l %r7,BASED(.Ljump_table) |
510 | sll %r8,2 | |
511 | l %r7,0(%r8,%r7) # load address of handler routine | |
512 | la %r2,SP_PTREGS(%r15) # address of register-save area | |
513 | la %r14,BASED(sysc_return) | |
514 | br %r7 # branch to interrupt-handler | |
1da177e4 LT |
515 | |
516 | # | |
517 | # handle per exception | |
518 | # | |
519 | pgm_per: | |
25d83cbf HC |
520 | tm __LC_PGM_OLD_PSW,0x40 # test if per event recording is on |
521 | bnz BASED(pgm_per_std) # ok, normal per event from user space | |
1da177e4 | 522 | # ok its one of the special cases, now we need to find out which one |
25d83cbf HC |
523 | clc __LC_PGM_OLD_PSW(8),__LC_SVC_NEW_PSW |
524 | be BASED(pgm_svcper) | |
1da177e4 | 525 | # no interesting special case, ignore PER event |
25d83cbf HC |
526 | lm %r12,%r15,__LC_SAVE_AREA |
527 | lpsw 0x28 | |
1da177e4 LT |
528 | |
529 | # | |
530 | # Normal per exception | |
531 | # | |
532 | pgm_per_std: | |
63b12246 | 533 | SAVE_ALL_SYNC __LC_PGM_OLD_PSW,__LC_SAVE_AREA |
77fa2245 | 534 | CREATE_STACK_FRAME __LC_PGM_OLD_PSW,__LC_SAVE_AREA |
1da177e4 LT |
535 | tm SP_PSW+1(%r15),0x01 # interrupting from user ? |
536 | bz BASED(pgm_no_vtime2) | |
537 | UPDATE_VTIME __LC_EXIT_TIMER,__LC_SYNC_ENTER_TIMER,__LC_USER_TIMER | |
538 | UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER | |
539 | mvc __LC_LAST_UPDATE_TIMER(8),__LC_SYNC_ENTER_TIMER | |
540 | pgm_no_vtime2: | |
1da177e4 | 541 | l %r9,__LC_THREAD_INFO # load pointer to thread_info struct |
411788ea | 542 | TRACE_IRQS_OFF |
1da177e4 LT |
543 | l %r1,__TI_task(%r9) |
544 | mvc __THREAD_per+__PER_atmid(2,%r1),__LC_PER_ATMID | |
545 | mvc __THREAD_per+__PER_address(4,%r1),__LC_PER_ADDRESS | |
546 | mvc __THREAD_per+__PER_access_id(1,%r1),__LC_PER_ACCESS_ID | |
547 | oi __TI_flags+3(%r9),_TIF_SINGLE_STEP # set TIF_SINGLE_STEP | |
4ba069b8 MG |
548 | tm SP_PSW+1(%r15),0x01 # kernel per event ? |
549 | bz BASED(kernel_per) | |
25d83cbf | 550 | l %r3,__LC_PGM_ILC # load program interruption code |
1da177e4 | 551 | la %r8,0x7f |
25d83cbf HC |
552 | nr %r8,%r3 # clear per-event-bit and ilc |
553 | be BASED(sysc_return) # only per or per+check ? | |
1da177e4 LT |
554 | b BASED(pgm_do_call) |
555 | ||
556 | # | |
557 | # it was a single stepped SVC that is causing all the trouble | |
558 | # | |
559 | pgm_svcper: | |
63b12246 | 560 | SAVE_ALL_SYNC __LC_SVC_OLD_PSW,__LC_SAVE_AREA |
77fa2245 | 561 | CREATE_STACK_FRAME __LC_SVC_OLD_PSW,__LC_SAVE_AREA |
1da177e4 LT |
562 | UPDATE_VTIME __LC_EXIT_TIMER,__LC_SYNC_ENTER_TIMER,__LC_USER_TIMER |
563 | UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER | |
564 | mvc __LC_LAST_UPDATE_TIMER(8),__LC_SYNC_ENTER_TIMER | |
1da177e4 LT |
565 | lh %r7,0x8a # get svc number from lowcore |
566 | l %r9,__LC_THREAD_INFO # load pointer to thread_info struct | |
411788ea | 567 | TRACE_IRQS_OFF |
bcc6525f CB |
568 | l %r8,__TI_task(%r9) |
569 | mvc __THREAD_per+__PER_atmid(2,%r8),__LC_PER_ATMID | |
570 | mvc __THREAD_per+__PER_address(4,%r8),__LC_PER_ADDRESS | |
571 | mvc __THREAD_per+__PER_access_id(1,%r8),__LC_PER_ACCESS_ID | |
1da177e4 | 572 | oi __TI_flags+3(%r9),_TIF_SINGLE_STEP # set TIF_SINGLE_STEP |
1f194a4c | 573 | TRACE_IRQS_ON |
1da177e4 LT |
574 | stosm __SF_EMPTY(%r15),0x03 # reenable interrupts |
575 | b BASED(sysc_do_svc) | |
576 | ||
4ba069b8 MG |
577 | # |
578 | # per was called from kernel, must be kprobes | |
579 | # | |
580 | kernel_per: | |
59da2139 MS |
581 | mvi SP_SVCNR(%r15),0xff # set trap indication to pgm check |
582 | mvi SP_SVCNR+1(%r15),0xff | |
4ba069b8 MG |
583 | la %r2,SP_PTREGS(%r15) # address of register-save area |
584 | l %r1,BASED(.Lhandle_per) # load adr. of per handler | |
411788ea | 585 | la %r14,BASED(sysc_restore)# load adr. of system return |
4ba069b8 MG |
586 | br %r1 # branch to do_single_step |
587 | ||
1da177e4 LT |
588 | /* |
589 | * IO interrupt handler routine | |
590 | */ | |
591 | ||
25d83cbf | 592 | .globl io_int_handler |
1da177e4 | 593 | io_int_handler: |
1da177e4 | 594 | stck __LC_INT_CLOCK |
9cfb9b3c | 595 | stpt __LC_ASYNC_ENTER_TIMER |
1da177e4 | 596 | SAVE_ALL_BASE __LC_SAVE_AREA+16 |
63b12246 | 597 | SAVE_ALL_ASYNC __LC_IO_OLD_PSW,__LC_SAVE_AREA+16 |
77fa2245 | 598 | CREATE_STACK_FRAME __LC_IO_OLD_PSW,__LC_SAVE_AREA+16 |
1da177e4 LT |
599 | tm SP_PSW+1(%r15),0x01 # interrupting from user ? |
600 | bz BASED(io_no_vtime) | |
601 | UPDATE_VTIME __LC_EXIT_TIMER,__LC_ASYNC_ENTER_TIMER,__LC_USER_TIMER | |
602 | UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER | |
603 | mvc __LC_LAST_UPDATE_TIMER(8),__LC_ASYNC_ENTER_TIMER | |
604 | io_no_vtime: | |
1da177e4 | 605 | l %r9,__LC_THREAD_INFO # load pointer to thread_info struct |
1f194a4c | 606 | TRACE_IRQS_OFF |
25d83cbf HC |
607 | l %r1,BASED(.Ldo_IRQ) # load address of do_IRQ |
608 | la %r2,SP_PTREGS(%r15) # address of register-save area | |
609 | basr %r14,%r1 # branch to standard irq handler | |
1da177e4 | 610 | io_return: |
1da177e4 | 611 | tm __TI_flags+3(%r9),_TIF_WORK_INT |
25d83cbf | 612 | bnz BASED(io_work) # there is work to do (signals etc.) |
411788ea HC |
613 | io_restore: |
614 | #ifdef CONFIG_TRACE_IRQFLAGS | |
a8c3cb49 HB |
615 | la %r1,BASED(io_restore_trace_psw_addr) |
616 | l %r1,0(%r1) | |
411788ea HC |
617 | lpsw 0(%r1) |
618 | io_restore_trace: | |
619 | TRACE_IRQS_CHECK | |
523b44cf | 620 | LOCKDEP_SYS_EXIT |
411788ea | 621 | #endif |
1da177e4 | 622 | io_leave: |
25d83cbf | 623 | RESTORE_ALL __LC_RETURN_PSW,0 |
ae6aa2ea | 624 | io_done: |
1da177e4 | 625 | |
411788ea | 626 | #ifdef CONFIG_TRACE_IRQFLAGS |
a8c3cb49 HB |
627 | io_restore_trace_psw_addr: |
628 | .long io_restore_trace_psw | |
629 | ||
630 | .section .data,"aw",@progbits | |
411788ea HC |
631 | .align 8 |
632 | .globl io_restore_trace_psw | |
633 | io_restore_trace_psw: | |
634 | .long 0, io_restore_trace + 0x80000000 | |
a8c3cb49 | 635 | .previous |
411788ea HC |
636 | #endif |
637 | ||
2688905e MS |
638 | # |
639 | # switch to kernel stack, then check the TIF bits | |
640 | # | |
641 | io_work: | |
642 | tm SP_PSW+1(%r15),0x01 # returning to user ? | |
643 | #ifndef CONFIG_PREEMPT | |
644 | bno BASED(io_restore) # no-> skip resched & signal | |
645 | #else | |
646 | bnz BASED(io_work_user) # no -> check for preemptive scheduling | |
647 | # check for preemptive scheduling | |
1da177e4 | 648 | icm %r0,15,__TI_precount(%r9) |
2688905e | 649 | bnz BASED(io_restore) # preemption disabled |
1da177e4 LT |
650 | l %r1,SP_R15(%r15) |
651 | s %r1,BASED(.Lc_spsize) | |
652 | mvc SP_PTREGS(__PT_SIZE,%r1),SP_PTREGS(%r15) | |
25d83cbf | 653 | xc __SF_BACKCHAIN(4,%r1),__SF_BACKCHAIN(%r1) # clear back chain |
1da177e4 LT |
654 | lr %r15,%r1 |
655 | io_resume_loop: | |
656 | tm __TI_flags+3(%r9),_TIF_NEED_RESCHED | |
411788ea | 657 | bno BASED(io_restore) |
b8e7a54c HC |
658 | l %r1,BASED(.Lpreempt_schedule_irq) |
659 | la %r14,BASED(io_resume_loop) | |
660 | br %r1 # call schedule | |
1da177e4 LT |
661 | #endif |
662 | ||
2688905e | 663 | io_work_user: |
1da177e4 LT |
664 | l %r1,__LC_KERNEL_STACK |
665 | s %r1,BASED(.Lc_spsize) | |
666 | mvc SP_PTREGS(__PT_SIZE,%r1),SP_PTREGS(%r15) | |
25d83cbf | 667 | xc __SF_BACKCHAIN(4,%r1),__SF_BACKCHAIN(%r1) # clear back chain |
1da177e4 LT |
668 | lr %r15,%r1 |
669 | # | |
670 | # One of the work bits is on. Find out which one. | |
02a029b3 | 671 | # Checked are: _TIF_SIGPENDING, _TIF_NEED_RESCHED |
25d83cbf | 672 | # and _TIF_MCCK_PENDING |
1da177e4 LT |
673 | # |
674 | io_work_loop: | |
77fa2245 | 675 | tm __TI_flags+3(%r9),_TIF_MCCK_PENDING |
25d83cbf | 676 | bo BASED(io_mcck_pending) |
1da177e4 LT |
677 | tm __TI_flags+3(%r9),_TIF_NEED_RESCHED |
678 | bo BASED(io_reschedule) | |
02a029b3 | 679 | tm __TI_flags+3(%r9),_TIF_SIGPENDING |
54dfe5dd | 680 | bnz BASED(io_sigpending) |
753c4dd6 MS |
681 | tm __TI_flags+3(%r9),_TIF_NOTIFY_RESUME |
682 | bnz BASED(io_notify_resume) | |
411788ea HC |
683 | b BASED(io_restore) |
684 | io_work_done: | |
1da177e4 | 685 | |
77fa2245 HC |
686 | # |
687 | # _TIF_MCCK_PENDING is set, call handler | |
688 | # | |
689 | io_mcck_pending: | |
690 | l %r1,BASED(.Ls390_handle_mcck) | |
b771aeac | 691 | basr %r14,%r1 # TIF bit will be cleared by handler |
b771aeac | 692 | b BASED(io_work_loop) |
77fa2245 | 693 | |
1da177e4 LT |
694 | # |
695 | # _TIF_NEED_RESCHED is set, call schedule | |
25d83cbf HC |
696 | # |
697 | io_reschedule: | |
411788ea | 698 | TRACE_IRQS_ON |
25d83cbf HC |
699 | l %r1,BASED(.Lschedule) |
700 | stosm __SF_EMPTY(%r15),0x03 # reenable interrupts | |
701 | basr %r14,%r1 # call scheduler | |
702 | stnsm __SF_EMPTY(%r15),0xfc # disable I/O and ext. interrupts | |
411788ea | 703 | TRACE_IRQS_OFF |
1da177e4 | 704 | tm __TI_flags+3(%r9),_TIF_WORK_INT |
411788ea | 705 | bz BASED(io_restore) # there is no work to do |
1da177e4 LT |
706 | b BASED(io_work_loop) |
707 | ||
708 | # | |
02a029b3 | 709 | # _TIF_SIGPENDING is set, call do_signal |
1da177e4 | 710 | # |
25d83cbf | 711 | io_sigpending: |
411788ea | 712 | TRACE_IRQS_ON |
25d83cbf HC |
713 | stosm __SF_EMPTY(%r15),0x03 # reenable interrupts |
714 | la %r2,SP_PTREGS(%r15) # load pt_regs | |
715 | l %r1,BASED(.Ldo_signal) | |
716 | basr %r14,%r1 # call do_signal | |
717 | stnsm __SF_EMPTY(%r15),0xfc # disable I/O and ext. interrupts | |
411788ea | 718 | TRACE_IRQS_OFF |
e1c3ad96 | 719 | b BASED(io_work_loop) |
1da177e4 | 720 | |
753c4dd6 MS |
721 | # |
722 | # _TIF_SIGPENDING is set, call do_signal | |
723 | # | |
724 | io_notify_resume: | |
725 | TRACE_IRQS_ON | |
726 | stosm __SF_EMPTY(%r15),0x03 # reenable interrupts | |
727 | la %r2,SP_PTREGS(%r15) # load pt_regs | |
728 | l %r1,BASED(.Ldo_notify_resume) | |
729 | basr %r14,%r1 # call do_signal | |
730 | stnsm __SF_EMPTY(%r15),0xfc # disable I/O and ext. interrupts | |
731 | TRACE_IRQS_OFF | |
732 | b BASED(io_work_loop) | |
733 | ||
1da177e4 LT |
734 | /* |
735 | * External interrupt handler routine | |
736 | */ | |
737 | ||
25d83cbf | 738 | .globl ext_int_handler |
1da177e4 | 739 | ext_int_handler: |
1da177e4 | 740 | stck __LC_INT_CLOCK |
9cfb9b3c | 741 | stpt __LC_ASYNC_ENTER_TIMER |
1da177e4 | 742 | SAVE_ALL_BASE __LC_SAVE_AREA+16 |
63b12246 | 743 | SAVE_ALL_ASYNC __LC_EXT_OLD_PSW,__LC_SAVE_AREA+16 |
77fa2245 | 744 | CREATE_STACK_FRAME __LC_EXT_OLD_PSW,__LC_SAVE_AREA+16 |
1da177e4 LT |
745 | tm SP_PSW+1(%r15),0x01 # interrupting from user ? |
746 | bz BASED(ext_no_vtime) | |
747 | UPDATE_VTIME __LC_EXIT_TIMER,__LC_ASYNC_ENTER_TIMER,__LC_USER_TIMER | |
748 | UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER | |
749 | mvc __LC_LAST_UPDATE_TIMER(8),__LC_ASYNC_ENTER_TIMER | |
750 | ext_no_vtime: | |
1da177e4 | 751 | l %r9,__LC_THREAD_INFO # load pointer to thread_info struct |
1f194a4c | 752 | TRACE_IRQS_OFF |
25d83cbf HC |
753 | la %r2,SP_PTREGS(%r15) # address of register-save area |
754 | lh %r3,__LC_EXT_INT_CODE # get interruption code | |
1da177e4 LT |
755 | l %r1,BASED(.Ldo_extint) |
756 | basr %r14,%r1 | |
757 | b BASED(io_return) | |
758 | ||
ae6aa2ea MS |
759 | __critical_end: |
760 | ||
1da177e4 LT |
761 | /* |
762 | * Machine check handler routines | |
763 | */ | |
764 | ||
25d83cbf | 765 | .globl mcck_int_handler |
1da177e4 | 766 | mcck_int_handler: |
9cfb9b3c | 767 | stck __LC_INT_CLOCK |
77fa2245 HC |
768 | spt __LC_CPU_TIMER_SAVE_AREA # revalidate cpu timer |
769 | lm %r0,%r15,__LC_GPREGS_SAVE_AREA # revalidate gprs | |
1da177e4 | 770 | SAVE_ALL_BASE __LC_SAVE_AREA+32 |
77fa2245 | 771 | la %r12,__LC_MCK_OLD_PSW |
25d83cbf | 772 | tm __LC_MCCK_CODE,0x80 # system damage? |
77fa2245 | 773 | bo BASED(mcck_int_main) # yes -> rest of mcck code invalid |
63b12246 MS |
774 | mvc __LC_SAVE_AREA+52(8),__LC_ASYNC_ENTER_TIMER |
775 | mvc __LC_ASYNC_ENTER_TIMER(8),__LC_CPU_TIMER_SAVE_AREA | |
776 | tm __LC_MCCK_CODE+5,0x02 # stored cpu timer value valid? | |
777 | bo BASED(1f) | |
778 | la %r14,__LC_SYNC_ENTER_TIMER | |
779 | clc 0(8,%r14),__LC_ASYNC_ENTER_TIMER | |
780 | bl BASED(0f) | |
781 | la %r14,__LC_ASYNC_ENTER_TIMER | |
782 | 0: clc 0(8,%r14),__LC_EXIT_TIMER | |
783 | bl BASED(0f) | |
784 | la %r14,__LC_EXIT_TIMER | |
785 | 0: clc 0(8,%r14),__LC_LAST_UPDATE_TIMER | |
786 | bl BASED(0f) | |
787 | la %r14,__LC_LAST_UPDATE_TIMER | |
788 | 0: spt 0(%r14) | |
789 | mvc __LC_ASYNC_ENTER_TIMER(8),0(%r14) | |
c185b783 | 790 | 1: tm __LC_MCCK_CODE+2,0x09 # mwp + ia of old psw valid? |
77fa2245 HC |
791 | bno BASED(mcck_int_main) # no -> skip cleanup critical |
792 | tm __LC_MCK_OLD_PSW+1,0x01 # test problem state bit | |
793 | bnz BASED(mcck_int_main) # from user -> load async stack | |
794 | clc __LC_MCK_OLD_PSW+4(4),BASED(.Lcritical_end) | |
795 | bhe BASED(mcck_int_main) | |
796 | clc __LC_MCK_OLD_PSW+4(4),BASED(.Lcritical_start) | |
797 | bl BASED(mcck_int_main) | |
798 | l %r14,BASED(.Lcleanup_critical) | |
799 | basr %r14,%r14 | |
800 | mcck_int_main: | |
801 | l %r14,__LC_PANIC_STACK # are we already on the panic stack? | |
802 | slr %r14,%r15 | |
803 | sra %r14,PAGE_SHIFT | |
804 | be BASED(0f) | |
805 | l %r15,__LC_PANIC_STACK # load panic stack | |
806 | 0: CREATE_STACK_FRAME __LC_MCK_OLD_PSW,__LC_SAVE_AREA+32 | |
25d83cbf | 807 | tm __LC_MCCK_CODE+2,0x08 # mwp of old psw valid? |
ae6aa2ea | 808 | bno BASED(mcck_no_vtime) # no -> skip cleanup critical |
63b12246 | 809 | tm SP_PSW+1(%r15),0x01 # interrupting from user ? |
ae6aa2ea MS |
810 | bz BASED(mcck_no_vtime) |
811 | UPDATE_VTIME __LC_EXIT_TIMER,__LC_ASYNC_ENTER_TIMER,__LC_USER_TIMER | |
812 | UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER | |
813 | mvc __LC_LAST_UPDATE_TIMER(8),__LC_ASYNC_ENTER_TIMER | |
814 | mcck_no_vtime: | |
77fa2245 HC |
815 | l %r9,__LC_THREAD_INFO # load pointer to thread_info struct |
816 | la %r2,SP_PTREGS(%r15) # load pt_regs | |
25d83cbf HC |
817 | l %r1,BASED(.Ls390_mcck) |
818 | basr %r14,%r1 # call machine check handler | |
819 | tm SP_PSW+1(%r15),0x01 # returning to user ? | |
77fa2245 | 820 | bno BASED(mcck_return) |
25d83cbf | 821 | l %r1,__LC_KERNEL_STACK # switch to kernel stack |
77fa2245 HC |
822 | s %r1,BASED(.Lc_spsize) |
823 | mvc SP_PTREGS(__PT_SIZE,%r1),SP_PTREGS(%r15) | |
25d83cbf | 824 | xc __SF_BACKCHAIN(4,%r1),__SF_BACKCHAIN(%r1) # clear back chain |
77fa2245 HC |
825 | lr %r15,%r1 |
826 | stosm __SF_EMPTY(%r15),0x04 # turn dat on | |
827 | tm __TI_flags+3(%r9),_TIF_MCCK_PENDING | |
828 | bno BASED(mcck_return) | |
1f194a4c | 829 | TRACE_IRQS_OFF |
77fa2245 HC |
830 | l %r1,BASED(.Ls390_handle_mcck) |
831 | basr %r14,%r1 # call machine check handler | |
1f194a4c | 832 | TRACE_IRQS_ON |
1da177e4 | 833 | mcck_return: |
63b12246 MS |
834 | mvc __LC_RETURN_MCCK_PSW(8),SP_PSW(%r15) # move return PSW |
835 | ni __LC_RETURN_MCCK_PSW+1,0xfd # clear wait state bit | |
63b12246 MS |
836 | mvc __LC_ASYNC_ENTER_TIMER(8),__LC_SAVE_AREA+52 |
837 | tm __LC_RETURN_MCCK_PSW+1,0x01 # returning to user ? | |
838 | bno BASED(0f) | |
839 | lm %r0,%r15,SP_R0(%r15) # load gprs 0-15 | |
840 | stpt __LC_EXIT_TIMER | |
841 | lpsw __LC_RETURN_MCCK_PSW # back to caller | |
c185b783 | 842 | 0: lm %r0,%r15,SP_R0(%r15) # load gprs 0-15 |
63b12246 MS |
843 | lpsw __LC_RETURN_MCCK_PSW # back to caller |
844 | ||
25d83cbf | 845 | RESTORE_ALL __LC_RETURN_MCCK_PSW,0 |
1da177e4 | 846 | |
1da177e4 LT |
847 | /* |
848 | * Restart interruption handler, kick starter for additional CPUs | |
849 | */ | |
84b36a8e | 850 | #ifdef CONFIG_SMP |
2bc89b5e | 851 | __CPUINIT |
25d83cbf | 852 | .globl restart_int_handler |
1da177e4 | 853 | restart_int_handler: |
5b409ed1 MS |
854 | basr %r1,0 |
855 | restart_base: | |
856 | spt restart_vtime-restart_base(%r1) | |
857 | stck __LC_LAST_UPDATE_CLOCK | |
858 | mvc __LC_LAST_UPDATE_TIMER(8),restart_vtime-restart_base(%r1) | |
859 | mvc __LC_EXIT_TIMER(8),restart_vtime-restart_base(%r1) | |
25d83cbf HC |
860 | l %r15,__LC_SAVE_AREA+60 # load ksp |
861 | lctl %c0,%c15,__LC_CREGS_SAVE_AREA # get new ctl regs | |
862 | lam %a0,%a15,__LC_AREGS_SAVE_AREA | |
863 | lm %r6,%r15,__SF_GPRS(%r15) # load registers from clone | |
5b409ed1 MS |
864 | l %r1,__LC_THREAD_INFO |
865 | mvc __LC_USER_TIMER(8),__TI_user_timer(%r1) | |
866 | mvc __LC_SYSTEM_TIMER(8),__TI_system_timer(%r1) | |
867 | xc __LC_STEAL_TIMER(8),__LC_STEAL_TIMER | |
25d83cbf HC |
868 | stosm __SF_EMPTY(%r15),0x04 # now we can turn dat on |
869 | basr %r14,0 | |
870 | l %r14,restart_addr-.(%r14) | |
871 | br %r14 # branch to start_secondary | |
1da177e4 | 872 | restart_addr: |
25d83cbf | 873 | .long start_secondary |
5b409ed1 MS |
874 | .align 8 |
875 | restart_vtime: | |
876 | .long 0x7fffffff,0xffffffff | |
84b36a8e | 877 | .previous |
1da177e4 LT |
878 | #else |
879 | /* | |
880 | * If we do not run with SMP enabled, let the new CPU crash ... | |
881 | */ | |
25d83cbf | 882 | .globl restart_int_handler |
1da177e4 | 883 | restart_int_handler: |
25d83cbf | 884 | basr %r1,0 |
1da177e4 | 885 | restart_base: |
25d83cbf HC |
886 | lpsw restart_crash-restart_base(%r1) |
887 | .align 8 | |
1da177e4 | 888 | restart_crash: |
25d83cbf | 889 | .long 0x000a0000,0x00000000 |
1da177e4 LT |
890 | restart_go: |
891 | #endif | |
892 | ||
893 | #ifdef CONFIG_CHECK_STACK | |
894 | /* | |
895 | * The synchronous or the asynchronous stack overflowed. We are dead. | |
896 | * No need to properly save the registers, we are going to panic anyway. | |
897 | * Setup a pt_regs so that show_trace can provide a good call trace. | |
898 | */ | |
899 | stack_overflow: | |
900 | l %r15,__LC_PANIC_STACK # change to panic stack | |
901 | sl %r15,BASED(.Lc_spsize) | |
902 | mvc SP_PSW(8,%r15),0(%r12) # move user PSW to stack | |
903 | stm %r0,%r11,SP_R0(%r15) # store gprs %r0-%r11 to kernel stack | |
904 | la %r1,__LC_SAVE_AREA | |
905 | ch %r12,BASED(.L0x020) # old psw addr == __LC_SVC_OLD_PSW ? | |
906 | be BASED(0f) | |
907 | ch %r12,BASED(.L0x028) # old psw addr == __LC_PGM_OLD_PSW ? | |
908 | be BASED(0f) | |
909 | la %r1,__LC_SAVE_AREA+16 | |
910 | 0: mvc SP_R12(16,%r15),0(%r1) # move %r12-%r15 to stack | |
25d83cbf | 911 | xc __SF_BACKCHAIN(4,%r15),__SF_BACKCHAIN(%r15) # clear back chain |
1da177e4 | 912 | l %r1,BASED(1f) # branch to kernel_stack_overflow |
25d83cbf | 913 | la %r2,SP_PTREGS(%r15) # load pt_regs |
1da177e4 | 914 | br %r1 |
25d83cbf | 915 | 1: .long kernel_stack_overflow |
1da177e4 LT |
916 | #endif |
917 | ||
918 | cleanup_table_system_call: | |
919 | .long system_call + 0x80000000, sysc_do_svc + 0x80000000 | |
920 | cleanup_table_sysc_return: | |
921 | .long sysc_return + 0x80000000, sysc_leave + 0x80000000 | |
922 | cleanup_table_sysc_leave: | |
411788ea | 923 | .long sysc_leave + 0x80000000, sysc_done + 0x80000000 |
1da177e4 | 924 | cleanup_table_sysc_work_loop: |
411788ea | 925 | .long sysc_work_loop + 0x80000000, sysc_work_done + 0x80000000 |
63b12246 MS |
926 | cleanup_table_io_return: |
927 | .long io_return + 0x80000000, io_leave + 0x80000000 | |
ae6aa2ea MS |
928 | cleanup_table_io_leave: |
929 | .long io_leave + 0x80000000, io_done + 0x80000000 | |
930 | cleanup_table_io_work_loop: | |
411788ea | 931 | .long io_work_loop + 0x80000000, io_work_done + 0x80000000 |
1da177e4 LT |
932 | |
933 | cleanup_critical: | |
934 | clc 4(4,%r12),BASED(cleanup_table_system_call) | |
935 | bl BASED(0f) | |
936 | clc 4(4,%r12),BASED(cleanup_table_system_call+4) | |
937 | bl BASED(cleanup_system_call) | |
938 | 0: | |
939 | clc 4(4,%r12),BASED(cleanup_table_sysc_return) | |
940 | bl BASED(0f) | |
941 | clc 4(4,%r12),BASED(cleanup_table_sysc_return+4) | |
942 | bl BASED(cleanup_sysc_return) | |
943 | 0: | |
944 | clc 4(4,%r12),BASED(cleanup_table_sysc_leave) | |
945 | bl BASED(0f) | |
946 | clc 4(4,%r12),BASED(cleanup_table_sysc_leave+4) | |
947 | bl BASED(cleanup_sysc_leave) | |
948 | 0: | |
949 | clc 4(4,%r12),BASED(cleanup_table_sysc_work_loop) | |
950 | bl BASED(0f) | |
951 | clc 4(4,%r12),BASED(cleanup_table_sysc_work_loop+4) | |
77fa2245 | 952 | bl BASED(cleanup_sysc_return) |
63b12246 MS |
953 | 0: |
954 | clc 4(4,%r12),BASED(cleanup_table_io_return) | |
955 | bl BASED(0f) | |
956 | clc 4(4,%r12),BASED(cleanup_table_io_return+4) | |
957 | bl BASED(cleanup_io_return) | |
ae6aa2ea MS |
958 | 0: |
959 | clc 4(4,%r12),BASED(cleanup_table_io_leave) | |
960 | bl BASED(0f) | |
961 | clc 4(4,%r12),BASED(cleanup_table_io_leave+4) | |
962 | bl BASED(cleanup_io_leave) | |
963 | 0: | |
964 | clc 4(4,%r12),BASED(cleanup_table_io_work_loop) | |
965 | bl BASED(0f) | |
966 | clc 4(4,%r12),BASED(cleanup_table_io_work_loop+4) | |
967 | bl BASED(cleanup_io_return) | |
1da177e4 LT |
968 | 0: |
969 | br %r14 | |
970 | ||
971 | cleanup_system_call: | |
972 | mvc __LC_RETURN_PSW(8),0(%r12) | |
ae6aa2ea MS |
973 | c %r12,BASED(.Lmck_old_psw) |
974 | be BASED(0f) | |
975 | la %r12,__LC_SAVE_AREA+16 | |
976 | b BASED(1f) | |
977 | 0: la %r12,__LC_SAVE_AREA+32 | |
978 | 1: | |
1da177e4 LT |
979 | clc __LC_RETURN_PSW+4(4),BASED(cleanup_system_call_insn+4) |
980 | bh BASED(0f) | |
981 | mvc __LC_SYNC_ENTER_TIMER(8),__LC_ASYNC_ENTER_TIMER | |
982 | 0: clc __LC_RETURN_PSW+4(4),BASED(cleanup_system_call_insn+8) | |
983 | bhe BASED(cleanup_vtime) | |
1da177e4 LT |
984 | clc __LC_RETURN_PSW+4(4),BASED(cleanup_system_call_insn) |
985 | bh BASED(0f) | |
ae6aa2ea MS |
986 | mvc __LC_SAVE_AREA(16),0(%r12) |
987 | 0: st %r13,4(%r12) | |
988 | st %r12,__LC_SAVE_AREA+48 # argh | |
63b12246 | 989 | SAVE_ALL_SYNC __LC_SVC_OLD_PSW,__LC_SAVE_AREA |
77fa2245 | 990 | CREATE_STACK_FRAME __LC_SVC_OLD_PSW,__LC_SAVE_AREA |
ae6aa2ea MS |
991 | l %r12,__LC_SAVE_AREA+48 # argh |
992 | st %r15,12(%r12) | |
1da177e4 | 993 | lh %r7,0x8a |
1da177e4 LT |
994 | cleanup_vtime: |
995 | clc __LC_RETURN_PSW+4(4),BASED(cleanup_system_call_insn+12) | |
996 | bhe BASED(cleanup_stime) | |
1da177e4 LT |
997 | UPDATE_VTIME __LC_EXIT_TIMER,__LC_SYNC_ENTER_TIMER,__LC_USER_TIMER |
998 | cleanup_stime: | |
999 | clc __LC_RETURN_PSW+4(4),BASED(cleanup_system_call_insn+16) | |
1000 | bh BASED(cleanup_update) | |
1001 | UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER | |
1002 | cleanup_update: | |
1003 | mvc __LC_LAST_UPDATE_TIMER(8),__LC_SYNC_ENTER_TIMER | |
1da177e4 LT |
1004 | mvc __LC_RETURN_PSW+4(4),BASED(cleanup_table_system_call+4) |
1005 | la %r12,__LC_RETURN_PSW | |
1006 | br %r14 | |
1007 | cleanup_system_call_insn: | |
1008 | .long sysc_saveall + 0x80000000 | |
25d83cbf HC |
1009 | .long system_call + 0x80000000 |
1010 | .long sysc_vtime + 0x80000000 | |
1011 | .long sysc_stime + 0x80000000 | |
1012 | .long sysc_update + 0x80000000 | |
1da177e4 LT |
1013 | |
1014 | cleanup_sysc_return: | |
1015 | mvc __LC_RETURN_PSW(4),0(%r12) | |
1016 | mvc __LC_RETURN_PSW+4(4),BASED(cleanup_table_sysc_return) | |
1017 | la %r12,__LC_RETURN_PSW | |
1018 | br %r14 | |
1019 | ||
1020 | cleanup_sysc_leave: | |
1021 | clc 4(4,%r12),BASED(cleanup_sysc_leave_insn) | |
ae6aa2ea | 1022 | be BASED(2f) |
1da177e4 LT |
1023 | mvc __LC_EXIT_TIMER(8),__LC_ASYNC_ENTER_TIMER |
1024 | clc 4(4,%r12),BASED(cleanup_sysc_leave_insn+4) | |
ae6aa2ea | 1025 | be BASED(2f) |
1da177e4 | 1026 | mvc __LC_RETURN_PSW(8),SP_PSW(%r15) |
ae6aa2ea MS |
1027 | c %r12,BASED(.Lmck_old_psw) |
1028 | bne BASED(0f) | |
1029 | mvc __LC_SAVE_AREA+32(16),SP_R12(%r15) | |
1030 | b BASED(1f) | |
1031 | 0: mvc __LC_SAVE_AREA+16(16),SP_R12(%r15) | |
1032 | 1: lm %r0,%r11,SP_R0(%r15) | |
1da177e4 | 1033 | l %r15,SP_R15(%r15) |
ae6aa2ea | 1034 | 2: la %r12,__LC_RETURN_PSW |
1da177e4 LT |
1035 | br %r14 |
1036 | cleanup_sysc_leave_insn: | |
411788ea | 1037 | .long sysc_done - 4 + 0x80000000 |
411788ea | 1038 | .long sysc_done - 8 + 0x80000000 |
1da177e4 | 1039 | |
ae6aa2ea MS |
1040 | cleanup_io_return: |
1041 | mvc __LC_RETURN_PSW(4),0(%r12) | |
1042 | mvc __LC_RETURN_PSW+4(4),BASED(cleanup_table_io_work_loop) | |
1043 | la %r12,__LC_RETURN_PSW | |
1044 | br %r14 | |
1045 | ||
1046 | cleanup_io_leave: | |
1047 | clc 4(4,%r12),BASED(cleanup_io_leave_insn) | |
1048 | be BASED(2f) | |
ae6aa2ea MS |
1049 | mvc __LC_EXIT_TIMER(8),__LC_ASYNC_ENTER_TIMER |
1050 | clc 4(4,%r12),BASED(cleanup_io_leave_insn+4) | |
1051 | be BASED(2f) | |
ae6aa2ea MS |
1052 | mvc __LC_RETURN_PSW(8),SP_PSW(%r15) |
1053 | c %r12,BASED(.Lmck_old_psw) | |
1054 | bne BASED(0f) | |
1055 | mvc __LC_SAVE_AREA+32(16),SP_R12(%r15) | |
1056 | b BASED(1f) | |
1057 | 0: mvc __LC_SAVE_AREA+16(16),SP_R12(%r15) | |
1058 | 1: lm %r0,%r11,SP_R0(%r15) | |
1059 | l %r15,SP_R15(%r15) | |
1060 | 2: la %r12,__LC_RETURN_PSW | |
1061 | br %r14 | |
1062 | cleanup_io_leave_insn: | |
411788ea | 1063 | .long io_done - 4 + 0x80000000 |
411788ea | 1064 | .long io_done - 8 + 0x80000000 |
ae6aa2ea | 1065 | |
1da177e4 LT |
1066 | /* |
1067 | * Integer constants | |
1068 | */ | |
25d83cbf HC |
1069 | .align 4 |
1070 | .Lc_spsize: .long SP_SIZE | |
1071 | .Lc_overhead: .long STACK_FRAME_OVERHEAD | |
25d83cbf HC |
1072 | .Lnr_syscalls: .long NR_syscalls |
1073 | .L0x018: .short 0x018 | |
1074 | .L0x020: .short 0x020 | |
1075 | .L0x028: .short 0x028 | |
1076 | .L0x030: .short 0x030 | |
1077 | .L0x038: .short 0x038 | |
1078 | .Lc_1: .long 1 | |
1da177e4 LT |
1079 | |
1080 | /* | |
1081 | * Symbol constants | |
1082 | */ | |
25d83cbf | 1083 | .Ls390_mcck: .long s390_do_machine_check |
77fa2245 | 1084 | .Ls390_handle_mcck: |
25d83cbf HC |
1085 | .long s390_handle_mcck |
1086 | .Lmck_old_psw: .long __LC_MCK_OLD_PSW | |
1087 | .Ldo_IRQ: .long do_IRQ | |
1088 | .Ldo_extint: .long do_extint | |
1089 | .Ldo_signal: .long do_signal | |
753c4dd6 MS |
1090 | .Ldo_notify_resume: |
1091 | .long do_notify_resume | |
25d83cbf | 1092 | .Lhandle_per: .long do_single_step |
03ff9a23 MS |
1093 | .Ldo_execve: .long do_execve |
1094 | .Lexecve_tail: .long execve_tail | |
25d83cbf HC |
1095 | .Ljump_table: .long pgm_check_table |
1096 | .Lschedule: .long schedule | |
ab1809b4 | 1097 | #ifdef CONFIG_PREEMPT |
b8e7a54c HC |
1098 | .Lpreempt_schedule_irq: |
1099 | .long preempt_schedule_irq | |
ab1809b4 | 1100 | #endif |
753c4dd6 MS |
1101 | .Ltrace_entry: .long do_syscall_trace_enter |
1102 | .Ltrace_exit: .long do_syscall_trace_exit | |
25d83cbf HC |
1103 | .Lschedtail: .long schedule_tail |
1104 | .Lsysc_table: .long sys_call_table | |
1f194a4c | 1105 | #ifdef CONFIG_TRACE_IRQFLAGS |
50bec4ce HC |
1106 | .Ltrace_irq_on_caller: |
1107 | .long trace_hardirqs_on_caller | |
1108 | .Ltrace_irq_off_caller: | |
1109 | .long trace_hardirqs_off_caller | |
af4c6874 HC |
1110 | #endif |
1111 | #ifdef CONFIG_LOCKDEP | |
523b44cf HC |
1112 | .Llockdep_sys_exit: |
1113 | .long lockdep_sys_exit | |
1f194a4c | 1114 | #endif |
1da177e4 | 1115 | .Lcritical_start: |
25d83cbf | 1116 | .long __critical_start + 0x80000000 |
1da177e4 | 1117 | .Lcritical_end: |
25d83cbf | 1118 | .long __critical_end + 0x80000000 |
1da177e4 | 1119 | .Lcleanup_critical: |
25d83cbf | 1120 | .long cleanup_critical |
1da177e4 | 1121 | |
25d83cbf | 1122 | .section .rodata, "a" |
1da177e4 | 1123 | #define SYSCALL(esa,esame,emu) .long esa |
9bf1226b | 1124 | .globl sys_call_table |
1da177e4 LT |
1125 | sys_call_table: |
1126 | #include "syscalls.S" | |
1127 | #undef SYSCALL |