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2bf6a8fa LV |
1 | /* |
2 | * PCI Dynamic LPAR, PCI Hot Plug and PCI EEH recovery code | |
3 | * for RPA-compliant PPC64 platform. | |
4 | * Copyright (C) 2003 Linda Xie <lxie@us.ibm.com> | |
5 | * Copyright (C) 2005 International Business Machines | |
6 | * | |
7 | * Updates, 2005, John Rose <johnrose@austin.ibm.com> | |
8 | * Updates, 2005, Linas Vepstas <linas@austin.ibm.com> | |
9 | * | |
10 | * All rights reserved. | |
11 | * | |
12 | * This program is free software; you can redistribute it and/or modify | |
13 | * it under the terms of the GNU General Public License as published by | |
14 | * the Free Software Foundation; either version 2 of the License, or (at | |
15 | * your option) any later version. | |
16 | * | |
17 | * This program is distributed in the hope that it will be useful, but | |
18 | * WITHOUT ANY WARRANTY; without even the implied warranty of | |
19 | * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or | |
20 | * NON INFRINGEMENT. See the GNU General Public License for more | |
21 | * details. | |
22 | * | |
23 | * You should have received a copy of the GNU General Public License | |
24 | * along with this program; if not, write to the Free Software | |
25 | * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. | |
26 | */ | |
27 | ||
28 | #include <linux/pci.h> | |
29 | #include <asm/pci-bridge.h> | |
92eb4602 | 30 | #include <asm/ppc-pci.h> |
e8222502 | 31 | #include <asm/firmware.h> |
c3b9d9ab | 32 | #include <asm/eeh.h> |
2bf6a8fa LV |
33 | |
34 | static struct pci_bus * | |
35 | find_bus_among_children(struct pci_bus *bus, | |
36 | struct device_node *dn) | |
37 | { | |
38 | struct pci_bus *child = NULL; | |
39 | struct list_head *tmp; | |
40 | struct device_node *busdn; | |
41 | ||
42 | busdn = pci_bus_to_OF_node(bus); | |
43 | if (busdn == dn) | |
44 | return bus; | |
45 | ||
46 | list_for_each(tmp, &bus->children) { | |
47 | child = find_bus_among_children(pci_bus_b(tmp), dn); | |
48 | if (child) | |
49 | break; | |
50 | }; | |
51 | return child; | |
52 | } | |
53 | ||
54 | struct pci_bus * | |
55 | pcibios_find_pci_bus(struct device_node *dn) | |
56 | { | |
57 | struct pci_dn *pdn = dn->data; | |
58 | ||
59 | if (!pdn || !pdn->phb || !pdn->phb->bus) | |
60 | return NULL; | |
61 | ||
62 | return find_bus_among_children(pdn->phb->bus, dn); | |
63 | } | |
f9bdfa0e | 64 | EXPORT_SYMBOL_GPL(pcibios_find_pci_bus); |
2bf6a8fa LV |
65 | |
66 | /** | |
67 | * pcibios_remove_pci_devices - remove all devices under this bus | |
68 | * | |
69 | * Remove all of the PCI devices under this bus both from the | |
70 | * linux pci device tree, and from the powerpc EEH address cache. | |
71 | */ | |
72 | void | |
73 | pcibios_remove_pci_devices(struct pci_bus *bus) | |
74 | { | |
75 | struct pci_dev *dev, *tmp; | |
76 | ||
77 | list_for_each_entry_safe(dev, tmp, &bus->devices, bus_list) { | |
78 | eeh_remove_bus_device(dev); | |
79 | pci_remove_bus_device(dev); | |
80 | } | |
81 | } | |
fb39a96e | 82 | EXPORT_SYMBOL_GPL(pcibios_remove_pci_devices); |
2bf6a8fa LV |
83 | |
84 | /* Must be called before pci_bus_add_devices */ | |
31087d7d | 85 | void |
bf5e2ba2 | 86 | pcibios_fixup_new_pci_devices(struct pci_bus *bus) |
2bf6a8fa LV |
87 | { |
88 | struct pci_dev *dev; | |
89 | ||
90 | list_for_each_entry(dev, &bus->devices, bus_list) { | |
8a1bc901 GKH |
91 | /* Skip already-added devices */ |
92 | if (!dev->is_added) { | |
2bf6a8fa LV |
93 | int i; |
94 | ||
12d04eef BH |
95 | /* Fill device archdata and setup iommu table */ |
96 | pcibios_setup_new_device(dev); | |
2bf6a8fa | 97 | |
2bf6a8fa LV |
98 | pci_read_irq_line(dev); |
99 | for (i = 0; i < PCI_NUM_RESOURCES; i++) { | |
100 | struct resource *r = &dev->resource[i]; | |
101 | ||
102 | if (r->parent || !r->start || !r->flags) | |
103 | continue; | |
104 | pci_claim_resource(dev, i); | |
105 | } | |
106 | } | |
107 | } | |
108 | } | |
f9bdfa0e | 109 | EXPORT_SYMBOL_GPL(pcibios_fixup_new_pci_devices); |
2bf6a8fa LV |
110 | |
111 | static int | |
112 | pcibios_pci_config_bridge(struct pci_dev *dev) | |
113 | { | |
114 | u8 sec_busno; | |
115 | struct pci_bus *child_bus; | |
2bf6a8fa LV |
116 | |
117 | /* Get busno of downstream bus */ | |
118 | pci_read_config_byte(dev, PCI_SECONDARY_BUS, &sec_busno); | |
119 | ||
120 | /* Add to children of PCI bridge dev->bus */ | |
121 | child_bus = pci_add_new_bus(dev->bus, dev, sec_busno); | |
122 | if (!child_bus) { | |
e48b1b45 | 123 | printk (KERN_ERR "%s: could not add second bus\n", __func__); |
2bf6a8fa LV |
124 | return -EIO; |
125 | } | |
126 | sprintf(child_bus->name, "PCI Bus #%02x", child_bus->number); | |
127 | ||
128 | pci_scan_child_bus(child_bus); | |
129 | ||
bf5e2ba2 BH |
130 | /* Fixup new pci devices */ |
131 | pcibios_fixup_new_pci_devices(child_bus); | |
2bf6a8fa LV |
132 | |
133 | /* Make the discovered devices available */ | |
134 | pci_bus_add_devices(child_bus); | |
e1d04c97 LV |
135 | |
136 | eeh_add_device_tree_late(child_bus); | |
2bf6a8fa LV |
137 | return 0; |
138 | } | |
139 | ||
140 | /** | |
141 | * pcibios_add_pci_devices - adds new pci devices to bus | |
142 | * | |
143 | * This routine will find and fixup new pci devices under | |
144 | * the indicated bus. This routine presumes that there | |
145 | * might already be some devices under this bridge, so | |
146 | * it carefully tries to add only new devices. (And that | |
147 | * is how this routine differs from other, similar pcibios | |
148 | * routines.) | |
149 | */ | |
150 | void | |
151 | pcibios_add_pci_devices(struct pci_bus * bus) | |
152 | { | |
16cc11da | 153 | int slotno, num, mode; |
2bf6a8fa LV |
154 | struct pci_dev *dev; |
155 | struct device_node *dn = pci_bus_to_OF_node(bus); | |
156 | ||
157 | eeh_add_device_tree_early(dn); | |
158 | ||
16cc11da JR |
159 | mode = PCI_PROBE_NORMAL; |
160 | if (ppc_md.pci_probe_mode) | |
161 | mode = ppc_md.pci_probe_mode(bus); | |
162 | ||
163 | if (mode == PCI_PROBE_DEVTREE) { | |
827c1a6c JR |
164 | /* use ofdt-based probe */ |
165 | of_scan_bus(dn, bus); | |
166 | if (!list_empty(&bus->devices)) { | |
bf5e2ba2 | 167 | pcibios_fixup_new_pci_devices(bus); |
827c1a6c | 168 | pci_bus_add_devices(bus); |
e1d04c97 | 169 | eeh_add_device_tree_late(bus); |
827c1a6c | 170 | } |
16cc11da | 171 | } else if (mode == PCI_PROBE_NORMAL) { |
827c1a6c JR |
172 | /* use legacy probe */ |
173 | slotno = PCI_SLOT(PCI_DN(dn->child)->devfn); | |
174 | num = pci_scan_slot(bus, PCI_DEVFN(slotno, 0)); | |
175 | if (num) { | |
bf5e2ba2 | 176 | pcibios_fixup_new_pci_devices(bus); |
827c1a6c | 177 | pci_bus_add_devices(bus); |
e1d04c97 | 178 | eeh_add_device_tree_late(bus); |
827c1a6c | 179 | } |
2bf6a8fa | 180 | |
827c1a6c JR |
181 | list_for_each_entry(dev, &bus->devices, bus_list) |
182 | if (dev->hdr_type == PCI_HEADER_TYPE_BRIDGE) | |
183 | pcibios_pci_config_bridge(dev); | |
2bf6a8fa LV |
184 | } |
185 | } | |
f9bdfa0e | 186 | EXPORT_SYMBOL_GPL(pcibios_add_pci_devices); |
92eb4602 JR |
187 | |
188 | struct pci_controller * __devinit init_phb_dynamic(struct device_node *dn) | |
189 | { | |
190 | struct pci_controller *phb; | |
191 | int primary; | |
192 | ||
193 | primary = list_empty(&hose_list); | |
194 | phb = pcibios_alloc_controller(dn); | |
195 | if (!phb) | |
196 | return NULL; | |
4c9d2800 | 197 | rtas_setup_phb(phb); |
92eb4602 JR |
198 | pci_process_bridge_OF_ranges(phb, dn, 0); |
199 | ||
92eb4602 JR |
200 | pci_devs_phb_init_dynamic(phb); |
201 | ||
202 | if (dn->child) | |
203 | eeh_add_device_tree_early(dn); | |
204 | ||
205 | scan_phb(phb); | |
e90a1318 | 206 | pcibios_allocate_bus_resources(phb->bus); |
bf5e2ba2 | 207 | pcibios_fixup_new_pci_devices(phb->bus); |
92eb4602 | 208 | pci_bus_add_devices(phb->bus); |
e1d04c97 | 209 | eeh_add_device_tree_late(phb->bus); |
92eb4602 JR |
210 | |
211 | return phb; | |
212 | } | |
213 | EXPORT_SYMBOL_GPL(init_phb_dynamic); |