Commit | Line | Data |
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14cf11af | 1 | /* |
14cf11af PM |
2 | * Copyright (C) 2002 - 2005 Benjamin Herrenschmidt <benh@kernel.crashing.org> |
3 | * Copyright (C) 2004 John Steele Scott <toojays@toojays.net> | |
4 | * | |
5 | * This program is free software; you can redistribute it and/or modify | |
6 | * it under the terms of the GNU General Public License version 2 as | |
7 | * published by the Free Software Foundation. | |
8 | * | |
9 | * TODO: Need a big cleanup here. Basically, we need to have different | |
10 | * cpufreq_driver structures for the different type of HW instead of the | |
11 | * current mess. We also need to better deal with the detection of the | |
12 | * type of machine. | |
13 | * | |
14 | */ | |
15 | ||
16 | #include <linux/config.h> | |
17 | #include <linux/module.h> | |
18 | #include <linux/types.h> | |
19 | #include <linux/errno.h> | |
20 | #include <linux/kernel.h> | |
21 | #include <linux/delay.h> | |
22 | #include <linux/sched.h> | |
23 | #include <linux/adb.h> | |
24 | #include <linux/pmu.h> | |
25 | #include <linux/slab.h> | |
26 | #include <linux/cpufreq.h> | |
27 | #include <linux/init.h> | |
28 | #include <linux/sysdev.h> | |
29 | #include <linux/i2c.h> | |
30 | #include <linux/hardirq.h> | |
31 | #include <asm/prom.h> | |
32 | #include <asm/machdep.h> | |
33 | #include <asm/irq.h> | |
34 | #include <asm/pmac_feature.h> | |
35 | #include <asm/mmu_context.h> | |
36 | #include <asm/sections.h> | |
37 | #include <asm/cputable.h> | |
38 | #include <asm/time.h> | |
39 | #include <asm/system.h> | |
40 | #include <asm/mpic.h> | |
41 | #include <asm/keylargo.h> | |
42 | ||
43 | /* WARNING !!! This will cause calibrate_delay() to be called, | |
44 | * but this is an __init function ! So you MUST go edit | |
45 | * init/main.c to make it non-init before enabling DEBUG_FREQ | |
46 | */ | |
47 | #undef DEBUG_FREQ | |
48 | ||
49 | /* | |
50 | * There is a problem with the core cpufreq code on SMP kernels, | |
51 | * it won't recalculate the Bogomips properly | |
52 | */ | |
53 | #ifdef CONFIG_SMP | |
54 | #warning "WARNING, CPUFREQ not recommended on SMP kernels" | |
55 | #endif | |
56 | ||
57 | extern void low_choose_7447a_dfs(int dfs); | |
58 | extern void low_choose_750fx_pll(int pll); | |
59 | extern void low_sleep_handler(void); | |
60 | ||
61 | /* | |
62 | * Currently, PowerMac cpufreq supports only high & low frequencies | |
63 | * that are set by the firmware | |
64 | */ | |
65 | static unsigned int low_freq; | |
66 | static unsigned int hi_freq; | |
67 | static unsigned int cur_freq; | |
68 | static unsigned int sleep_freq; | |
69 | ||
70 | /* | |
71 | * Different models uses different mecanisms to switch the frequency | |
72 | */ | |
73 | static int (*set_speed_proc)(int low_speed); | |
74 | static unsigned int (*get_speed_proc)(void); | |
75 | ||
76 | /* | |
77 | * Some definitions used by the various speedprocs | |
78 | */ | |
79 | static u32 voltage_gpio; | |
80 | static u32 frequency_gpio; | |
81 | static u32 slew_done_gpio; | |
82 | static int no_schedule; | |
83 | static int has_cpu_l2lve; | |
84 | static int is_pmu_based; | |
85 | ||
86 | /* There are only two frequency states for each processor. Values | |
87 | * are in kHz for the time being. | |
88 | */ | |
89 | #define CPUFREQ_HIGH 0 | |
90 | #define CPUFREQ_LOW 1 | |
91 | ||
92 | static struct cpufreq_frequency_table pmac_cpu_freqs[] = { | |
93 | {CPUFREQ_HIGH, 0}, | |
94 | {CPUFREQ_LOW, 0}, | |
95 | {0, CPUFREQ_TABLE_END}, | |
96 | }; | |
97 | ||
98 | static struct freq_attr* pmac_cpu_freqs_attr[] = { | |
99 | &cpufreq_freq_attr_scaling_available_freqs, | |
100 | NULL, | |
101 | }; | |
102 | ||
103 | static inline void local_delay(unsigned long ms) | |
104 | { | |
105 | if (no_schedule) | |
106 | mdelay(ms); | |
107 | else | |
108 | msleep(ms); | |
109 | } | |
110 | ||
14cf11af PM |
111 | #ifdef DEBUG_FREQ |
112 | static inline void debug_calc_bogomips(void) | |
113 | { | |
114 | /* This will cause a recalc of bogomips and display the | |
115 | * result. We backup/restore the value to avoid affecting the | |
116 | * core cpufreq framework's own calculation. | |
117 | */ | |
118 | extern void calibrate_delay(void); | |
119 | ||
120 | unsigned long save_lpj = loops_per_jiffy; | |
121 | calibrate_delay(); | |
122 | loops_per_jiffy = save_lpj; | |
123 | } | |
124 | #endif /* DEBUG_FREQ */ | |
125 | ||
126 | /* Switch CPU speed under 750FX CPU control | |
127 | */ | |
128 | static int cpu_750fx_cpu_speed(int low_speed) | |
129 | { | |
130 | u32 hid2; | |
131 | ||
132 | if (low_speed == 0) { | |
133 | /* ramping up, set voltage first */ | |
134 | pmac_call_feature(PMAC_FTR_WRITE_GPIO, NULL, voltage_gpio, 0x05); | |
135 | /* Make sure we sleep for at least 1ms */ | |
136 | local_delay(10); | |
137 | ||
138 | /* tweak L2 for high voltage */ | |
139 | if (has_cpu_l2lve) { | |
140 | hid2 = mfspr(SPRN_HID2); | |
141 | hid2 &= ~0x2000; | |
142 | mtspr(SPRN_HID2, hid2); | |
143 | } | |
144 | } | |
145 | #ifdef CONFIG_6xx | |
146 | low_choose_750fx_pll(low_speed); | |
147 | #endif | |
148 | if (low_speed == 1) { | |
149 | /* tweak L2 for low voltage */ | |
150 | if (has_cpu_l2lve) { | |
151 | hid2 = mfspr(SPRN_HID2); | |
152 | hid2 |= 0x2000; | |
153 | mtspr(SPRN_HID2, hid2); | |
154 | } | |
155 | ||
156 | /* ramping down, set voltage last */ | |
157 | pmac_call_feature(PMAC_FTR_WRITE_GPIO, NULL, voltage_gpio, 0x04); | |
158 | local_delay(10); | |
159 | } | |
160 | ||
161 | return 0; | |
162 | } | |
163 | ||
164 | static unsigned int cpu_750fx_get_cpu_speed(void) | |
165 | { | |
166 | if (mfspr(SPRN_HID1) & HID1_PS) | |
167 | return low_freq; | |
168 | else | |
169 | return hi_freq; | |
170 | } | |
171 | ||
172 | /* Switch CPU speed using DFS */ | |
173 | static int dfs_set_cpu_speed(int low_speed) | |
174 | { | |
175 | if (low_speed == 0) { | |
176 | /* ramping up, set voltage first */ | |
177 | pmac_call_feature(PMAC_FTR_WRITE_GPIO, NULL, voltage_gpio, 0x05); | |
178 | /* Make sure we sleep for at least 1ms */ | |
179 | local_delay(1); | |
180 | } | |
181 | ||
182 | /* set frequency */ | |
183 | #ifdef CONFIG_6xx | |
184 | low_choose_7447a_dfs(low_speed); | |
185 | #endif | |
186 | udelay(100); | |
187 | ||
188 | if (low_speed == 1) { | |
189 | /* ramping down, set voltage last */ | |
190 | pmac_call_feature(PMAC_FTR_WRITE_GPIO, NULL, voltage_gpio, 0x04); | |
191 | local_delay(1); | |
192 | } | |
193 | ||
194 | return 0; | |
195 | } | |
196 | ||
197 | static unsigned int dfs_get_cpu_speed(void) | |
198 | { | |
199 | if (mfspr(SPRN_HID1) & HID1_DFS) | |
200 | return low_freq; | |
201 | else | |
202 | return hi_freq; | |
203 | } | |
204 | ||
205 | ||
206 | /* Switch CPU speed using slewing GPIOs | |
207 | */ | |
208 | static int gpios_set_cpu_speed(int low_speed) | |
209 | { | |
210 | int gpio, timeout = 0; | |
211 | ||
212 | /* If ramping up, set voltage first */ | |
213 | if (low_speed == 0) { | |
214 | pmac_call_feature(PMAC_FTR_WRITE_GPIO, NULL, voltage_gpio, 0x05); | |
215 | /* Delay is way too big but it's ok, we schedule */ | |
216 | local_delay(10); | |
217 | } | |
218 | ||
219 | /* Set frequency */ | |
220 | gpio = pmac_call_feature(PMAC_FTR_READ_GPIO, NULL, frequency_gpio, 0); | |
221 | if (low_speed == ((gpio & 0x01) == 0)) | |
222 | goto skip; | |
223 | ||
224 | pmac_call_feature(PMAC_FTR_WRITE_GPIO, NULL, frequency_gpio, | |
225 | low_speed ? 0x04 : 0x05); | |
226 | udelay(200); | |
227 | do { | |
228 | if (++timeout > 100) | |
229 | break; | |
230 | local_delay(1); | |
231 | gpio = pmac_call_feature(PMAC_FTR_READ_GPIO, NULL, slew_done_gpio, 0); | |
232 | } while((gpio & 0x02) == 0); | |
233 | skip: | |
234 | /* If ramping down, set voltage last */ | |
235 | if (low_speed == 1) { | |
236 | pmac_call_feature(PMAC_FTR_WRITE_GPIO, NULL, voltage_gpio, 0x04); | |
237 | /* Delay is way too big but it's ok, we schedule */ | |
238 | local_delay(10); | |
239 | } | |
240 | ||
241 | #ifdef DEBUG_FREQ | |
242 | debug_calc_bogomips(); | |
243 | #endif | |
244 | ||
245 | return 0; | |
246 | } | |
247 | ||
248 | /* Switch CPU speed under PMU control | |
249 | */ | |
250 | static int pmu_set_cpu_speed(int low_speed) | |
251 | { | |
252 | struct adb_request req; | |
253 | unsigned long save_l2cr; | |
254 | unsigned long save_l3cr; | |
255 | unsigned int pic_prio; | |
256 | unsigned long flags; | |
257 | ||
258 | preempt_disable(); | |
259 | ||
260 | #ifdef DEBUG_FREQ | |
261 | printk(KERN_DEBUG "HID1, before: %x\n", mfspr(SPRN_HID1)); | |
262 | #endif | |
263 | pmu_suspend(); | |
264 | ||
265 | /* Disable all interrupt sources on openpic */ | |
266 | pic_prio = mpic_cpu_get_priority(); | |
267 | mpic_cpu_set_priority(0xf); | |
268 | ||
269 | /* Make sure the decrementer won't interrupt us */ | |
270 | asm volatile("mtdec %0" : : "r" (0x7fffffff)); | |
271 | /* Make sure any pending DEC interrupt occuring while we did | |
272 | * the above didn't re-enable the DEC */ | |
273 | mb(); | |
274 | asm volatile("mtdec %0" : : "r" (0x7fffffff)); | |
275 | ||
276 | /* We can now disable MSR_EE */ | |
277 | local_irq_save(flags); | |
278 | ||
279 | /* Giveup the FPU & vec */ | |
280 | enable_kernel_fp(); | |
281 | ||
282 | #ifdef CONFIG_ALTIVEC | |
283 | if (cpu_has_feature(CPU_FTR_ALTIVEC)) | |
284 | enable_kernel_altivec(); | |
285 | #endif /* CONFIG_ALTIVEC */ | |
286 | ||
287 | /* Save & disable L2 and L3 caches */ | |
288 | save_l3cr = _get_L3CR(); /* (returns -1 if not available) */ | |
289 | save_l2cr = _get_L2CR(); /* (returns -1 if not available) */ | |
290 | ||
291 | /* Send the new speed command. My assumption is that this command | |
292 | * will cause PLL_CFG[0..3] to be changed next time CPU goes to sleep | |
293 | */ | |
294 | pmu_request(&req, NULL, 6, PMU_CPU_SPEED, 'W', 'O', 'O', 'F', low_speed); | |
295 | while (!req.complete) | |
296 | pmu_poll(); | |
297 | ||
298 | /* Prepare the northbridge for the speed transition */ | |
299 | pmac_call_feature(PMAC_FTR_SLEEP_STATE,NULL,1,1); | |
300 | ||
301 | /* Call low level code to backup CPU state and recover from | |
302 | * hardware reset | |
303 | */ | |
304 | low_sleep_handler(); | |
305 | ||
306 | /* Restore the northbridge */ | |
307 | pmac_call_feature(PMAC_FTR_SLEEP_STATE,NULL,1,0); | |
308 | ||
309 | /* Restore L2 cache */ | |
310 | if (save_l2cr != 0xffffffff && (save_l2cr & L2CR_L2E) != 0) | |
311 | _set_L2CR(save_l2cr); | |
312 | /* Restore L3 cache */ | |
313 | if (save_l3cr != 0xffffffff && (save_l3cr & L3CR_L3E) != 0) | |
314 | _set_L3CR(save_l3cr); | |
315 | ||
316 | /* Restore userland MMU context */ | |
6218a761 | 317 | set_context(current->active_mm->context.id, current->active_mm->pgd); |
14cf11af PM |
318 | |
319 | #ifdef DEBUG_FREQ | |
320 | printk(KERN_DEBUG "HID1, after: %x\n", mfspr(SPRN_HID1)); | |
321 | #endif | |
322 | ||
323 | /* Restore low level PMU operations */ | |
324 | pmu_unlock(); | |
325 | ||
326 | /* Restore decrementer */ | |
327 | wakeup_decrementer(); | |
328 | ||
329 | /* Restore interrupts */ | |
330 | mpic_cpu_set_priority(pic_prio); | |
331 | ||
332 | /* Let interrupts flow again ... */ | |
333 | local_irq_restore(flags); | |
334 | ||
335 | #ifdef DEBUG_FREQ | |
336 | debug_calc_bogomips(); | |
337 | #endif | |
338 | ||
339 | pmu_resume(); | |
340 | ||
341 | preempt_enable(); | |
342 | ||
343 | return 0; | |
344 | } | |
345 | ||
346 | static int do_set_cpu_speed(int speed_mode, int notify) | |
347 | { | |
348 | struct cpufreq_freqs freqs; | |
349 | unsigned long l3cr; | |
350 | static unsigned long prev_l3cr; | |
351 | ||
352 | freqs.old = cur_freq; | |
353 | freqs.new = (speed_mode == CPUFREQ_HIGH) ? hi_freq : low_freq; | |
354 | freqs.cpu = smp_processor_id(); | |
355 | ||
356 | if (freqs.old == freqs.new) | |
357 | return 0; | |
358 | ||
359 | if (notify) | |
360 | cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE); | |
361 | if (speed_mode == CPUFREQ_LOW && | |
362 | cpu_has_feature(CPU_FTR_L3CR)) { | |
363 | l3cr = _get_L3CR(); | |
364 | if (l3cr & L3CR_L3E) { | |
365 | prev_l3cr = l3cr; | |
366 | _set_L3CR(0); | |
367 | } | |
368 | } | |
369 | set_speed_proc(speed_mode == CPUFREQ_LOW); | |
370 | if (speed_mode == CPUFREQ_HIGH && | |
371 | cpu_has_feature(CPU_FTR_L3CR)) { | |
372 | l3cr = _get_L3CR(); | |
373 | if ((prev_l3cr & L3CR_L3E) && l3cr != prev_l3cr) | |
374 | _set_L3CR(prev_l3cr); | |
375 | } | |
376 | if (notify) | |
377 | cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE); | |
378 | cur_freq = (speed_mode == CPUFREQ_HIGH) ? hi_freq : low_freq; | |
379 | ||
380 | return 0; | |
381 | } | |
382 | ||
383 | static unsigned int pmac_cpufreq_get_speed(unsigned int cpu) | |
384 | { | |
385 | return cur_freq; | |
386 | } | |
387 | ||
388 | static int pmac_cpufreq_verify(struct cpufreq_policy *policy) | |
389 | { | |
390 | return cpufreq_frequency_table_verify(policy, pmac_cpu_freqs); | |
391 | } | |
392 | ||
393 | static int pmac_cpufreq_target( struct cpufreq_policy *policy, | |
394 | unsigned int target_freq, | |
395 | unsigned int relation) | |
396 | { | |
397 | unsigned int newstate = 0; | |
4350147a | 398 | int rc; |
14cf11af PM |
399 | |
400 | if (cpufreq_frequency_table_target(policy, pmac_cpu_freqs, | |
401 | target_freq, relation, &newstate)) | |
402 | return -EINVAL; | |
403 | ||
4350147a | 404 | rc = do_set_cpu_speed(newstate, 1); |
14cf11af | 405 | |
4350147a BH |
406 | ppc_proc_freq = cur_freq * 1000ul; |
407 | return rc; | |
14cf11af PM |
408 | } |
409 | ||
410 | static int pmac_cpufreq_cpu_init(struct cpufreq_policy *policy) | |
411 | { | |
412 | if (policy->cpu != 0) | |
413 | return -ENODEV; | |
414 | ||
415 | policy->governor = CPUFREQ_DEFAULT_GOVERNOR; | |
416 | policy->cpuinfo.transition_latency = CPUFREQ_ETERNAL; | |
417 | policy->cur = cur_freq; | |
418 | ||
419 | cpufreq_frequency_table_get_attr(pmac_cpu_freqs, policy->cpu); | |
420 | return cpufreq_frequency_table_cpuinfo(policy, pmac_cpu_freqs); | |
421 | } | |
422 | ||
423 | static u32 read_gpio(struct device_node *np) | |
424 | { | |
425 | u32 *reg = (u32 *)get_property(np, "reg", NULL); | |
426 | u32 offset; | |
427 | ||
428 | if (reg == NULL) | |
429 | return 0; | |
430 | /* That works for all keylargos but shall be fixed properly | |
431 | * some day... The problem is that it seems we can't rely | |
432 | * on the "reg" property of the GPIO nodes, they are either | |
433 | * relative to the base of KeyLargo or to the base of the | |
434 | * GPIO space, and the device-tree doesn't help. | |
435 | */ | |
436 | offset = *reg; | |
437 | if (offset < KEYLARGO_GPIO_LEVELS0) | |
438 | offset += KEYLARGO_GPIO_LEVELS0; | |
439 | return offset; | |
440 | } | |
441 | ||
442 | static int pmac_cpufreq_suspend(struct cpufreq_policy *policy, pm_message_t pmsg) | |
443 | { | |
444 | /* Ok, this could be made a bit smarter, but let's be robust for now. We | |
445 | * always force a speed change to high speed before sleep, to make sure | |
446 | * we have appropriate voltage and/or bus speed for the wakeup process, | |
447 | * and to make sure our loops_per_jiffies are "good enough", that is will | |
448 | * not cause too short delays if we sleep in low speed and wake in high | |
449 | * speed.. | |
450 | */ | |
451 | no_schedule = 1; | |
452 | sleep_freq = cur_freq; | |
453 | if (cur_freq == low_freq && !is_pmu_based) | |
454 | do_set_cpu_speed(CPUFREQ_HIGH, 0); | |
455 | return 0; | |
456 | } | |
457 | ||
458 | static int pmac_cpufreq_resume(struct cpufreq_policy *policy) | |
459 | { | |
460 | /* If we resume, first check if we have a get() function */ | |
461 | if (get_speed_proc) | |
462 | cur_freq = get_speed_proc(); | |
22358ea8 | 463 | else |
14cf11af PM |
464 | cur_freq = 0; |
465 | ||
466 | /* We don't, hrm... we don't really know our speed here, best | |
467 | * is that we force a switch to whatever it was, which is | |
468 | * probably high speed due to our suspend() routine | |
469 | */ | |
470 | do_set_cpu_speed(sleep_freq == low_freq ? | |
471 | CPUFREQ_LOW : CPUFREQ_HIGH, 0); | |
472 | ||
4350147a BH |
473 | ppc_proc_freq = cur_freq * 1000ul; |
474 | ||
14cf11af PM |
475 | no_schedule = 0; |
476 | return 0; | |
477 | } | |
478 | ||
479 | static struct cpufreq_driver pmac_cpufreq_driver = { | |
480 | .verify = pmac_cpufreq_verify, | |
481 | .target = pmac_cpufreq_target, | |
482 | .get = pmac_cpufreq_get_speed, | |
483 | .init = pmac_cpufreq_cpu_init, | |
484 | .suspend = pmac_cpufreq_suspend, | |
485 | .resume = pmac_cpufreq_resume, | |
486 | .flags = CPUFREQ_PM_NO_WARN, | |
487 | .attr = pmac_cpu_freqs_attr, | |
488 | .name = "powermac", | |
489 | .owner = THIS_MODULE, | |
490 | }; | |
491 | ||
492 | ||
493 | static int pmac_cpufreq_init_MacRISC3(struct device_node *cpunode) | |
494 | { | |
495 | struct device_node *volt_gpio_np = of_find_node_by_name(NULL, | |
496 | "voltage-gpio"); | |
497 | struct device_node *freq_gpio_np = of_find_node_by_name(NULL, | |
498 | "frequency-gpio"); | |
499 | struct device_node *slew_done_gpio_np = of_find_node_by_name(NULL, | |
500 | "slewing-done"); | |
501 | u32 *value; | |
502 | ||
503 | /* | |
504 | * Check to see if it's GPIO driven or PMU only | |
505 | * | |
506 | * The way we extract the GPIO address is slightly hackish, but it | |
507 | * works well enough for now. We need to abstract the whole GPIO | |
508 | * stuff sooner or later anyway | |
509 | */ | |
510 | ||
511 | if (volt_gpio_np) | |
512 | voltage_gpio = read_gpio(volt_gpio_np); | |
513 | if (freq_gpio_np) | |
514 | frequency_gpio = read_gpio(freq_gpio_np); | |
515 | if (slew_done_gpio_np) | |
516 | slew_done_gpio = read_gpio(slew_done_gpio_np); | |
517 | ||
518 | /* If we use the frequency GPIOs, calculate the min/max speeds based | |
519 | * on the bus frequencies | |
520 | */ | |
521 | if (frequency_gpio && slew_done_gpio) { | |
522 | int lenp, rc; | |
523 | u32 *freqs, *ratio; | |
524 | ||
525 | freqs = (u32 *)get_property(cpunode, "bus-frequencies", &lenp); | |
526 | lenp /= sizeof(u32); | |
527 | if (freqs == NULL || lenp != 2) { | |
528 | printk(KERN_ERR "cpufreq: bus-frequencies incorrect or missing\n"); | |
529 | return 1; | |
530 | } | |
531 | ratio = (u32 *)get_property(cpunode, "processor-to-bus-ratio*2", NULL); | |
532 | if (ratio == NULL) { | |
533 | printk(KERN_ERR "cpufreq: processor-to-bus-ratio*2 missing\n"); | |
534 | return 1; | |
535 | } | |
536 | ||
537 | /* Get the min/max bus frequencies */ | |
538 | low_freq = min(freqs[0], freqs[1]); | |
539 | hi_freq = max(freqs[0], freqs[1]); | |
540 | ||
541 | /* Grrrr.. It _seems_ that the device-tree is lying on the low bus | |
542 | * frequency, it claims it to be around 84Mhz on some models while | |
543 | * it appears to be approx. 101Mhz on all. Let's hack around here... | |
544 | * fortunately, we don't need to be too precise | |
545 | */ | |
546 | if (low_freq < 98000000) | |
547 | low_freq = 101000000; | |
4350147a | 548 | |
14cf11af PM |
549 | /* Convert those to CPU core clocks */ |
550 | low_freq = (low_freq * (*ratio)) / 2000; | |
551 | hi_freq = (hi_freq * (*ratio)) / 2000; | |
552 | ||
553 | /* Now we get the frequencies, we read the GPIO to see what is out current | |
554 | * speed | |
555 | */ | |
556 | rc = pmac_call_feature(PMAC_FTR_READ_GPIO, NULL, frequency_gpio, 0); | |
557 | cur_freq = (rc & 0x01) ? hi_freq : low_freq; | |
558 | ||
559 | set_speed_proc = gpios_set_cpu_speed; | |
560 | return 1; | |
561 | } | |
562 | ||
563 | /* If we use the PMU, look for the min & max frequencies in the | |
564 | * device-tree | |
565 | */ | |
566 | value = (u32 *)get_property(cpunode, "min-clock-frequency", NULL); | |
567 | if (!value) | |
568 | return 1; | |
569 | low_freq = (*value) / 1000; | |
570 | /* The PowerBook G4 12" (PowerBook6,1) has an error in the device-tree | |
571 | * here */ | |
572 | if (low_freq < 100000) | |
573 | low_freq *= 10; | |
574 | ||
575 | value = (u32 *)get_property(cpunode, "max-clock-frequency", NULL); | |
576 | if (!value) | |
577 | return 1; | |
578 | hi_freq = (*value) / 1000; | |
579 | set_speed_proc = pmu_set_cpu_speed; | |
580 | is_pmu_based = 1; | |
581 | ||
582 | return 0; | |
583 | } | |
584 | ||
585 | static int pmac_cpufreq_init_7447A(struct device_node *cpunode) | |
586 | { | |
587 | struct device_node *volt_gpio_np; | |
588 | ||
589 | if (get_property(cpunode, "dynamic-power-step", NULL) == NULL) | |
590 | return 1; | |
591 | ||
592 | volt_gpio_np = of_find_node_by_name(NULL, "cpu-vcore-select"); | |
593 | if (volt_gpio_np) | |
594 | voltage_gpio = read_gpio(volt_gpio_np); | |
595 | if (!voltage_gpio){ | |
596 | printk(KERN_ERR "cpufreq: missing cpu-vcore-select gpio\n"); | |
597 | return 1; | |
598 | } | |
599 | ||
600 | /* OF only reports the high frequency */ | |
601 | hi_freq = cur_freq; | |
602 | low_freq = cur_freq/2; | |
603 | ||
604 | /* Read actual frequency from CPU */ | |
605 | cur_freq = dfs_get_cpu_speed(); | |
606 | set_speed_proc = dfs_set_cpu_speed; | |
607 | get_speed_proc = dfs_get_cpu_speed; | |
608 | ||
609 | return 0; | |
610 | } | |
611 | ||
612 | static int pmac_cpufreq_init_750FX(struct device_node *cpunode) | |
613 | { | |
614 | struct device_node *volt_gpio_np; | |
615 | u32 pvr, *value; | |
616 | ||
617 | if (get_property(cpunode, "dynamic-power-step", NULL) == NULL) | |
618 | return 1; | |
619 | ||
620 | hi_freq = cur_freq; | |
621 | value = (u32 *)get_property(cpunode, "reduced-clock-frequency", NULL); | |
622 | if (!value) | |
623 | return 1; | |
624 | low_freq = (*value) / 1000; | |
625 | ||
626 | volt_gpio_np = of_find_node_by_name(NULL, "cpu-vcore-select"); | |
627 | if (volt_gpio_np) | |
628 | voltage_gpio = read_gpio(volt_gpio_np); | |
629 | ||
630 | pvr = mfspr(SPRN_PVR); | |
631 | has_cpu_l2lve = !((pvr & 0xf00) == 0x100); | |
632 | ||
633 | set_speed_proc = cpu_750fx_cpu_speed; | |
634 | get_speed_proc = cpu_750fx_get_cpu_speed; | |
635 | cur_freq = cpu_750fx_get_cpu_speed(); | |
636 | ||
637 | return 0; | |
638 | } | |
639 | ||
640 | /* Currently, we support the following machines: | |
641 | * | |
642 | * - Titanium PowerBook 1Ghz (PMU based, 667Mhz & 1Ghz) | |
643 | * - Titanium PowerBook 800 (PMU based, 667Mhz & 800Mhz) | |
644 | * - Titanium PowerBook 400 (PMU based, 300Mhz & 400Mhz) | |
645 | * - Titanium PowerBook 500 (PMU based, 300Mhz & 500Mhz) | |
646 | * - iBook2 500/600 (PMU based, 400Mhz & 500/600Mhz) | |
647 | * - iBook2 700 (CPU based, 400Mhz & 700Mhz, support low voltage) | |
648 | * - Recent MacRISC3 laptops | |
649 | * - All new machines with 7447A CPUs | |
650 | */ | |
651 | static int __init pmac_cpufreq_setup(void) | |
652 | { | |
653 | struct device_node *cpunode; | |
654 | u32 *value; | |
655 | ||
656 | if (strstr(cmd_line, "nocpufreq")) | |
657 | return 0; | |
658 | ||
659 | /* Assume only one CPU */ | |
660 | cpunode = find_type_devices("cpu"); | |
661 | if (!cpunode) | |
662 | goto out; | |
663 | ||
664 | /* Get current cpu clock freq */ | |
665 | value = (u32 *)get_property(cpunode, "clock-frequency", NULL); | |
666 | if (!value) | |
667 | goto out; | |
668 | cur_freq = (*value) / 1000; | |
669 | ||
670 | /* Check for 7447A based MacRISC3 */ | |
671 | if (machine_is_compatible("MacRISC3") && | |
672 | get_property(cpunode, "dynamic-power-step", NULL) && | |
673 | PVR_VER(mfspr(SPRN_PVR)) == 0x8003) { | |
674 | pmac_cpufreq_init_7447A(cpunode); | |
675 | /* Check for other MacRISC3 machines */ | |
676 | } else if (machine_is_compatible("PowerBook3,4") || | |
677 | machine_is_compatible("PowerBook3,5") || | |
678 | machine_is_compatible("MacRISC3")) { | |
679 | pmac_cpufreq_init_MacRISC3(cpunode); | |
680 | /* Else check for iBook2 500/600 */ | |
681 | } else if (machine_is_compatible("PowerBook4,1")) { | |
682 | hi_freq = cur_freq; | |
683 | low_freq = 400000; | |
684 | set_speed_proc = pmu_set_cpu_speed; | |
685 | is_pmu_based = 1; | |
686 | } | |
5629d41d PM |
687 | /* Else check for TiPb 550 */ |
688 | else if (machine_is_compatible("PowerBook3,3") && cur_freq == 550000) { | |
689 | hi_freq = cur_freq; | |
690 | low_freq = 500000; | |
691 | set_speed_proc = pmu_set_cpu_speed; | |
692 | is_pmu_based = 1; | |
693 | } | |
14cf11af PM |
694 | /* Else check for TiPb 400 & 500 */ |
695 | else if (machine_is_compatible("PowerBook3,2")) { | |
696 | /* We only know about the 400 MHz and the 500Mhz model | |
697 | * they both have 300 MHz as low frequency | |
698 | */ | |
699 | if (cur_freq < 350000 || cur_freq > 550000) | |
700 | goto out; | |
701 | hi_freq = cur_freq; | |
702 | low_freq = 300000; | |
703 | set_speed_proc = pmu_set_cpu_speed; | |
704 | is_pmu_based = 1; | |
705 | } | |
706 | /* Else check for 750FX */ | |
707 | else if (PVR_VER(mfspr(SPRN_PVR)) == 0x7000) | |
708 | pmac_cpufreq_init_750FX(cpunode); | |
709 | out: | |
710 | if (set_speed_proc == NULL) | |
711 | return -ENODEV; | |
712 | ||
713 | pmac_cpu_freqs[CPUFREQ_LOW].frequency = low_freq; | |
714 | pmac_cpu_freqs[CPUFREQ_HIGH].frequency = hi_freq; | |
4350147a | 715 | ppc_proc_freq = cur_freq * 1000ul; |
14cf11af PM |
716 | |
717 | printk(KERN_INFO "Registering PowerMac CPU frequency driver\n"); | |
718 | printk(KERN_INFO "Low: %d Mhz, High: %d Mhz, Boot: %d Mhz\n", | |
719 | low_freq/1000, hi_freq/1000, cur_freq/1000); | |
720 | ||
721 | return cpufreq_register_driver(&pmac_cpufreq_driver); | |
722 | } | |
723 | ||
724 | module_init(pmac_cpufreq_setup); | |
725 |