[GitHub/mt8127/android_kernel_alcatel_ttab.git] / arch / powerpc / platforms / 83xx / suspend.c

/*
 * MPC83xx suspend support
 *
 * Author: Scott Wood <scottwood@freescale.com>
 *
 * Copyright (c) 2006-2007 Freescale Semiconductor, Inc.
 *
 * This program is free software; you can redistribute it and/or modify it
 * under the terms of the GNU General Public License version 2 as published
 * by the Free Software Foundation.
 */

#include <linux/init.h>
#include <linux/pm.h>
#include <linux/types.h>
#include <linux/ioport.h>
#include <linux/interrupt.h>
#include <linux/wait.h>
#include <linux/kthread.h>
#include <linux/freezer.h>
#include <linux/suspend.h>
#include <linux/fsl_devices.h>
#include <linux/of_platform.h>

#include <asm/reg.h>
#include <asm/io.h>
#include <asm/time.h>
#include <asm/mpc6xx.h>

#include <sysdev/fsl_soc.h>

#define PMCCR1_NEXT_STATE       0x0C /* Next state for power management */
#define PMCCR1_NEXT_STATE_SHIFT 2
#define PMCCR1_CURR_STATE       0x03 /* Current state for power management*/
#define IMMR_SYSCR_OFFSET       0x100
#define IMMR_RCW_OFFSET         0x900
#define RCW_PCI_HOST            0x80000000

void mpc83xx_enter_deep_sleep(phys_addr_t immrbase);

struct mpc83xx_pmc {
	u32 config;
#define PMCCR_DLPEN 2 /* DDR SDRAM low power enable */
#define PMCCR_SLPEN 1 /* System low power enable */

	u32 event;
	u32 mask;
/* All but PMCI are deep-sleep only */
#define PMCER_GPIO   0x100
#define PMCER_PCI    0x080
#define PMCER_USB    0x040
#define PMCER_ETSEC1 0x020
#define PMCER_ETSEC2 0x010
#define PMCER_TIMER  0x008
#define PMCER_INT1   0x004
#define PMCER_INT2   0x002
#define PMCER_PMCI   0x001
#define PMCER_ALL    0x1FF

	/* deep-sleep only */
	u32 config1;
#define PMCCR1_USE_STATE  0x80000000
#define PMCCR1_PME_EN     0x00000080
#define PMCCR1_ASSERT_PME 0x00000040
#define PMCCR1_POWER_OFF  0x00000020

	/* deep-sleep only */
	u32 config2;
};

struct mpc83xx_rcw {
	u32 rcwlr;
	u32 rcwhr;
};

struct mpc83xx_clock {
	u32 spmr;
	u32 occr;
	u32 sccr;
};

struct mpc83xx_syscr {
	__be32 sgprl;
	__be32 sgprh;
	__be32 spridr;
	__be32 :32;
	__be32 spcr;
	__be32 sicrl;
	__be32 sicrh;
};

struct mpc83xx_saved {
	u32 sicrl;
	u32 sicrh;
	u32 sccr;
};

struct pmc_type {
	int has_deep_sleep;
};

static struct platform_device *pmc_dev;
static int has_deep_sleep, deep_sleeping;
static int pmc_irq;
static struct mpc83xx_pmc __iomem *pmc_regs;
static struct mpc83xx_clock __iomem *clock_regs;
static struct mpc83xx_syscr __iomem *syscr_regs;
static struct mpc83xx_saved saved_regs;
static int is_pci_agent, wake_from_pci;
static phys_addr_t immrbase;
static int pci_pm_state;
static DECLARE_WAIT_QUEUE_HEAD(agent_wq);

int fsl_deep_sleep(void)
{
	return deep_sleeping;
}
EXPORT_SYMBOL(fsl_deep_sleep);

static int mpc83xx_change_state(void)
{
	u32 curr_state;
	u32 reg_cfg1 = in_be32(&pmc_regs->config1);

	if (is_pci_agent) {
		pci_pm_state = (reg_cfg1 & PMCCR1_NEXT_STATE) >>
		               PMCCR1_NEXT_STATE_SHIFT;
		curr_state = reg_cfg1 & PMCCR1_CURR_STATE;

		if (curr_state != pci_pm_state) {
			reg_cfg1 &= ~PMCCR1_CURR_STATE;
			reg_cfg1 |= pci_pm_state;
			out_be32(&pmc_regs->config1, reg_cfg1);

			wake_up(&agent_wq);
			return 1;
		}
	}

	return 0;
}

static irqreturn_t pmc_irq_handler(int irq, void *dev_id)
{
	u32 event = in_be32(&pmc_regs->event);
	int ret = IRQ_NONE;

	if (mpc83xx_change_state())
		ret = IRQ_HANDLED;

	if (event) {
		out_be32(&pmc_regs->event, event);
		ret = IRQ_HANDLED;
	}

	return ret;
}

static void mpc83xx_suspend_restore_regs(void)
{
	out_be32(&syscr_regs->sicrl, saved_regs.sicrl);
	out_be32(&syscr_regs->sicrh, saved_regs.sicrh);
	out_be32(&clock_regs->sccr, saved_regs.sccr);
}

static void mpc83xx_suspend_save_regs(void)
{
	saved_regs.sicrl = in_be32(&syscr_regs->sicrl);
	saved_regs.sicrh = in_be32(&syscr_regs->sicrh);
	saved_regs.sccr = in_be32(&clock_regs->sccr);
}

static int mpc83xx_suspend_enter(suspend_state_t state)
{
	int ret = -EAGAIN;

	/* Don't go to sleep if there's a race where pci_pm_state changes
	 * between the agent thread checking it and the PM code disabling
	 * interrupts.
	 */
	if (wake_from_pci) {
		if (pci_pm_state != (deep_sleeping ? 3 : 2))
			goto out;

		out_be32(&pmc_regs->config1,
		         in_be32(&pmc_regs->config1) | PMCCR1_PME_EN);
	}

	/* Put the system into low-power mode and the RAM
	 * into self-refresh mode once the core goes to
	 * sleep.
	 */

	out_be32(&pmc_regs->config, PMCCR_SLPEN | PMCCR_DLPEN);

	/* If it has deep sleep (i.e. it's an 831x or compatible),
	 * disable power to the core upon entering sleep mode.  This will
	 * require going through the boot firmware upon a wakeup event.
	 */

	if (deep_sleeping) {
		mpc83xx_suspend_save_regs();

		out_be32(&pmc_regs->mask, PMCER_ALL);

		out_be32(&pmc_regs->config1,
		         in_be32(&pmc_regs->config1) | PMCCR1_POWER_OFF);

		enable_kernel_fp();

		mpc83xx_enter_deep_sleep(immrbase);

		out_be32(&pmc_regs->config1,
		         in_be32(&pmc_regs->config1) & ~PMCCR1_POWER_OFF);

		out_be32(&pmc_regs->mask, PMCER_PMCI);

		mpc83xx_suspend_restore_regs();
	} else {
		out_be32(&pmc_regs->mask, PMCER_PMCI);

		mpc6xx_enter_standby();
	}

	ret = 0;

out:
	out_be32(&pmc_regs->config1,
	         in_be32(&pmc_regs->config1) & ~PMCCR1_PME_EN);

	return ret;
}

static void mpc83xx_suspend_end(void)
{
	deep_sleeping = 0;
}

static int mpc83xx_suspend_valid(suspend_state_t state)
{
	return state == PM_SUSPEND_STANDBY || state == PM_SUSPEND_MEM;
}

static int mpc83xx_suspend_begin(suspend_state_t state)
{
	switch (state) {
		case PM_SUSPEND_STANDBY:
			deep_sleeping = 0;
			return 0;

		case PM_SUSPEND_MEM:
			if (has_deep_sleep)
				deep_sleeping = 1;

			return 0;

		default:
			return -EINVAL;
	}
}

static int agent_thread_fn(void *data)
{
	while (1) {
		wait_event_interruptible(agent_wq, pci_pm_state >= 2);
		try_to_freeze();

		if (signal_pending(current) || pci_pm_state < 2)
			continue;

		/* With a preemptible kernel (or SMP), this could race with
		 * a userspace-driven suspend request.  It's probably best
		 * to avoid mixing the two with such a configuration (or
		 * else fix it by adding a mutex to state_store that we can
		 * synchronize with).
		 */

		wake_from_pci = 1;

		pm_suspend(pci_pm_state == 3 ? PM_SUSPEND_MEM :
		                               PM_SUSPEND_STANDBY);

		wake_from_pci = 0;
	}

	return 0;
}

static void mpc83xx_set_agent(void)
{
	out_be32(&pmc_regs->config1, PMCCR1_USE_STATE);
	out_be32(&pmc_regs->mask, PMCER_PMCI);

	kthread_run(agent_thread_fn, NULL, "PCI power mgt");
}

static int mpc83xx_is_pci_agent(void)
{
	struct mpc83xx_rcw __iomem *rcw_regs;
	int ret;

	rcw_regs = ioremap(get_immrbase() + IMMR_RCW_OFFSET,
	                   sizeof(struct mpc83xx_rcw));

	if (!rcw_regs)
		return -ENOMEM;

	ret = !(in_be32(&rcw_regs->rcwhr) & RCW_PCI_HOST);

	iounmap(rcw_regs);
	return ret;
}

static const struct platform_suspend_ops mpc83xx_suspend_ops = {
	.valid = mpc83xx_suspend_valid,
	.begin = mpc83xx_suspend_begin,
	.enter = mpc83xx_suspend_enter,
	.end = mpc83xx_suspend_end,
};

static struct of_device_id pmc_match[];
static int pmc_probe(struct platform_device *ofdev)
{
	const struct of_device_id *match;
	struct device_node *np = ofdev->dev.of_node;
	struct resource res;
	struct pmc_type *type;
	int ret = 0;

	match = of_match_device(pmc_match, &ofdev->dev);
	if (!match)
		return -EINVAL;

	type = match->data;

	if (!of_device_is_available(np))
		return -ENODEV;

	has_deep_sleep = type->has_deep_sleep;
	immrbase = get_immrbase();
	pmc_dev = ofdev;

	is_pci_agent = mpc83xx_is_pci_agent();
	if (is_pci_agent < 0)
		return is_pci_agent;

	ret = of_address_to_resource(np, 0, &res);
	if (ret)
		return -ENODEV;

	pmc_irq = irq_of_parse_and_map(np, 0);
	if (pmc_irq != NO_IRQ) {
		ret = request_irq(pmc_irq, pmc_irq_handler, IRQF_SHARED,
		                  "pmc", ofdev);

		if (ret)
			return -EBUSY;
	}

	pmc_regs = ioremap(res.start, sizeof(struct mpc83xx_pmc));

	if (!pmc_regs) {
		ret = -ENOMEM;
		goto out;
	}

	ret = of_address_to_resource(np, 1, &res);
	if (ret) {
		ret = -ENODEV;
		goto out_pmc;
	}

	clock_regs = ioremap(res.start, sizeof(struct mpc83xx_pmc));

	if (!clock_regs) {
		ret = -ENOMEM;
		goto out_pmc;
	}

	if (has_deep_sleep) {
		syscr_regs = ioremap(immrbase + IMMR_SYSCR_OFFSET,
				     sizeof(*syscr_regs));
		if (!syscr_regs) {
			ret = -ENOMEM;
			goto out_syscr;
		}
	}

	if (is_pci_agent)
		mpc83xx_set_agent();

	suspend_set_ops(&mpc83xx_suspend_ops);
	return 0;

out_syscr:
	iounmap(clock_regs);
out_pmc:
	iounmap(pmc_regs);
out:
	if (pmc_irq != NO_IRQ)
		free_irq(pmc_irq, ofdev);

	return ret;
}

static int pmc_remove(struct platform_device *ofdev)
{
	return -EPERM;
};

static struct pmc_type pmc_types[] = {
	{
		.has_deep_sleep = 1,
	},
	{
		.has_deep_sleep = 0,
	}
};

static struct of_device_id pmc_match[] = {
	{
		.compatible = "fsl,mpc8313-pmc",
		.data = &pmc_types[0],
	},
	{
		.compatible = "fsl,mpc8349-pmc",
		.data = &pmc_types[1],
	},
	{}
};

static struct platform_driver pmc_driver = {
	.driver = {
		.name = "mpc83xx-pmc",
		.owner = THIS_MODULE,
		.of_match_table = pmc_match,
	},
	.probe = pmc_probe,
	.remove = pmc_remove
};

static int pmc_init(void)
{
	return platform_driver_register(&pmc_driver);
}

module_init(pmc_init);
Commit	Line	Data
d49747bd SW	1	/*
	2	* MPC83xx suspend support
	3	*
	4	* Author: Scott Wood <scottwood@freescale.com>
	5	*
	6	* Copyright (c) 2006-2007 Freescale Semiconductor, Inc.
	7	*
	8	* This program is free software; you can redistribute it and/or modify it
	9	* under the terms of the GNU General Public License version 2 as published
	10	* by the Free Software Foundation.
	11	*/
	12
	13	#include <linux/init.h>
	14	#include <linux/pm.h>
	15	#include <linux/types.h>
	16	#include <linux/ioport.h>
	17	#include <linux/interrupt.h>
	18	#include <linux/wait.h>
	19	#include <linux/kthread.h>
	20	#include <linux/freezer.h>
	21	#include <linux/suspend.h>
	22	#include <linux/fsl_devices.h>
	23	#include <linux/of_platform.h>
	24
	25	#include <asm/reg.h>
	26	#include <asm/io.h>
	27	#include <asm/time.h>
	28	#include <asm/mpc6xx.h>
	29
	30	#include <sysdev/fsl_soc.h>
	31
	32	#define PMCCR1_NEXT_STATE 0x0C /* Next state for power management */
	33	#define PMCCR1_NEXT_STATE_SHIFT 2
	34	#define PMCCR1_CURR_STATE 0x03 /* Current state for power management*/
87faaabb	35	#define IMMR_SYSCR_OFFSET 0x100
d49747bd SW	36	#define IMMR_RCW_OFFSET 0x900
	37	#define RCW_PCI_HOST 0x80000000
	38
	39	void mpc83xx_enter_deep_sleep(phys_addr_t immrbase);
	40
	41	struct mpc83xx_pmc {
	42	u32 config;
	43	#define PMCCR_DLPEN 2 /* DDR SDRAM low power enable */
	44	#define PMCCR_SLPEN 1 /* System low power enable */
	45
	46	u32 event;
	47	u32 mask;
	48	/* All but PMCI are deep-sleep only */
	49	#define PMCER_GPIO 0x100
	50	#define PMCER_PCI 0x080
	51	#define PMCER_USB 0x040
	52	#define PMCER_ETSEC1 0x020
	53	#define PMCER_ETSEC2 0x010
	54	#define PMCER_TIMER 0x008
	55	#define PMCER_INT1 0x004
	56	#define PMCER_INT2 0x002
	57	#define PMCER_PMCI 0x001
	58	#define PMCER_ALL 0x1FF
	59
	60	/* deep-sleep only */
	61	u32 config1;
	62	#define PMCCR1_USE_STATE 0x80000000
	63	#define PMCCR1_PME_EN 0x00000080
	64	#define PMCCR1_ASSERT_PME 0x00000040
	65	#define PMCCR1_POWER_OFF 0x00000020
	66
	67	/* deep-sleep only */
	68	u32 config2;
	69	};
	70
	71	struct mpc83xx_rcw {
	72	u32 rcwlr;
	73	u32 rcwhr;
	74	};
	75
	76	struct mpc83xx_clock {
	77	u32 spmr;
	78	u32 occr;
	79	u32 sccr;
	80	};
	81
87faaabb AV	82	struct mpc83xx_syscr {
	83	__be32 sgprl;
	84	__be32 sgprh;
	85	__be32 spridr;
	86	__be32 :32;
	87	__be32 spcr;
	88	__be32 sicrl;
	89	__be32 sicrh;
	90	};
	91
	92	struct mpc83xx_saved {
	93	u32 sicrl;
	94	u32 sicrh;
	95	u32 sccr;
	96	};
	97
d49747bd SW	98	struct pmc_type {
	99	int has_deep_sleep;
	100	};
	101
a454dc50	102	static struct platform_device *pmc_dev;
d49747bd SW	103	static int has_deep_sleep, deep_sleeping;
	104	static int pmc_irq;
	105	static struct mpc83xx_pmc __iomem *pmc_regs;
	106	static struct mpc83xx_clock __iomem *clock_regs;
87faaabb AV	107	static struct mpc83xx_syscr __iomem *syscr_regs;
87faaabb AV	108	static struct mpc83xx_saved saved_regs;
d49747bd SW	109	static int is_pci_agent, wake_from_pci;
	110	static phys_addr_t immrbase;
	111	static int pci_pm_state;
	112	static DECLARE_WAIT_QUEUE_HEAD(agent_wq);
	113
	114	int fsl_deep_sleep(void)
	115	{
	116	return deep_sleeping;
	117	}
2e9d546e	118	EXPORT_SYMBOL(fsl_deep_sleep);
d49747bd SW	119
	120	static int mpc83xx_change_state(void)
	121	{
	122	u32 curr_state;
	123	u32 reg_cfg1 = in_be32(&pmc_regs->config1);
	124
	125	if (is_pci_agent) {
	126	pci_pm_state = (reg_cfg1 & PMCCR1_NEXT_STATE) >>
	127	PMCCR1_NEXT_STATE_SHIFT;
	128	curr_state = reg_cfg1 & PMCCR1_CURR_STATE;
	129
	130	if (curr_state != pci_pm_state) {
	131	reg_cfg1 &= ~PMCCR1_CURR_STATE;
	132	reg_cfg1 \|= pci_pm_state;
	133	out_be32(&pmc_regs->config1, reg_cfg1);
	134
	135	wake_up(&agent_wq);
	136	return 1;
	137	}
	138	}
	139
	140	return 0;
	141	}
	142
	143	static irqreturn_t pmc_irq_handler(int irq, void *dev_id)
	144	{
	145	u32 event = in_be32(&pmc_regs->event);
	146	int ret = IRQ_NONE;
	147
	148	if (mpc83xx_change_state())
	149	ret = IRQ_HANDLED;
	150
	151	if (event) {
	152	out_be32(&pmc_regs->event, event);
	153	ret = IRQ_HANDLED;
	154	}
	155
	156	return ret;
	157	}
	158
87faaabb AV	159	static void mpc83xx_suspend_restore_regs(void)
	160	{
	161	out_be32(&syscr_regs->sicrl, saved_regs.sicrl);
	162	out_be32(&syscr_regs->sicrh, saved_regs.sicrh);
	163	out_be32(&clock_regs->sccr, saved_regs.sccr);
	164	}
	165
	166	static void mpc83xx_suspend_save_regs(void)
	167	{
	168	saved_regs.sicrl = in_be32(&syscr_regs->sicrl);
	169	saved_regs.sicrh = in_be32(&syscr_regs->sicrh);
	170	saved_regs.sccr = in_be32(&clock_regs->sccr);
	171	}
	172
d49747bd SW	173	static int mpc83xx_suspend_enter(suspend_state_t state)
	174	{
	175	int ret = -EAGAIN;
	176
	177	/* Don't go to sleep if there's a race where pci_pm_state changes
	178	* between the agent thread checking it and the PM code disabling
	179	* interrupts.
	180	*/
	181	if (wake_from_pci) {
	182	if (pci_pm_state != (deep_sleeping ? 3 : 2))
	183	goto out;
	184
	185	out_be32(&pmc_regs->config1,
	186	in_be32(&pmc_regs->config1) \| PMCCR1_PME_EN);
	187	}
	188
	189	/* Put the system into low-power mode and the RAM
	190	* into self-refresh mode once the core goes to
	191	* sleep.
	192	*/
	193
	194	out_be32(&pmc_regs->config, PMCCR_SLPEN \| PMCCR_DLPEN);
	195
	196	/* If it has deep sleep (i.e. it's an 831x or compatible),
	197	* disable power to the core upon entering sleep mode. This will
	198	* require going through the boot firmware upon a wakeup event.
	199	*/
	200
	201	if (deep_sleeping) {
87faaabb AV	202	mpc83xx_suspend_save_regs();
87faaabb AV	203
d49747bd SW	204	out_be32(&pmc_regs->mask, PMCER_ALL);
	205
	206	out_be32(&pmc_regs->config1,
	207	in_be32(&pmc_regs->config1) \| PMCCR1_POWER_OFF);
	208
	209	enable_kernel_fp();
	210
	211	mpc83xx_enter_deep_sleep(immrbase);
	212
	213	out_be32(&pmc_regs->config1,
	214	in_be32(&pmc_regs->config1) & ~PMCCR1_POWER_OFF);
	215
	216	out_be32(&pmc_regs->mask, PMCER_PMCI);
87faaabb AV	217
87faaabb AV	218	mpc83xx_suspend_restore_regs();
d49747bd SW	219	} else {
	220	out_be32(&pmc_regs->mask, PMCER_PMCI);
	221
	222	mpc6xx_enter_standby();
	223	}
	224
	225	ret = 0;
	226
	227	out:
	228	out_be32(&pmc_regs->config1,
	229	in_be32(&pmc_regs->config1) & ~PMCCR1_PME_EN);
	230
	231	return ret;
	232	}
	233
f25c525c	234	static void mpc83xx_suspend_end(void)
d49747bd SW	235	{
	236	deep_sleeping = 0;
	237	}
	238
	239	static int mpc83xx_suspend_valid(suspend_state_t state)
	240	{
	241	return state == PM_SUSPEND_STANDBY \|\| state == PM_SUSPEND_MEM;
	242	}
	243
	244	static int mpc83xx_suspend_begin(suspend_state_t state)
	245	{
	246	switch (state) {
	247	case PM_SUSPEND_STANDBY:
	248	deep_sleeping = 0;
	249	return 0;
	250
	251	case PM_SUSPEND_MEM:
	252	if (has_deep_sleep)
	253	deep_sleeping = 1;
	254
	255	return 0;
	256
	257	default:
	258	return -EINVAL;
	259	}
	260	}
	261
	262	static int agent_thread_fn(void *data)
	263	{
	264	while (1) {
	265	wait_event_interruptible(agent_wq, pci_pm_state >= 2);
	266	try_to_freeze();
	267
	268	if (signal_pending(current) \|\| pci_pm_state < 2)
	269	continue;
	270
	271	/* With a preemptible kernel (or SMP), this could race with
	272	* a userspace-driven suspend request. It's probably best
	273	* to avoid mixing the two with such a configuration (or
	274	* else fix it by adding a mutex to state_store that we can
	275	* synchronize with).
	276	*/
	277
	278	wake_from_pci = 1;
	279
	280	pm_suspend(pci_pm_state == 3 ? PM_SUSPEND_MEM :
	281	PM_SUSPEND_STANDBY);
	282
	283	wake_from_pci = 0;
	284	}
	285
	286	return 0;
	287	}
	288
	289	static void mpc83xx_set_agent(void)
	290	{
	291	out_be32(&pmc_regs->config1, PMCCR1_USE_STATE);
	292	out_be32(&pmc_regs->mask, PMCER_PMCI);
	293
	294	kthread_run(agent_thread_fn, NULL, "PCI power mgt");
	295	}
	296
	297	static int mpc83xx_is_pci_agent(void)
	298	{
299	struct mpc83xx_rcw __iomem *rcw_regs;
300	int ret;
301
302	rcw_regs = ioremap(get_immrbase() + IMMR_RCW_OFFSET,
303	sizeof(struct mpc83xx_rcw));
304
305	if (!rcw_regs)
306	return -ENOMEM;
307
308	ret = !(in_be32(&rcw_regs->rcwhr) & RCW_PCI_HOST);
309
310	iounmap(rcw_regs);
311	return ret;
312	}
313
2f55ac07	314	static const struct platform_suspend_ops mpc83xx_suspend_ops = {
d49747bd SW	315	.valid = mpc83xx_suspend_valid,
	316	.begin = mpc83xx_suspend_begin,
	317	.enter = mpc83xx_suspend_enter,
f25c525c	318	.end = mpc83xx_suspend_end,
d49747bd SW	319	};
d49747bd SW	320
b1608d69	321	static struct of_device_id pmc_match[];
00006124	322	static int pmc_probe(struct platform_device *ofdev)
d49747bd	323	{
b1608d69	324	const struct of_device_id *match;
61c7a080	325	struct device_node *np = ofdev->dev.of_node;
d49747bd	326	struct resource res;
00006124	327	struct pmc_type *type;
d49747bd SW	328	int ret = 0;
d49747bd SW	329
b1608d69 GL	330	match = of_match_device(pmc_match, &ofdev->dev);
b1608d69 GL	331	if (!match)
00006124 GL	332	return -EINVAL;
00006124 GL	333
b1608d69	334	type = match->data;
00006124	335
d49747bd SW	336	if (!of_device_is_available(np))
	337	return -ENODEV;
	338
	339	has_deep_sleep = type->has_deep_sleep;
	340	immrbase = get_immrbase();
	341	pmc_dev = ofdev;
	342
	343	is_pci_agent = mpc83xx_is_pci_agent();
	344	if (is_pci_agent < 0)
	345	return is_pci_agent;
	346
	347	ret = of_address_to_resource(np, 0, &res);
	348	if (ret)
	349	return -ENODEV;
	350
	351	pmc_irq = irq_of_parse_and_map(np, 0);
	352	if (pmc_irq != NO_IRQ) {
	353	ret = request_irq(pmc_irq, pmc_irq_handler, IRQF_SHARED,
	354	"pmc", ofdev);
	355
	356	if (ret)
	357	return -EBUSY;
	358	}
	359
	360	pmc_regs = ioremap(res.start, sizeof(struct mpc83xx_pmc));
	361
	362	if (!pmc_regs) {
	363	ret = -ENOMEM;
	364	goto out;
	365	}
	366
	367	ret = of_address_to_resource(np, 1, &res);
	368	if (ret) {
	369	ret = -ENODEV;
	370	goto out_pmc;
	371	}
	372
	373	clock_regs = ioremap(res.start, sizeof(struct mpc83xx_pmc));
	374
	375	if (!clock_regs) {
	376	ret = -ENOMEM;
	377	goto out_pmc;
	378	}
	379
87faaabb AV	380	if (has_deep_sleep) {
	381	syscr_regs = ioremap(immrbase + IMMR_SYSCR_OFFSET,
	382	sizeof(*syscr_regs));
	383	if (!syscr_regs) {
	384	ret = -ENOMEM;
	385	goto out_syscr;
	386	}
	387	}
	388
d49747bd SW	389	if (is_pci_agent)
	390	mpc83xx_set_agent();
	391
	392	suspend_set_ops(&mpc83xx_suspend_ops);
	393	return 0;
	394
87faaabb AV	395	out_syscr:
87faaabb AV	396	iounmap(clock_regs);
d49747bd SW	397	out_pmc:
	398	iounmap(pmc_regs);
	399	out:
	400	if (pmc_irq != NO_IRQ)
	401	free_irq(pmc_irq, ofdev);
	402
	403	return ret;
	404	}
	405
a454dc50	406	static int pmc_remove(struct platform_device *ofdev)
d49747bd SW	407	{
	408	return -EPERM;
	409	};
	410
	411	static struct pmc_type pmc_types[] = {
	412	{
	413	.has_deep_sleep = 1,
	414	},
	415	{
	416	.has_deep_sleep = 0,
	417	}
	418	};
	419
	420	static struct of_device_id pmc_match[] = {
	421	{
	422	.compatible = "fsl,mpc8313-pmc",
	423	.data = &pmc_types[0],
	424	},
	425	{
	426	.compatible = "fsl,mpc8349-pmc",
	427	.data = &pmc_types[1],
	428	},
	429	{}
	430	};
	431
00006124	432	static struct platform_driver pmc_driver = {
4018294b GL	433	.driver = {
	434	.name = "mpc83xx-pmc",
	435	.owner = THIS_MODULE,
	436	.of_match_table = pmc_match,
	437	},
d49747bd SW	438	.probe = pmc_probe,
	439	.remove = pmc_remove
	440	};
	441
	442	static int pmc_init(void)
	443	{
00006124	444	return platform_driver_register(&pmc_driver);
d49747bd SW	445	}
	446
	447	module_init(pmc_init);