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75f74f0d HB |
1 | /* |
2 | * This program is free software; you can redistribute it and/or modify | |
3 | * it under the terms of the GNU General Public License, version 2, as | |
4 | * published by the Free Software Foundation. | |
5 | * | |
6 | * This program is distributed in the hope that it will be useful, | |
7 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
8 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
9 | * GNU General Public License for more details. | |
10 | * | |
11 | * You should have received a copy of the GNU General Public License | |
12 | * along with this program; if not, write to the Free Software | |
13 | * Foundation, 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. | |
14 | * | |
15 | * Copyright IBM Corp. 2008 | |
16 | * | |
17 | * Authors: Hollis Blanchard <hollisb@us.ibm.com> | |
18 | */ | |
19 | ||
20 | #include <asm/kvm_ppc.h> | |
21 | #include <asm/dcr.h> | |
22 | #include <asm/dcr-regs.h> | |
23 | #include <asm/disassemble.h> | |
fe4e771d | 24 | #include <asm/kvm_44x.h> |
73e75b41 | 25 | #include "timing.h" |
75f74f0d HB |
26 | |
27 | #include "booke.h" | |
28 | #include "44x_tlb.h" | |
29 | ||
ceb985f9 | 30 | #define XOP_MFDCRX 259 |
75f74f0d | 31 | #define XOP_MFDCR 323 |
e4dcfe88 | 32 | #define XOP_MTDCRX 387 |
75f74f0d HB |
33 | #define XOP_MTDCR 451 |
34 | #define XOP_TLBSX 914 | |
35 | #define XOP_ICCCI 966 | |
36 | #define XOP_TLBWE 978 | |
37 | ||
e4dcfe88 AG |
38 | static int emulate_mtdcr(struct kvm_vcpu *vcpu, int rs, int dcrn) |
39 | { | |
40 | /* emulate some access in kernel */ | |
41 | switch (dcrn) { | |
42 | case DCRN_CPR0_CONFIG_ADDR: | |
43 | vcpu->arch.cpr0_cfgaddr = kvmppc_get_gpr(vcpu, rs); | |
44 | return EMULATE_DONE; | |
45 | default: | |
46 | vcpu->run->dcr.dcrn = dcrn; | |
47 | vcpu->run->dcr.data = kvmppc_get_gpr(vcpu, rs); | |
48 | vcpu->run->dcr.is_write = 1; | |
e43a0287 | 49 | vcpu->arch.dcr_is_write = 1; |
e4dcfe88 AG |
50 | vcpu->arch.dcr_needed = 1; |
51 | kvmppc_account_exit(vcpu, DCR_EXITS); | |
52 | return EMULATE_DO_DCR; | |
53 | } | |
54 | } | |
55 | ||
ceb985f9 AG |
56 | static int emulate_mfdcr(struct kvm_vcpu *vcpu, int rt, int dcrn) |
57 | { | |
58 | /* The guest may access CPR0 registers to determine the timebase | |
59 | * frequency, and it must know the real host frequency because it | |
60 | * can directly access the timebase registers. | |
61 | * | |
62 | * It would be possible to emulate those accesses in userspace, | |
63 | * but userspace can really only figure out the end frequency. | |
64 | * We could decompose that into the factors that compute it, but | |
65 | * that's tricky math, and it's easier to just report the real | |
66 | * CPR0 values. | |
67 | */ | |
68 | switch (dcrn) { | |
69 | case DCRN_CPR0_CONFIG_ADDR: | |
70 | kvmppc_set_gpr(vcpu, rt, vcpu->arch.cpr0_cfgaddr); | |
71 | break; | |
72 | case DCRN_CPR0_CONFIG_DATA: | |
73 | local_irq_disable(); | |
74 | mtdcr(DCRN_CPR0_CONFIG_ADDR, | |
75 | vcpu->arch.cpr0_cfgaddr); | |
76 | kvmppc_set_gpr(vcpu, rt, | |
77 | mfdcr(DCRN_CPR0_CONFIG_DATA)); | |
78 | local_irq_enable(); | |
79 | break; | |
80 | default: | |
81 | vcpu->run->dcr.dcrn = dcrn; | |
82 | vcpu->run->dcr.data = 0; | |
83 | vcpu->run->dcr.is_write = 0; | |
e43a0287 | 84 | vcpu->arch.dcr_is_write = 0; |
ceb985f9 AG |
85 | vcpu->arch.io_gpr = rt; |
86 | vcpu->arch.dcr_needed = 1; | |
87 | kvmppc_account_exit(vcpu, DCR_EXITS); | |
88 | return EMULATE_DO_DCR; | |
89 | } | |
90 | ||
91 | return EMULATE_DONE; | |
92 | } | |
93 | ||
75f74f0d HB |
94 | int kvmppc_core_emulate_op(struct kvm_run *run, struct kvm_vcpu *vcpu, |
95 | unsigned int inst, int *advance) | |
96 | { | |
97 | int emulated = EMULATE_DONE; | |
c46dc9a8 AG |
98 | int dcrn = get_dcrn(inst); |
99 | int ra = get_ra(inst); | |
100 | int rb = get_rb(inst); | |
101 | int rc = get_rc(inst); | |
102 | int rs = get_rs(inst); | |
103 | int rt = get_rt(inst); | |
104 | int ws = get_ws(inst); | |
75f74f0d HB |
105 | |
106 | switch (get_op(inst)) { | |
75f74f0d HB |
107 | case 31: |
108 | switch (get_xop(inst)) { | |
109 | ||
75f74f0d | 110 | case XOP_MFDCR: |
ceb985f9 AG |
111 | emulated = emulate_mfdcr(vcpu, rt, dcrn); |
112 | break; | |
75f74f0d | 113 | |
ceb985f9 AG |
114 | case XOP_MFDCRX: |
115 | emulated = emulate_mfdcr(vcpu, rt, | |
116 | kvmppc_get_gpr(vcpu, ra)); | |
75f74f0d HB |
117 | break; |
118 | ||
119 | case XOP_MTDCR: | |
e4dcfe88 AG |
120 | emulated = emulate_mtdcr(vcpu, rs, dcrn); |
121 | break; | |
75f74f0d | 122 | |
e4dcfe88 AG |
123 | case XOP_MTDCRX: |
124 | emulated = emulate_mtdcr(vcpu, rs, | |
125 | kvmppc_get_gpr(vcpu, ra)); | |
75f74f0d HB |
126 | break; |
127 | ||
128 | case XOP_TLBWE: | |
75f74f0d HB |
129 | emulated = kvmppc_44x_emul_tlbwe(vcpu, ra, rs, ws); |
130 | break; | |
131 | ||
132 | case XOP_TLBSX: | |
75f74f0d HB |
133 | emulated = kvmppc_44x_emul_tlbsx(vcpu, rt, ra, rb, rc); |
134 | break; | |
135 | ||
136 | case XOP_ICCCI: | |
137 | break; | |
138 | ||
139 | default: | |
140 | emulated = EMULATE_FAIL; | |
141 | } | |
142 | ||
143 | break; | |
144 | ||
145 | default: | |
146 | emulated = EMULATE_FAIL; | |
147 | } | |
148 | ||
d0c7dc03 HB |
149 | if (emulated == EMULATE_FAIL) |
150 | emulated = kvmppc_booke_emulate_op(run, vcpu, inst, advance); | |
151 | ||
75f74f0d HB |
152 | return emulated; |
153 | } | |
154 | ||
54771e62 | 155 | int kvmppc_core_emulate_mtspr(struct kvm_vcpu *vcpu, int sprn, ulong spr_val) |
75f74f0d | 156 | { |
d0c7dc03 HB |
157 | int emulated = EMULATE_DONE; |
158 | ||
75f74f0d | 159 | switch (sprn) { |
75f74f0d | 160 | case SPRN_PID: |
54771e62 | 161 | kvmppc_set_pid(vcpu, spr_val); break; |
d0c7dc03 | 162 | case SPRN_MMUCR: |
54771e62 | 163 | vcpu->arch.mmucr = spr_val; break; |
75f74f0d | 164 | case SPRN_CCR0: |
54771e62 | 165 | vcpu->arch.ccr0 = spr_val; break; |
75f74f0d | 166 | case SPRN_CCR1: |
54771e62 | 167 | vcpu->arch.ccr1 = spr_val; break; |
75f74f0d | 168 | default: |
54771e62 | 169 | emulated = kvmppc_booke_emulate_mtspr(vcpu, sprn, spr_val); |
75f74f0d HB |
170 | } |
171 | ||
d0c7dc03 | 172 | return emulated; |
75f74f0d HB |
173 | } |
174 | ||
54771e62 | 175 | int kvmppc_core_emulate_mfspr(struct kvm_vcpu *vcpu, int sprn, ulong *spr_val) |
75f74f0d | 176 | { |
d0c7dc03 HB |
177 | int emulated = EMULATE_DONE; |
178 | ||
75f74f0d | 179 | switch (sprn) { |
d0c7dc03 | 180 | case SPRN_PID: |
54771e62 | 181 | *spr_val = vcpu->arch.pid; break; |
75f74f0d | 182 | case SPRN_MMUCR: |
54771e62 | 183 | *spr_val = vcpu->arch.mmucr; break; |
75f74f0d | 184 | case SPRN_CCR0: |
54771e62 | 185 | *spr_val = vcpu->arch.ccr0; break; |
75f74f0d | 186 | case SPRN_CCR1: |
54771e62 | 187 | *spr_val = vcpu->arch.ccr1; break; |
75f74f0d | 188 | default: |
54771e62 | 189 | emulated = kvmppc_booke_emulate_mfspr(vcpu, sprn, spr_val); |
75f74f0d HB |
190 | } |
191 | ||
d0c7dc03 | 192 | return emulated; |
75f74f0d HB |
193 | } |
194 |