[GitHub/mt8127/android_kernel_alcatel_ttab.git] / arch / powerpc / kernel / udbg_16550.c

/*
 * udbg for for NS16550 compatable serial ports
 *
 * Copyright (C) 2001-2005 PPC 64 Team, IBM Corp
 *
 *      This program is free software; you can redistribute it and/or
 *      modify it under the terms of the GNU General Public License
 *      as published by the Free Software Foundation; either version
 *      2 of the License, or (at your option) any later version.
 */
#include <linux/types.h>
#include <asm/udbg.h>
#include <asm/io.h>

extern u8 real_readb(volatile u8 __iomem  *addr);
extern void real_writeb(u8 data, volatile u8 __iomem *addr);

struct NS16550 {
	/* this struct must be packed */
	unsigned char rbr;  /* 0 */
	unsigned char ier;  /* 1 */
	unsigned char fcr;  /* 2 */
	unsigned char lcr;  /* 3 */
	unsigned char mcr;  /* 4 */
	unsigned char lsr;  /* 5 */
	unsigned char msr;  /* 6 */
	unsigned char scr;  /* 7 */
};

#define thr rbr
#define iir fcr
#define dll rbr
#define dlm ier
#define dlab lcr

#define LSR_DR   0x01  /* Data ready */
#define LSR_OE   0x02  /* Overrun */
#define LSR_PE   0x04  /* Parity error */
#define LSR_FE   0x08  /* Framing error */
#define LSR_BI   0x10  /* Break */
#define LSR_THRE 0x20  /* Xmit holding register empty */
#define LSR_TEMT 0x40  /* Xmitter empty */
#define LSR_ERR  0x80  /* Error */

#define LCR_DLAB 0x80

static volatile struct NS16550 __iomem *udbg_comport;

static void udbg_550_putc(char c)
{
	if (udbg_comport) {
		while ((in_8(&udbg_comport->lsr) & LSR_THRE) == 0)
			/* wait for idle */;
		out_8(&udbg_comport->thr, c);
		if (c == '\n')
			udbg_550_putc('\r');
	}
}

static int udbg_550_getc_poll(void)
{
	if (udbg_comport) {
		if ((in_8(&udbg_comport->lsr) & LSR_DR) != 0)
			return in_8(&udbg_comport->rbr);
		else
			return -1;
	}
	return -1;
}

static int udbg_550_getc(void)
{
	if (udbg_comport) {
		while ((in_8(&udbg_comport->lsr) & LSR_DR) == 0)
			/* wait for char */;
		return in_8(&udbg_comport->rbr);
	}
	return -1;
}

void udbg_init_uart(void __iomem *comport, unsigned int speed,
		    unsigned int clock)
{
	unsigned int dll, base_bauds;

	if (clock == 0)
		clock = 1843200;
	if (speed == 0)
		speed = 9600;

	base_bauds = clock / 16;
	dll = base_bauds / speed;

	if (comport) {
		udbg_comport = (struct NS16550 __iomem *)comport;
		out_8(&udbg_comport->lcr, 0x00);
		out_8(&udbg_comport->ier, 0xff);
		out_8(&udbg_comport->ier, 0x00);
		out_8(&udbg_comport->lcr, LCR_DLAB);
		out_8(&udbg_comport->dll, dll & 0xff);
		out_8(&udbg_comport->dlm, dll >> 8);
		/* 8 data, 1 stop, no parity */
		out_8(&udbg_comport->lcr, 0x03);
		/* RTS/DTR */
		out_8(&udbg_comport->mcr, 0x03);
		/* Clear & enable FIFOs */
		out_8(&udbg_comport->fcr ,0x07);
		udbg_putc = udbg_550_putc;
		udbg_getc = udbg_550_getc;
		udbg_getc_poll = udbg_550_getc_poll;
	}
}

unsigned int udbg_probe_uart_speed(void __iomem *comport, unsigned int clock)
{
	unsigned int dll, dlm, divisor, prescaler, speed;
	u8 old_lcr;
	volatile struct NS16550 __iomem *port = comport;

	old_lcr = in_8(&port->lcr);

	/* select divisor latch registers.  */
	out_8(&port->lcr, LCR_DLAB);

	/* now, read the divisor */
	dll = in_8(&port->dll);
	dlm = in_8(&port->dlm);
	divisor = dlm << 8 | dll;

	/* check prescaling */
	if (in_8(&port->mcr) & 0x80)
		prescaler = 4;
	else
		prescaler = 1;

	/* restore the LCR */
	out_8(&port->lcr, old_lcr);

	/* calculate speed */
	speed = (clock / prescaler) / (divisor * 16);

	/* sanity check */
	if (speed < 0 || speed > (clock / 16))
		speed = 9600;

	return speed;
}

#ifdef CONFIG_PPC_MAPLE
void udbg_maple_real_putc(char c)
{
	if (udbg_comport) {
		while ((real_readb(&udbg_comport->lsr) & LSR_THRE) == 0)
			/* wait for idle */;
		real_writeb(c, &udbg_comport->thr); eieio();
		if (c == '\n')
			udbg_maple_real_putc('\r');
	}
}

void __init udbg_init_maple_realmode(void)
{
	udbg_comport = (volatile struct NS16550 __iomem *)0xf40003f8;

	udbg_putc = udbg_maple_real_putc;
	udbg_getc = NULL;
	udbg_getc_poll = NULL;
}
#endif /* CONFIG_PPC_MAPLE */
Commit	Line	Data
7f853352 MM	1	/*
	2	* udbg for for NS16550 compatable serial ports
	3	*
	4	* Copyright (C) 2001-2005 PPC 64 Team, IBM Corp
	5	*
	6	* This program is free software; you can redistribute it and/or
	7	* modify it under the terms of the GNU General Public License
	8	* as published by the Free Software Foundation; either version
	9	* 2 of the License, or (at your option) any later version.
	10	*/
7f853352	11	#include <linux/types.h>
188d2ce7	12	#include <asm/udbg.h>
7f853352	13	#include <asm/io.h>
7f853352 MM	14
	15	extern u8 real_readb(volatile u8 __iomem *addr);
	16	extern void real_writeb(u8 data, volatile u8 __iomem *addr);
	17
	18	struct NS16550 {
	19	/* this struct must be packed */
	20	unsigned char rbr; /* 0 */
	21	unsigned char ier; /* 1 */
	22	unsigned char fcr; /* 2 */
	23	unsigned char lcr; /* 3 */
	24	unsigned char mcr; /* 4 */
	25	unsigned char lsr; /* 5 */
	26	unsigned char msr; /* 6 */
	27	unsigned char scr; /* 7 */
	28	};
	29
	30	#define thr rbr
	31	#define iir fcr
	32	#define dll rbr
	33	#define dlm ier
	34	#define dlab lcr
	35
	36	#define LSR_DR 0x01 /* Data ready */
	37	#define LSR_OE 0x02 /* Overrun */
	38	#define LSR_PE 0x04 /* Parity error */
	39	#define LSR_FE 0x08 /* Framing error */
	40	#define LSR_BI 0x10 /* Break */
	41	#define LSR_THRE 0x20 /* Xmit holding register empty */
	42	#define LSR_TEMT 0x40 /* Xmitter empty */
	43	#define LSR_ERR 0x80 /* Error */
	44
463ce0e1 BH	45	#define LCR_DLAB 0x80
463ce0e1 BH	46
7f853352 MM	47	static volatile struct NS16550 __iomem *udbg_comport;
7f853352 MM	48
51d3082f	49	static void udbg_550_putc(char c)
7f853352 MM	50	{
	51	if (udbg_comport) {
	52	while ((in_8(&udbg_comport->lsr) & LSR_THRE) == 0)
	53	/* wait for idle */;
	54	out_8(&udbg_comport->thr, c);
	55	if (c == '\n')
	56	udbg_550_putc('\r');
	57	}
	58	}
	59
	60	static int udbg_550_getc_poll(void)
	61	{
	62	if (udbg_comport) {
	63	if ((in_8(&udbg_comport->lsr) & LSR_DR) != 0)
	64	return in_8(&udbg_comport->rbr);
	65	else
	66	return -1;
	67	}
	68	return -1;
	69	}
	70
bb6b9b28	71	static int udbg_550_getc(void)
7f853352 MM	72	{
	73	if (udbg_comport) {
	74	while ((in_8(&udbg_comport->lsr) & LSR_DR) == 0)
	75	/* wait for char */;
	76	return in_8(&udbg_comport->rbr);
	77	}
bb6b9b28	78	return -1;
7f853352 MM	79	}
7f853352 MM	80
463ce0e1 BH	81	void udbg_init_uart(void __iomem *comport, unsigned int speed,
463ce0e1 BH	82	unsigned int clock)
7f853352	83	{
171505da	84	unsigned int dll, base_bauds;
463ce0e1	85
171505da BH	86	if (clock == 0)
171505da BH	87	clock = 1843200;
463ce0e1 BH	88	if (speed == 0)
463ce0e1 BH	89	speed = 9600;
171505da BH	90
171505da BH	91	base_bauds = clock / 16;
463ce0e1	92	dll = base_bauds / speed;
7f853352 MM	93
	94	if (comport) {
	95	udbg_comport = (struct NS16550 __iomem *)comport;
	96	out_8(&udbg_comport->lcr, 0x00);
	97	out_8(&udbg_comport->ier, 0xff);
	98	out_8(&udbg_comport->ier, 0x00);
463ce0e1 BH	99	out_8(&udbg_comport->lcr, LCR_DLAB);
	100	out_8(&udbg_comport->dll, dll & 0xff);
	101	out_8(&udbg_comport->dlm, dll >> 8);
	102	/* 8 data, 1 stop, no parity */
	103	out_8(&udbg_comport->lcr, 0x03);
	104	/* RTS/DTR */
	105	out_8(&udbg_comport->mcr, 0x03);
	106	/* Clear & enable FIFOs */
	107	out_8(&udbg_comport->fcr ,0x07);
c8f1c8be MM	108	udbg_putc = udbg_550_putc;
	109	udbg_getc = udbg_550_getc;
	110	udbg_getc_poll = udbg_550_getc_poll;
7f853352 MM	111	}
	112	}
	113
463ce0e1 BH	114	unsigned int udbg_probe_uart_speed(void __iomem *comport, unsigned int clock)
	115	{
	116	unsigned int dll, dlm, divisor, prescaler, speed;
	117	u8 old_lcr;
	118	volatile struct NS16550 __iomem *port = comport;
	119
	120	old_lcr = in_8(&port->lcr);
	121
	122	/* select divisor latch registers. */
	123	out_8(&port->lcr, LCR_DLAB);
	124
	125	/* now, read the divisor */
	126	dll = in_8(&port->dll);
	127	dlm = in_8(&port->dlm);
	128	divisor = dlm << 8 \| dll;
	129
	130	/* check prescaling */
	131	if (in_8(&port->mcr) & 0x80)
	132	prescaler = 4;
	133	else
	134	prescaler = 1;
	135
	136	/* restore the LCR */
	137	out_8(&port->lcr, old_lcr);
	138
	139	/* calculate speed */
	140	speed = (clock / prescaler) / (divisor * 16);
	141
	142	/* sanity check */
d0e132b5	143	if (speed < 0 \|\| speed > (clock / 16))
463ce0e1 BH	144	speed = 9600;
	145
	146	return speed;
	147	}
	148
7f853352	149	#ifdef CONFIG_PPC_MAPLE
4009d980	150	void udbg_maple_real_putc(char c)
7f853352 MM	151	{
	152	if (udbg_comport) {
	153	while ((real_readb(&udbg_comport->lsr) & LSR_THRE) == 0)
	154	/* wait for idle */;
	155	real_writeb(c, &udbg_comport->thr); eieio();
	156	if (c == '\n')
	157	udbg_maple_real_putc('\r');
	158	}
	159	}
	160
296167ae	161	void __init udbg_init_maple_realmode(void)
7f853352 MM	162	{
	163	udbg_comport = (volatile struct NS16550 __iomem *)0xf40003f8;
	164
c8f1c8be MM	165	udbg_putc = udbg_maple_real_putc;
	166	udbg_getc = NULL;
	167	udbg_getc_poll = NULL;
7f853352 MM	168	}
7f853352 MM	169	#endif /* CONFIG_PPC_MAPLE */