Commit | Line | Data |
---|---|---|
1da177e4 LT |
1 | /* |
2 | * SMP support for ppc. | |
3 | * | |
4 | * Written by Cort Dougan (cort@cs.nmt.edu) borrowing a great | |
5 | * deal of code from the sparc and intel versions. | |
6 | * | |
7 | * Copyright (C) 1999 Cort Dougan <cort@cs.nmt.edu> | |
8 | * | |
9 | * PowerPC-64 Support added by Dave Engebretsen, Peter Bergner, and | |
10 | * Mike Corrigan {engebret|bergner|mikec}@us.ibm.com | |
11 | * | |
12 | * This program is free software; you can redistribute it and/or | |
13 | * modify it under the terms of the GNU General Public License | |
14 | * as published by the Free Software Foundation; either version | |
15 | * 2 of the License, or (at your option) any later version. | |
16 | */ | |
17 | ||
18 | #undef DEBUG | |
19 | ||
1da177e4 | 20 | #include <linux/kernel.h> |
4b16f8e2 | 21 | #include <linux/export.h> |
1da177e4 LT |
22 | #include <linux/sched.h> |
23 | #include <linux/smp.h> | |
24 | #include <linux/interrupt.h> | |
25 | #include <linux/delay.h> | |
26 | #include <linux/init.h> | |
27 | #include <linux/spinlock.h> | |
28 | #include <linux/cache.h> | |
29 | #include <linux/err.h> | |
8a25a2fd | 30 | #include <linux/device.h> |
1da177e4 LT |
31 | #include <linux/cpu.h> |
32 | #include <linux/notifier.h> | |
4b703a23 | 33 | #include <linux/topology.h> |
1da177e4 LT |
34 | |
35 | #include <asm/ptrace.h> | |
60063497 | 36 | #include <linux/atomic.h> |
1da177e4 LT |
37 | #include <asm/irq.h> |
38 | #include <asm/page.h> | |
39 | #include <asm/pgtable.h> | |
40 | #include <asm/prom.h> | |
41 | #include <asm/smp.h> | |
1da177e4 LT |
42 | #include <asm/time.h> |
43 | #include <asm/machdep.h> | |
e2075f79 | 44 | #include <asm/cputhreads.h> |
1da177e4 | 45 | #include <asm/cputable.h> |
bbeb3f4c | 46 | #include <asm/mpic.h> |
a7f290da | 47 | #include <asm/vdso_datapage.h> |
5ad57078 PM |
48 | #ifdef CONFIG_PPC64 |
49 | #include <asm/paca.h> | |
50 | #endif | |
18ad51dd | 51 | #include <asm/vdso.h> |
ae3a197e | 52 | #include <asm/debug.h> |
5ad57078 | 53 | |
1da177e4 | 54 | #ifdef DEBUG |
f9e4ec57 | 55 | #include <asm/udbg.h> |
1da177e4 LT |
56 | #define DBG(fmt...) udbg_printf(fmt) |
57 | #else | |
58 | #define DBG(fmt...) | |
59 | #endif | |
60 | ||
c56e5853 | 61 | #ifdef CONFIG_HOTPLUG_CPU |
fb82b839 BH |
62 | /* State of each CPU during hotplug phases */ |
63 | static DEFINE_PER_CPU(int, cpu_state) = { 0 }; | |
c56e5853 BH |
64 | #endif |
65 | ||
f9e4ec57 ME |
66 | struct thread_info *secondary_ti; |
67 | ||
cc1ba8ea AB |
68 | DEFINE_PER_CPU(cpumask_var_t, cpu_sibling_map); |
69 | DEFINE_PER_CPU(cpumask_var_t, cpu_core_map); | |
1da177e4 | 70 | |
d5a7430d | 71 | EXPORT_PER_CPU_SYMBOL(cpu_sibling_map); |
440a0857 | 72 | EXPORT_PER_CPU_SYMBOL(cpu_core_map); |
1da177e4 | 73 | |
5ad57078 | 74 | /* SMP operations for this machine */ |
1da177e4 LT |
75 | struct smp_ops_t *smp_ops; |
76 | ||
7ccbe504 BH |
77 | /* Can't be static due to PowerMac hackery */ |
78 | volatile unsigned int cpu_callin_map[NR_CPUS]; | |
1da177e4 | 79 | |
1da177e4 LT |
80 | int smt_enabled_at_boot = 1; |
81 | ||
cc532915 ME |
82 | static void (*crash_ipi_function_ptr)(struct pt_regs *) = NULL; |
83 | ||
5ad57078 | 84 | #ifdef CONFIG_PPC64 |
cad5cef6 | 85 | int smp_generic_kick_cpu(int nr) |
1da177e4 LT |
86 | { |
87 | BUG_ON(nr < 0 || nr >= NR_CPUS); | |
88 | ||
89 | /* | |
90 | * The processor is currently spinning, waiting for the | |
91 | * cpu_start field to become non-zero After we set cpu_start, | |
92 | * the processor will continue on to secondary_start | |
93 | */ | |
fb82b839 BH |
94 | if (!paca[nr].cpu_start) { |
95 | paca[nr].cpu_start = 1; | |
96 | smp_mb(); | |
97 | return 0; | |
98 | } | |
99 | ||
100 | #ifdef CONFIG_HOTPLUG_CPU | |
101 | /* | |
102 | * Ok it's not there, so it might be soft-unplugged, let's | |
103 | * try to bring it back | |
104 | */ | |
ae5cab47 | 105 | generic_set_cpu_up(nr); |
fb82b839 BH |
106 | smp_wmb(); |
107 | smp_send_reschedule(nr); | |
108 | #endif /* CONFIG_HOTPLUG_CPU */ | |
de300974 ME |
109 | |
110 | return 0; | |
1da177e4 | 111 | } |
fb82b839 | 112 | #endif /* CONFIG_PPC64 */ |
1da177e4 | 113 | |
25ddd738 MM |
114 | static irqreturn_t call_function_action(int irq, void *data) |
115 | { | |
116 | generic_smp_call_function_interrupt(); | |
117 | return IRQ_HANDLED; | |
118 | } | |
119 | ||
120 | static irqreturn_t reschedule_action(int irq, void *data) | |
121 | { | |
184748cc | 122 | scheduler_ipi(); |
25ddd738 MM |
123 | return IRQ_HANDLED; |
124 | } | |
125 | ||
126 | static irqreturn_t call_function_single_action(int irq, void *data) | |
127 | { | |
128 | generic_smp_call_function_single_interrupt(); | |
129 | return IRQ_HANDLED; | |
130 | } | |
131 | ||
7ef71d75 | 132 | static irqreturn_t debug_ipi_action(int irq, void *data) |
25ddd738 | 133 | { |
23d72bfd MM |
134 | if (crash_ipi_function_ptr) { |
135 | crash_ipi_function_ptr(get_irq_regs()); | |
136 | return IRQ_HANDLED; | |
137 | } | |
138 | ||
139 | #ifdef CONFIG_DEBUGGER | |
140 | debugger_ipi(get_irq_regs()); | |
141 | #endif /* CONFIG_DEBUGGER */ | |
142 | ||
25ddd738 MM |
143 | return IRQ_HANDLED; |
144 | } | |
145 | ||
146 | static irq_handler_t smp_ipi_action[] = { | |
147 | [PPC_MSG_CALL_FUNCTION] = call_function_action, | |
148 | [PPC_MSG_RESCHEDULE] = reschedule_action, | |
149 | [PPC_MSG_CALL_FUNC_SINGLE] = call_function_single_action, | |
150 | [PPC_MSG_DEBUGGER_BREAK] = debug_ipi_action, | |
151 | }; | |
152 | ||
153 | const char *smp_ipi_name[] = { | |
154 | [PPC_MSG_CALL_FUNCTION] = "ipi call function", | |
155 | [PPC_MSG_RESCHEDULE] = "ipi reschedule", | |
156 | [PPC_MSG_CALL_FUNC_SINGLE] = "ipi call function single", | |
157 | [PPC_MSG_DEBUGGER_BREAK] = "ipi debugger", | |
158 | }; | |
159 | ||
160 | /* optional function to request ipi, for controllers with >= 4 ipis */ | |
161 | int smp_request_message_ipi(int virq, int msg) | |
162 | { | |
163 | int err; | |
164 | ||
165 | if (msg < 0 || msg > PPC_MSG_DEBUGGER_BREAK) { | |
166 | return -EINVAL; | |
167 | } | |
168 | #if !defined(CONFIG_DEBUGGER) && !defined(CONFIG_KEXEC) | |
169 | if (msg == PPC_MSG_DEBUGGER_BREAK) { | |
170 | return 1; | |
171 | } | |
172 | #endif | |
3b5e16d7 | 173 | err = request_irq(virq, smp_ipi_action[msg], |
e6651de9 | 174 | IRQF_PERCPU | IRQF_NO_THREAD | IRQF_NO_SUSPEND, |
25ddd738 MM |
175 | smp_ipi_name[msg], 0); |
176 | WARN(err < 0, "unable to request_irq %d for %s (rc %d)\n", | |
177 | virq, smp_ipi_name[msg], err); | |
178 | ||
179 | return err; | |
180 | } | |
181 | ||
1ece355b | 182 | #ifdef CONFIG_PPC_SMP_MUXED_IPI |
23d72bfd | 183 | struct cpu_messages { |
71454272 | 184 | int messages; /* current messages */ |
23d72bfd MM |
185 | unsigned long data; /* data for cause ipi */ |
186 | }; | |
187 | static DEFINE_PER_CPU_SHARED_ALIGNED(struct cpu_messages, ipi_message); | |
188 | ||
189 | void smp_muxed_ipi_set_data(int cpu, unsigned long data) | |
190 | { | |
191 | struct cpu_messages *info = &per_cpu(ipi_message, cpu); | |
192 | ||
193 | info->data = data; | |
194 | } | |
195 | ||
196 | void smp_muxed_ipi_message_pass(int cpu, int msg) | |
197 | { | |
198 | struct cpu_messages *info = &per_cpu(ipi_message, cpu); | |
71454272 | 199 | char *message = (char *)&info->messages; |
23d72bfd | 200 | |
9fb1b36c PM |
201 | /* |
202 | * Order previous accesses before accesses in the IPI handler. | |
203 | */ | |
204 | smp_mb(); | |
71454272 | 205 | message[msg] = 1; |
9fb1b36c PM |
206 | /* |
207 | * cause_ipi functions are required to include a full barrier | |
208 | * before doing whatever causes the IPI. | |
209 | */ | |
23d72bfd MM |
210 | smp_ops->cause_ipi(cpu, info->data); |
211 | } | |
212 | ||
23d72bfd MM |
213 | irqreturn_t smp_ipi_demux(void) |
214 | { | |
215 | struct cpu_messages *info = &__get_cpu_var(ipi_message); | |
71454272 | 216 | unsigned int all; |
23d72bfd MM |
217 | |
218 | mb(); /* order any irq clear */ | |
71454272 MM |
219 | |
220 | do { | |
9fb1b36c | 221 | all = xchg(&info->messages, 0); |
71454272 MM |
222 | |
223 | #ifdef __BIG_ENDIAN | |
224 | if (all & (1 << (24 - 8 * PPC_MSG_CALL_FUNCTION))) | |
23d72bfd | 225 | generic_smp_call_function_interrupt(); |
71454272 | 226 | if (all & (1 << (24 - 8 * PPC_MSG_RESCHEDULE))) |
880102e7 | 227 | scheduler_ipi(); |
71454272 | 228 | if (all & (1 << (24 - 8 * PPC_MSG_CALL_FUNC_SINGLE))) |
23d72bfd | 229 | generic_smp_call_function_single_interrupt(); |
71454272 | 230 | if (all & (1 << (24 - 8 * PPC_MSG_DEBUGGER_BREAK))) |
23d72bfd | 231 | debug_ipi_action(0, NULL); |
71454272 MM |
232 | #else |
233 | #error Unsupported ENDIAN | |
23d72bfd | 234 | #endif |
71454272 MM |
235 | } while (info->messages); |
236 | ||
23d72bfd MM |
237 | return IRQ_HANDLED; |
238 | } | |
1ece355b | 239 | #endif /* CONFIG_PPC_SMP_MUXED_IPI */ |
23d72bfd | 240 | |
9ca980dc PM |
241 | static inline void do_message_pass(int cpu, int msg) |
242 | { | |
243 | if (smp_ops->message_pass) | |
244 | smp_ops->message_pass(cpu, msg); | |
245 | #ifdef CONFIG_PPC_SMP_MUXED_IPI | |
246 | else | |
247 | smp_muxed_ipi_message_pass(cpu, msg); | |
248 | #endif | |
249 | } | |
250 | ||
1da177e4 LT |
251 | void smp_send_reschedule(int cpu) |
252 | { | |
8cffc6ac | 253 | if (likely(smp_ops)) |
9ca980dc | 254 | do_message_pass(cpu, PPC_MSG_RESCHEDULE); |
1da177e4 | 255 | } |
de56a948 | 256 | EXPORT_SYMBOL_GPL(smp_send_reschedule); |
1da177e4 | 257 | |
b7d7a240 JA |
258 | void arch_send_call_function_single_ipi(int cpu) |
259 | { | |
9ca980dc | 260 | do_message_pass(cpu, PPC_MSG_CALL_FUNC_SINGLE); |
b7d7a240 JA |
261 | } |
262 | ||
f063ea02 | 263 | void arch_send_call_function_ipi_mask(const struct cpumask *mask) |
b7d7a240 JA |
264 | { |
265 | unsigned int cpu; | |
266 | ||
f063ea02 | 267 | for_each_cpu(cpu, mask) |
9ca980dc | 268 | do_message_pass(cpu, PPC_MSG_CALL_FUNCTION); |
b7d7a240 JA |
269 | } |
270 | ||
e0476371 MM |
271 | #if defined(CONFIG_DEBUGGER) || defined(CONFIG_KEXEC) |
272 | void smp_send_debugger_break(void) | |
1da177e4 | 273 | { |
e0476371 MM |
274 | int cpu; |
275 | int me = raw_smp_processor_id(); | |
276 | ||
277 | if (unlikely(!smp_ops)) | |
278 | return; | |
279 | ||
280 | for_each_online_cpu(cpu) | |
281 | if (cpu != me) | |
9ca980dc | 282 | do_message_pass(cpu, PPC_MSG_DEBUGGER_BREAK); |
1da177e4 LT |
283 | } |
284 | #endif | |
285 | ||
cc532915 ME |
286 | #ifdef CONFIG_KEXEC |
287 | void crash_send_ipi(void (*crash_ipi_callback)(struct pt_regs *)) | |
288 | { | |
289 | crash_ipi_function_ptr = crash_ipi_callback; | |
e0476371 | 290 | if (crash_ipi_callback) { |
cc532915 | 291 | mb(); |
e0476371 | 292 | smp_send_debugger_break(); |
cc532915 ME |
293 | } |
294 | } | |
295 | #endif | |
296 | ||
1da177e4 LT |
297 | static void stop_this_cpu(void *dummy) |
298 | { | |
8389b37d VB |
299 | /* Remove this CPU */ |
300 | set_cpu_online(smp_processor_id(), false); | |
301 | ||
1da177e4 LT |
302 | local_irq_disable(); |
303 | while (1) | |
304 | ; | |
305 | } | |
306 | ||
8fd7675c SS |
307 | void smp_send_stop(void) |
308 | { | |
8691e5a8 | 309 | smp_call_function(stop_this_cpu, NULL, 0); |
1da177e4 LT |
310 | } |
311 | ||
1da177e4 LT |
312 | struct thread_info *current_set[NR_CPUS]; |
313 | ||
cad5cef6 | 314 | static void smp_store_cpu_info(int id) |
1da177e4 | 315 | { |
6b7487fc | 316 | per_cpu(cpu_pvr, id) = mfspr(SPRN_PVR); |
3160b097 BB |
317 | #ifdef CONFIG_PPC_FSL_BOOK3E |
318 | per_cpu(next_tlbcam_idx, id) | |
319 | = (mfspr(SPRN_TLB1CFG) & TLBnCFG_N_ENTRY) - 1; | |
320 | #endif | |
1da177e4 LT |
321 | } |
322 | ||
1da177e4 LT |
323 | void __init smp_prepare_cpus(unsigned int max_cpus) |
324 | { | |
325 | unsigned int cpu; | |
326 | ||
327 | DBG("smp_prepare_cpus\n"); | |
328 | ||
329 | /* | |
330 | * setup_cpu may need to be called on the boot cpu. We havent | |
331 | * spun any cpus up but lets be paranoid. | |
332 | */ | |
333 | BUG_ON(boot_cpuid != smp_processor_id()); | |
334 | ||
335 | /* Fixup boot cpu */ | |
336 | smp_store_cpu_info(boot_cpuid); | |
337 | cpu_callin_map[boot_cpuid] = 1; | |
338 | ||
cc1ba8ea AB |
339 | for_each_possible_cpu(cpu) { |
340 | zalloc_cpumask_var_node(&per_cpu(cpu_sibling_map, cpu), | |
341 | GFP_KERNEL, cpu_to_node(cpu)); | |
342 | zalloc_cpumask_var_node(&per_cpu(cpu_core_map, cpu), | |
343 | GFP_KERNEL, cpu_to_node(cpu)); | |
344 | } | |
345 | ||
346 | cpumask_set_cpu(boot_cpuid, cpu_sibling_mask(boot_cpuid)); | |
347 | cpumask_set_cpu(boot_cpuid, cpu_core_mask(boot_cpuid)); | |
348 | ||
8cffc6ac | 349 | if (smp_ops) |
757cbd46 KG |
350 | if (smp_ops->probe) |
351 | max_cpus = smp_ops->probe(); | |
352 | else | |
353 | max_cpus = NR_CPUS; | |
8cffc6ac BH |
354 | else |
355 | max_cpus = 1; | |
1da177e4 LT |
356 | } |
357 | ||
cad5cef6 | 358 | void smp_prepare_boot_cpu(void) |
1da177e4 LT |
359 | { |
360 | BUG_ON(smp_processor_id() != boot_cpuid); | |
5ad57078 | 361 | #ifdef CONFIG_PPC64 |
1da177e4 | 362 | paca[boot_cpuid].__current = current; |
5ad57078 | 363 | #endif |
b5e2fc1c | 364 | current_set[boot_cpuid] = task_thread_info(current); |
1da177e4 LT |
365 | } |
366 | ||
367 | #ifdef CONFIG_HOTPLUG_CPU | |
1da177e4 LT |
368 | |
369 | int generic_cpu_disable(void) | |
370 | { | |
371 | unsigned int cpu = smp_processor_id(); | |
372 | ||
373 | if (cpu == boot_cpuid) | |
374 | return -EBUSY; | |
375 | ||
ea0f1cab | 376 | set_cpu_online(cpu, false); |
799d6046 | 377 | #ifdef CONFIG_PPC64 |
a7f290da | 378 | vdso_data->processorCount--; |
094fe2e7 | 379 | #endif |
1c91cc57 | 380 | migrate_irqs(); |
1da177e4 LT |
381 | return 0; |
382 | } | |
383 | ||
1da177e4 LT |
384 | void generic_cpu_die(unsigned int cpu) |
385 | { | |
386 | int i; | |
387 | ||
388 | for (i = 0; i < 100; i++) { | |
0d8d4d42 | 389 | smp_rmb(); |
1da177e4 LT |
390 | if (per_cpu(cpu_state, cpu) == CPU_DEAD) |
391 | return; | |
392 | msleep(100); | |
393 | } | |
394 | printk(KERN_ERR "CPU%d didn't die...\n", cpu); | |
395 | } | |
396 | ||
397 | void generic_mach_cpu_die(void) | |
398 | { | |
399 | unsigned int cpu; | |
400 | ||
401 | local_irq_disable(); | |
4fcb8833 | 402 | idle_task_exit(); |
1da177e4 LT |
403 | cpu = smp_processor_id(); |
404 | printk(KERN_DEBUG "CPU%d offline\n", cpu); | |
405 | __get_cpu_var(cpu_state) = CPU_DEAD; | |
0d8d4d42 | 406 | smp_wmb(); |
1da177e4 LT |
407 | while (__get_cpu_var(cpu_state) != CPU_UP_PREPARE) |
408 | cpu_relax(); | |
1da177e4 | 409 | } |
105765f4 BH |
410 | |
411 | void generic_set_cpu_dead(unsigned int cpu) | |
412 | { | |
413 | per_cpu(cpu_state, cpu) = CPU_DEAD; | |
414 | } | |
fb82b839 | 415 | |
ae5cab47 ZC |
416 | /* |
417 | * The cpu_state should be set to CPU_UP_PREPARE in kick_cpu(), otherwise | |
418 | * the cpu_state is always CPU_DEAD after calling generic_set_cpu_dead(), | |
419 | * which makes the delay in generic_cpu_die() not happen. | |
420 | */ | |
421 | void generic_set_cpu_up(unsigned int cpu) | |
422 | { | |
423 | per_cpu(cpu_state, cpu) = CPU_UP_PREPARE; | |
424 | } | |
425 | ||
fb82b839 BH |
426 | int generic_check_cpu_restart(unsigned int cpu) |
427 | { | |
428 | return per_cpu(cpu_state, cpu) == CPU_UP_PREPARE; | |
429 | } | |
512691d4 PM |
430 | |
431 | static atomic_t secondary_inhibit_count; | |
432 | ||
433 | /* | |
434 | * Don't allow secondary CPU threads to come online | |
435 | */ | |
436 | void inhibit_secondary_onlining(void) | |
437 | { | |
438 | /* | |
439 | * This makes secondary_inhibit_count stable during cpu | |
440 | * online/offline operations. | |
441 | */ | |
442 | get_online_cpus(); | |
443 | ||
444 | atomic_inc(&secondary_inhibit_count); | |
445 | put_online_cpus(); | |
446 | } | |
447 | EXPORT_SYMBOL_GPL(inhibit_secondary_onlining); | |
448 | ||
449 | /* | |
450 | * Allow secondary CPU threads to come online again | |
451 | */ | |
452 | void uninhibit_secondary_onlining(void) | |
453 | { | |
454 | get_online_cpus(); | |
455 | atomic_dec(&secondary_inhibit_count); | |
456 | put_online_cpus(); | |
457 | } | |
458 | EXPORT_SYMBOL_GPL(uninhibit_secondary_onlining); | |
459 | ||
460 | static int secondaries_inhibited(void) | |
461 | { | |
462 | return atomic_read(&secondary_inhibit_count); | |
463 | } | |
464 | ||
465 | #else /* HOTPLUG_CPU */ | |
466 | ||
467 | #define secondaries_inhibited() 0 | |
468 | ||
1da177e4 LT |
469 | #endif |
470 | ||
17e32eac | 471 | static void cpu_idle_thread_init(unsigned int cpu, struct task_struct *idle) |
c56e5853 | 472 | { |
17e32eac | 473 | struct thread_info *ti = task_thread_info(idle); |
c56e5853 BH |
474 | |
475 | #ifdef CONFIG_PPC64 | |
17e32eac | 476 | paca[cpu].__current = idle; |
c56e5853 BH |
477 | paca[cpu].kstack = (unsigned long)ti + THREAD_SIZE - STACK_FRAME_OVERHEAD; |
478 | #endif | |
479 | ti->cpu = cpu; | |
17e32eac | 480 | secondary_ti = current_set[cpu] = ti; |
c56e5853 BH |
481 | } |
482 | ||
8239c25f | 483 | int __cpuinit __cpu_up(unsigned int cpu, struct task_struct *tidle) |
1da177e4 | 484 | { |
c56e5853 | 485 | int rc, c; |
1da177e4 | 486 | |
512691d4 PM |
487 | /* |
488 | * Don't allow secondary threads to come online if inhibited | |
489 | */ | |
490 | if (threads_per_core > 1 && secondaries_inhibited() && | |
491 | cpu % threads_per_core != 0) | |
492 | return -EBUSY; | |
493 | ||
8cffc6ac BH |
494 | if (smp_ops == NULL || |
495 | (smp_ops->cpu_bootable && !smp_ops->cpu_bootable(cpu))) | |
1da177e4 LT |
496 | return -EINVAL; |
497 | ||
17e32eac | 498 | cpu_idle_thread_init(cpu, tidle); |
c560bbce | 499 | |
1da177e4 LT |
500 | /* Make sure callin-map entry is 0 (can be leftover a CPU |
501 | * hotplug | |
502 | */ | |
503 | cpu_callin_map[cpu] = 0; | |
504 | ||
505 | /* The information for processor bringup must | |
506 | * be written out to main store before we release | |
507 | * the processor. | |
508 | */ | |
0d8d4d42 | 509 | smp_mb(); |
1da177e4 LT |
510 | |
511 | /* wake up cpus */ | |
512 | DBG("smp: kicking cpu %d\n", cpu); | |
de300974 ME |
513 | rc = smp_ops->kick_cpu(cpu); |
514 | if (rc) { | |
515 | pr_err("smp: failed starting cpu %d (rc %d)\n", cpu, rc); | |
516 | return rc; | |
517 | } | |
1da177e4 LT |
518 | |
519 | /* | |
520 | * wait to see if the cpu made a callin (is actually up). | |
521 | * use this value that I found through experimentation. | |
522 | * -- Cort | |
523 | */ | |
524 | if (system_state < SYSTEM_RUNNING) | |
ee0339f2 | 525 | for (c = 50000; c && !cpu_callin_map[cpu]; c--) |
1da177e4 LT |
526 | udelay(100); |
527 | #ifdef CONFIG_HOTPLUG_CPU | |
528 | else | |
529 | /* | |
530 | * CPUs can take much longer to come up in the | |
531 | * hotplug case. Wait five seconds. | |
532 | */ | |
67764263 GS |
533 | for (c = 5000; c && !cpu_callin_map[cpu]; c--) |
534 | msleep(1); | |
1da177e4 LT |
535 | #endif |
536 | ||
537 | if (!cpu_callin_map[cpu]) { | |
6685a477 | 538 | printk(KERN_ERR "Processor %u is stuck.\n", cpu); |
1da177e4 LT |
539 | return -ENOENT; |
540 | } | |
541 | ||
6685a477 | 542 | DBG("Processor %u found.\n", cpu); |
1da177e4 LT |
543 | |
544 | if (smp_ops->give_timebase) | |
545 | smp_ops->give_timebase(); | |
546 | ||
7f18d652 ME |
547 | /* Wait until cpu puts itself in the online & active maps */ |
548 | while (!cpu_online(cpu) || !cpu_active(cpu)) | |
1da177e4 LT |
549 | cpu_relax(); |
550 | ||
551 | return 0; | |
552 | } | |
553 | ||
e9efed3b NL |
554 | /* Return the value of the reg property corresponding to the given |
555 | * logical cpu. | |
556 | */ | |
557 | int cpu_to_core_id(int cpu) | |
558 | { | |
559 | struct device_node *np; | |
560 | const int *reg; | |
561 | int id = -1; | |
562 | ||
563 | np = of_get_cpu_node(cpu, NULL); | |
564 | if (!np) | |
565 | goto out; | |
566 | ||
567 | reg = of_get_property(np, "reg", NULL); | |
568 | if (!reg) | |
569 | goto out; | |
570 | ||
571 | id = *reg; | |
572 | out: | |
573 | of_node_put(np); | |
574 | return id; | |
575 | } | |
576 | ||
99d86705 VS |
577 | /* Helper routines for cpu to core mapping */ |
578 | int cpu_core_index_of_thread(int cpu) | |
579 | { | |
580 | return cpu >> threads_shift; | |
581 | } | |
582 | EXPORT_SYMBOL_GPL(cpu_core_index_of_thread); | |
583 | ||
584 | int cpu_first_thread_of_core(int core) | |
585 | { | |
586 | return core << threads_shift; | |
587 | } | |
588 | EXPORT_SYMBOL_GPL(cpu_first_thread_of_core); | |
589 | ||
104699c0 | 590 | /* Must be called when no change can occur to cpu_present_mask, |
440a0857 NL |
591 | * i.e. during cpu online or offline. |
592 | */ | |
593 | static struct device_node *cpu_to_l2cache(int cpu) | |
594 | { | |
595 | struct device_node *np; | |
b2ea25b9 | 596 | struct device_node *cache; |
440a0857 NL |
597 | |
598 | if (!cpu_present(cpu)) | |
599 | return NULL; | |
600 | ||
601 | np = of_get_cpu_node(cpu, NULL); | |
602 | if (np == NULL) | |
603 | return NULL; | |
604 | ||
b2ea25b9 NL |
605 | cache = of_find_next_cache_node(np); |
606 | ||
440a0857 NL |
607 | of_node_put(np); |
608 | ||
b2ea25b9 | 609 | return cache; |
440a0857 | 610 | } |
1da177e4 LT |
611 | |
612 | /* Activate a secondary processor. */ | |
174ea471 | 613 | __cpuinit void start_secondary(void *unused) |
1da177e4 LT |
614 | { |
615 | unsigned int cpu = smp_processor_id(); | |
440a0857 | 616 | struct device_node *l2_cache; |
e2075f79 | 617 | int i, base; |
1da177e4 LT |
618 | |
619 | atomic_inc(&init_mm.mm_count); | |
620 | current->active_mm = &init_mm; | |
621 | ||
622 | smp_store_cpu_info(cpu); | |
5ad57078 | 623 | set_dec(tb_ticks_per_jiffy); |
e4d76e1c | 624 | preempt_disable(); |
1da177e4 LT |
625 | cpu_callin_map[cpu] = 1; |
626 | ||
757cbd46 KG |
627 | if (smp_ops->setup_cpu) |
628 | smp_ops->setup_cpu(cpu); | |
1da177e4 LT |
629 | if (smp_ops->take_timebase) |
630 | smp_ops->take_timebase(); | |
631 | ||
d831d0b8 TB |
632 | secondary_cpu_time_init(); |
633 | ||
aeeafbfa BH |
634 | #ifdef CONFIG_PPC64 |
635 | if (system_state == SYSTEM_RUNNING) | |
636 | vdso_data->processorCount++; | |
18ad51dd AB |
637 | |
638 | vdso_getcpu_init(); | |
aeeafbfa | 639 | #endif |
e545a614 | 640 | notify_cpu_starting(cpu); |
ea0f1cab | 641 | set_cpu_online(cpu, true); |
e2075f79 | 642 | /* Update sibling maps */ |
99d86705 | 643 | base = cpu_first_thread_sibling(cpu); |
e2075f79 NL |
644 | for (i = 0; i < threads_per_core; i++) { |
645 | if (cpu_is_offline(base + i)) | |
646 | continue; | |
cc1ba8ea AB |
647 | cpumask_set_cpu(cpu, cpu_sibling_mask(base + i)); |
648 | cpumask_set_cpu(base + i, cpu_sibling_mask(cpu)); | |
440a0857 NL |
649 | |
650 | /* cpu_core_map should be a superset of | |
651 | * cpu_sibling_map even if we don't have cache | |
652 | * information, so update the former here, too. | |
653 | */ | |
cc1ba8ea AB |
654 | cpumask_set_cpu(cpu, cpu_core_mask(base + i)); |
655 | cpumask_set_cpu(base + i, cpu_core_mask(cpu)); | |
e2075f79 | 656 | } |
440a0857 NL |
657 | l2_cache = cpu_to_l2cache(cpu); |
658 | for_each_online_cpu(i) { | |
659 | struct device_node *np = cpu_to_l2cache(i); | |
660 | if (!np) | |
661 | continue; | |
662 | if (np == l2_cache) { | |
cc1ba8ea AB |
663 | cpumask_set_cpu(cpu, cpu_core_mask(i)); |
664 | cpumask_set_cpu(i, cpu_core_mask(cpu)); | |
440a0857 NL |
665 | } |
666 | of_node_put(np); | |
667 | } | |
668 | of_node_put(l2_cache); | |
1da177e4 LT |
669 | |
670 | local_irq_enable(); | |
671 | ||
799fef06 | 672 | cpu_startup_entry(CPUHP_ONLINE); |
fa3f82c8 BH |
673 | |
674 | BUG(); | |
1da177e4 LT |
675 | } |
676 | ||
677 | int setup_profiling_timer(unsigned int multiplier) | |
678 | { | |
679 | return 0; | |
680 | } | |
681 | ||
682 | void __init smp_cpus_done(unsigned int max_cpus) | |
683 | { | |
bfb9126d | 684 | cpumask_var_t old_mask; |
1da177e4 LT |
685 | |
686 | /* We want the setup_cpu() here to be called from CPU 0, but our | |
687 | * init thread may have been "borrowed" by another CPU in the meantime | |
688 | * se we pin us down to CPU 0 for a short while | |
689 | */ | |
bfb9126d | 690 | alloc_cpumask_var(&old_mask, GFP_NOWAIT); |
104699c0 | 691 | cpumask_copy(old_mask, tsk_cpus_allowed(current)); |
21dbeb91 | 692 | set_cpus_allowed_ptr(current, cpumask_of(boot_cpuid)); |
1da177e4 | 693 | |
757cbd46 | 694 | if (smp_ops && smp_ops->setup_cpu) |
8cffc6ac | 695 | smp_ops->setup_cpu(boot_cpuid); |
1da177e4 | 696 | |
bfb9126d AB |
697 | set_cpus_allowed_ptr(current, old_mask); |
698 | ||
699 | free_cpumask_var(old_mask); | |
4b703a23 | 700 | |
d7294445 BH |
701 | if (smp_ops && smp_ops->bringup_done) |
702 | smp_ops->bringup_done(); | |
703 | ||
4b703a23 | 704 | dump_numa_cpu_topology(); |
d7294445 | 705 | |
1da177e4 LT |
706 | } |
707 | ||
e1f0ece1 MN |
708 | int arch_sd_sibling_asym_packing(void) |
709 | { | |
710 | if (cpu_has_feature(CPU_FTR_ASYM_SMT)) { | |
711 | printk_once(KERN_INFO "Enabling Asymmetric SMT scheduling\n"); | |
712 | return SD_ASYM_PACKING; | |
713 | } | |
714 | return 0; | |
715 | } | |
716 | ||
1da177e4 LT |
717 | #ifdef CONFIG_HOTPLUG_CPU |
718 | int __cpu_disable(void) | |
719 | { | |
440a0857 | 720 | struct device_node *l2_cache; |
e2075f79 NL |
721 | int cpu = smp_processor_id(); |
722 | int base, i; | |
723 | int err; | |
1da177e4 | 724 | |
e2075f79 NL |
725 | if (!smp_ops->cpu_disable) |
726 | return -ENOSYS; | |
727 | ||
728 | err = smp_ops->cpu_disable(); | |
729 | if (err) | |
730 | return err; | |
731 | ||
732 | /* Update sibling maps */ | |
99d86705 | 733 | base = cpu_first_thread_sibling(cpu); |
e2075f79 | 734 | for (i = 0; i < threads_per_core; i++) { |
cc1ba8ea AB |
735 | cpumask_clear_cpu(cpu, cpu_sibling_mask(base + i)); |
736 | cpumask_clear_cpu(base + i, cpu_sibling_mask(cpu)); | |
737 | cpumask_clear_cpu(cpu, cpu_core_mask(base + i)); | |
738 | cpumask_clear_cpu(base + i, cpu_core_mask(cpu)); | |
440a0857 NL |
739 | } |
740 | ||
741 | l2_cache = cpu_to_l2cache(cpu); | |
742 | for_each_present_cpu(i) { | |
743 | struct device_node *np = cpu_to_l2cache(i); | |
744 | if (!np) | |
745 | continue; | |
746 | if (np == l2_cache) { | |
cc1ba8ea AB |
747 | cpumask_clear_cpu(cpu, cpu_core_mask(i)); |
748 | cpumask_clear_cpu(i, cpu_core_mask(cpu)); | |
440a0857 NL |
749 | } |
750 | of_node_put(np); | |
e2075f79 | 751 | } |
440a0857 NL |
752 | of_node_put(l2_cache); |
753 | ||
e2075f79 NL |
754 | |
755 | return 0; | |
1da177e4 LT |
756 | } |
757 | ||
758 | void __cpu_die(unsigned int cpu) | |
759 | { | |
760 | if (smp_ops->cpu_die) | |
761 | smp_ops->cpu_die(cpu); | |
762 | } | |
d0174c72 NF |
763 | |
764 | static DEFINE_MUTEX(powerpc_cpu_hotplug_driver_mutex); | |
765 | ||
766 | void cpu_hotplug_driver_lock() | |
767 | { | |
768 | mutex_lock(&powerpc_cpu_hotplug_driver_mutex); | |
769 | } | |
770 | ||
771 | void cpu_hotplug_driver_unlock() | |
772 | { | |
773 | mutex_unlock(&powerpc_cpu_hotplug_driver_mutex); | |
774 | } | |
abb17f9c MM |
775 | |
776 | void cpu_die(void) | |
777 | { | |
778 | if (ppc_md.cpu_die) | |
779 | ppc_md.cpu_die(); | |
fa3f82c8 BH |
780 | |
781 | /* If we return, we re-enter start_secondary */ | |
782 | start_secondary_resume(); | |
abb17f9c | 783 | } |
fa3f82c8 | 784 | |
1da177e4 | 785 | #endif |