Commit | Line | Data |
---|---|---|
9b6b563c PM |
1 | /* |
2 | * Common prep/pmac/chrp boot and setup code. | |
3 | */ | |
4 | ||
9b6b563c PM |
5 | #include <linux/module.h> |
6 | #include <linux/string.h> | |
7 | #include <linux/sched.h> | |
8 | #include <linux/init.h> | |
9 | #include <linux/kernel.h> | |
10 | #include <linux/reboot.h> | |
11 | #include <linux/delay.h> | |
12 | #include <linux/initrd.h> | |
9b6b563c PM |
13 | #include <linux/tty.h> |
14 | #include <linux/bootmem.h> | |
15 | #include <linux/seq_file.h> | |
16 | #include <linux/root_dev.h> | |
17 | #include <linux/cpu.h> | |
18 | #include <linux/console.h> | |
19 | ||
9b6b563c PM |
20 | #include <asm/io.h> |
21 | #include <asm/prom.h> | |
22 | #include <asm/processor.h> | |
23 | #include <asm/pgtable.h> | |
9b6b563c | 24 | #include <asm/setup.h> |
9b6b563c PM |
25 | #include <asm/smp.h> |
26 | #include <asm/elf.h> | |
27 | #include <asm/cputable.h> | |
28 | #include <asm/bootx.h> | |
29 | #include <asm/btext.h> | |
30 | #include <asm/machdep.h> | |
31 | #include <asm/uaccess.h> | |
32 | #include <asm/system.h> | |
33 | #include <asm/pmac_feature.h> | |
34 | #include <asm/sections.h> | |
35 | #include <asm/nvram.h> | |
36 | #include <asm/xmon.h> | |
6d7f58b0 | 37 | #include <asm/time.h> |
463ce0e1 | 38 | #include <asm/serial.h> |
51d3082f | 39 | #include <asm/udbg.h> |
9b6b563c | 40 | |
66ba135c SR |
41 | #include "setup.h" |
42 | ||
03501dab PM |
43 | #define DBG(fmt...) |
44 | ||
9b6b563c PM |
45 | #if defined CONFIG_KGDB |
46 | #include <asm/kgdb.h> | |
47 | #endif | |
48 | ||
9b6b563c PM |
49 | extern void bootx_init(unsigned long r4, unsigned long phys); |
50 | ||
80579e1f PM |
51 | int boot_cpuid; |
52 | EXPORT_SYMBOL_GPL(boot_cpuid); | |
53 | int boot_cpuid_phys; | |
54 | ||
9b6b563c PM |
55 | unsigned long ISA_DMA_THRESHOLD; |
56 | unsigned int DMA_MODE_READ; | |
57 | unsigned int DMA_MODE_WRITE; | |
58 | ||
e574d238 PM |
59 | int have_of = 1; |
60 | ||
9b6b563c PM |
61 | #ifdef CONFIG_VGA_CONSOLE |
62 | unsigned long vgacon_remap_base; | |
d003e7a1 | 63 | EXPORT_SYMBOL(vgacon_remap_base); |
9b6b563c PM |
64 | #endif |
65 | ||
9b6b563c PM |
66 | /* |
67 | * These are used in binfmt_elf.c to put aux entries on the stack | |
68 | * for each elf executable being started. | |
69 | */ | |
70 | int dcache_bsize; | |
71 | int icache_bsize; | |
72 | int ucache_bsize; | |
73 | ||
9b6b563c PM |
74 | /* |
75 | * We're called here very early in the boot. We determine the machine | |
76 | * type and call the appropriate low-level setup functions. | |
77 | * -- Cort <cort@fsmlabs.com> | |
78 | * | |
79 | * Note that the kernel may be running at an address which is different | |
80 | * from the address that it was linked at, so we must use RELOC/PTRRELOC | |
81 | * to access static data (including strings). -- paulus | |
82 | */ | |
83 | unsigned long __init early_init(unsigned long dt_ptr) | |
84 | { | |
85 | unsigned long offset = reloc_offset(); | |
42c4aaad | 86 | struct cpu_spec *spec; |
9b6b563c | 87 | |
dd184343 PM |
88 | /* First zero the BSS -- use memset_io, some platforms don't have |
89 | * caches on yet */ | |
556b09c8 MG |
90 | memset_io((void __iomem *)PTRRELOC(&__bss_start), 0, |
91 | __bss_stop - __bss_start); | |
dd184343 | 92 | |
9b6b563c PM |
93 | /* |
94 | * Identify the CPU type and fix up code sections | |
95 | * that depend on which cpu we have. | |
96 | */ | |
974a76f5 | 97 | spec = identify_cpu(offset, mfspr(SPRN_PVR)); |
42c4aaad | 98 | |
0909c8c2 | 99 | do_feature_fixups(spec->cpu_features, |
42c4aaad BH |
100 | PTRRELOC(&__start___ftr_fixup), |
101 | PTRRELOC(&__stop___ftr_fixup)); | |
9b6b563c | 102 | |
9b6b563c PM |
103 | return KERNELBASE + offset; |
104 | } | |
105 | ||
9b6b563c | 106 | |
9b6b563c PM |
107 | /* |
108 | * Find out what kind of machine we're on and save any data we need | |
109 | * from the early boot process (devtree is copied on pmac by prom_init()). | |
110 | * This is called very early on the boot process, after a minimal | |
111 | * MMU environment has been set up but before MMU_init is called. | |
112 | */ | |
113 | void __init machine_init(unsigned long dt_ptr, unsigned long phys) | |
114 | { | |
719c91cc DG |
115 | /* Enable early debugging if any specified (see udbg.h) */ |
116 | udbg_early_init(); | |
51d3082f BH |
117 | |
118 | /* Do some early initialization based on the flat device tree */ | |
9b6b563c PM |
119 | early_init_devtree(__va(dt_ptr)); |
120 | ||
e8222502 | 121 | probe_machine(); |
35499c01 | 122 | |
9b6b563c | 123 | #ifdef CONFIG_6xx |
a0652fc9 PM |
124 | if (cpu_has_feature(CPU_FTR_CAN_DOZE) || |
125 | cpu_has_feature(CPU_FTR_CAN_NAP)) | |
126 | ppc_md.power_save = ppc6xx_idle; | |
9b6b563c | 127 | #endif |
9b6b563c PM |
128 | |
129 | if (ppc_md.progress) | |
130 | ppc_md.progress("id mach(): done", 0x200); | |
131 | } | |
132 | ||
133 | #ifdef CONFIG_BOOKE_WDT | |
134 | /* Checks wdt=x and wdt_period=xx command-line option */ | |
135 | int __init early_parse_wdt(char *p) | |
136 | { | |
137 | if (p && strncmp(p, "0", 1) != 0) | |
138 | booke_wdt_enabled = 1; | |
139 | ||
140 | return 0; | |
141 | } | |
142 | early_param("wdt", early_parse_wdt); | |
143 | ||
144 | int __init early_parse_wdt_period (char *p) | |
145 | { | |
146 | if (p) | |
147 | booke_wdt_period = simple_strtoul(p, NULL, 0); | |
148 | ||
149 | return 0; | |
150 | } | |
151 | early_param("wdt_period", early_parse_wdt_period); | |
152 | #endif /* CONFIG_BOOKE_WDT */ | |
153 | ||
154 | /* Checks "l2cr=xxxx" command-line option */ | |
155 | int __init ppc_setup_l2cr(char *str) | |
156 | { | |
157 | if (cpu_has_feature(CPU_FTR_L2CR)) { | |
158 | unsigned long val = simple_strtoul(str, NULL, 0); | |
159 | printk(KERN_INFO "l2cr set to %lx\n", val); | |
160 | _set_L2CR(0); /* force invalidate by disable cache */ | |
161 | _set_L2CR(val); /* and enable it */ | |
162 | } | |
163 | return 1; | |
164 | } | |
165 | __setup("l2cr=", ppc_setup_l2cr); | |
166 | ||
a78bfbfc RB |
167 | /* Checks "l3cr=xxxx" command-line option */ |
168 | int __init ppc_setup_l3cr(char *str) | |
169 | { | |
170 | if (cpu_has_feature(CPU_FTR_L3CR)) { | |
171 | unsigned long val = simple_strtoul(str, NULL, 0); | |
172 | printk(KERN_INFO "l3cr set to %lx\n", val); | |
173 | _set_L3CR(val); /* and enable it */ | |
174 | } | |
175 | return 1; | |
176 | } | |
177 | __setup("l3cr=", ppc_setup_l3cr); | |
178 | ||
9b6b563c PM |
179 | #ifdef CONFIG_GENERIC_NVRAM |
180 | ||
181 | /* Generic nvram hooks used by drivers/char/gen_nvram.c */ | |
182 | unsigned char nvram_read_byte(int addr) | |
183 | { | |
184 | if (ppc_md.nvram_read_val) | |
185 | return ppc_md.nvram_read_val(addr); | |
186 | return 0xff; | |
187 | } | |
188 | EXPORT_SYMBOL(nvram_read_byte); | |
189 | ||
190 | void nvram_write_byte(unsigned char val, int addr) | |
191 | { | |
192 | if (ppc_md.nvram_write_val) | |
193 | ppc_md.nvram_write_val(addr, val); | |
194 | } | |
195 | EXPORT_SYMBOL(nvram_write_byte); | |
196 | ||
197 | void nvram_sync(void) | |
198 | { | |
199 | if (ppc_md.nvram_sync) | |
200 | ppc_md.nvram_sync(); | |
201 | } | |
202 | EXPORT_SYMBOL(nvram_sync); | |
203 | ||
204 | #endif /* CONFIG_NVRAM */ | |
205 | ||
5e41763a | 206 | static DEFINE_PER_CPU(struct cpu, cpu_devices); |
9b6b563c PM |
207 | |
208 | int __init ppc_init(void) | |
209 | { | |
5e41763a | 210 | int cpu; |
9b6b563c PM |
211 | |
212 | /* clear the progress line */ | |
5e41763a GP |
213 | if (ppc_md.progress) |
214 | ppc_md.progress(" ", 0xffff); | |
9b6b563c PM |
215 | |
216 | /* register CPU devices */ | |
5e41763a GP |
217 | for_each_possible_cpu(cpu) { |
218 | struct cpu *c = &per_cpu(cpu_devices, cpu); | |
219 | c->hotpluggable = 1; | |
220 | register_cpu(c, cpu); | |
221 | } | |
9b6b563c PM |
222 | |
223 | /* call platform init */ | |
224 | if (ppc_md.init != NULL) { | |
225 | ppc_md.init(); | |
226 | } | |
227 | return 0; | |
228 | } | |
229 | ||
230 | arch_initcall(ppc_init); | |
231 | ||
232 | /* Warning, IO base is not yet inited */ | |
233 | void __init setup_arch(char **cmdline_p) | |
234 | { | |
846f77b0 ME |
235 | *cmdline_p = cmd_line; |
236 | ||
9b6b563c PM |
237 | /* so udelay does something sensible, assume <= 1000 bogomips */ |
238 | loops_per_jiffy = 500000000 / HZ; | |
239 | ||
9b6b563c | 240 | unflatten_device_tree(); |
a82765b6 | 241 | check_for_initrd(); |
463ce0e1 BH |
242 | |
243 | if (ppc_md.init_early) | |
244 | ppc_md.init_early(); | |
245 | ||
463ce0e1 | 246 | find_legacy_serial_ports(); |
9b6b563c | 247 | |
5ad57078 PM |
248 | smp_setup_cpu_maps(); |
249 | ||
51d3082f BH |
250 | /* Register early console */ |
251 | register_early_udbg_console(); | |
9b6b563c | 252 | |
47679283 ME |
253 | xmon_setup(); |
254 | ||
9b6b563c PM |
255 | #if defined(CONFIG_KGDB) |
256 | if (ppc_md.kgdb_map_scc) | |
257 | ppc_md.kgdb_map_scc(); | |
258 | set_debug_traps(); | |
259 | if (strstr(cmd_line, "gdb")) { | |
260 | if (ppc_md.progress) | |
261 | ppc_md.progress("setup_arch: kgdb breakpoint", 0x4000); | |
262 | printk("kgdb breakpoint activated\n"); | |
263 | breakpoint(); | |
264 | } | |
265 | #endif | |
266 | ||
267 | /* | |
268 | * Set cache line size based on type of cpu as a default. | |
269 | * Systems with OF can look in the properties on the cpu node(s) | |
270 | * for a possibly more accurate value. | |
271 | */ | |
4508dc21 DG |
272 | dcache_bsize = cur_cpu_spec->dcache_bsize; |
273 | icache_bsize = cur_cpu_spec->icache_bsize; | |
274 | ucache_bsize = 0; | |
275 | if (cpu_has_feature(CPU_FTR_UNIFIED_ID_CACHE)) | |
276 | ucache_bsize = icache_bsize = dcache_bsize; | |
9b6b563c PM |
277 | |
278 | /* reboot on panic */ | |
279 | panic_timeout = 180; | |
280 | ||
7e990266 KG |
281 | if (ppc_md.panic) |
282 | setup_panic(); | |
283 | ||
4846c5de | 284 | init_mm.start_code = (unsigned long)_stext; |
9b6b563c PM |
285 | init_mm.end_code = (unsigned long) _etext; |
286 | init_mm.end_data = (unsigned long) _edata; | |
49b09853 | 287 | init_mm.brk = klimit; |
9b6b563c | 288 | |
9b6b563c PM |
289 | /* set up the bootmem stuff with available memory */ |
290 | do_init_bootmem(); | |
291 | if ( ppc_md.progress ) ppc_md.progress("setup_arch: bootmem", 0x3eab); | |
292 | ||
9b6b563c PM |
293 | #ifdef CONFIG_DUMMY_CONSOLE |
294 | conswitchp = &dummy_con; | |
295 | #endif | |
296 | ||
38db7e74 GL |
297 | if (ppc_md.setup_arch) |
298 | ppc_md.setup_arch(); | |
9b6b563c PM |
299 | if ( ppc_md.progress ) ppc_md.progress("arch: exit", 0x3eab); |
300 | ||
301 | paging_init(); | |
9b6b563c | 302 | } |