[POWERPC] bootwrapper: Make ft_create_node() pay attention to the parent parameter.
[GitHub/mt8127/android_kernel_alcatel_ttab.git] / arch / powerpc / kernel / setup_32.c
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1/*
2 * Common prep/pmac/chrp boot and setup code.
3 */
4
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5#include <linux/module.h>
6#include <linux/string.h>
7#include <linux/sched.h>
8#include <linux/init.h>
9#include <linux/kernel.h>
10#include <linux/reboot.h>
11#include <linux/delay.h>
12#include <linux/initrd.h>
13#include <linux/ide.h>
14#include <linux/tty.h>
15#include <linux/bootmem.h>
16#include <linux/seq_file.h>
17#include <linux/root_dev.h>
18#include <linux/cpu.h>
19#include <linux/console.h>
20
21#include <asm/residual.h>
22#include <asm/io.h>
23#include <asm/prom.h>
24#include <asm/processor.h>
25#include <asm/pgtable.h>
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26#include <asm/setup.h>
27#include <asm/amigappc.h>
28#include <asm/smp.h>
29#include <asm/elf.h>
30#include <asm/cputable.h>
31#include <asm/bootx.h>
32#include <asm/btext.h>
33#include <asm/machdep.h>
34#include <asm/uaccess.h>
35#include <asm/system.h>
36#include <asm/pmac_feature.h>
37#include <asm/sections.h>
38#include <asm/nvram.h>
39#include <asm/xmon.h>
6d7f58b0 40#include <asm/time.h>
463ce0e1 41#include <asm/serial.h>
51d3082f 42#include <asm/udbg.h>
9b6b563c 43
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44#include "setup.h"
45
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46#define DBG(fmt...)
47
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48#if defined CONFIG_KGDB
49#include <asm/kgdb.h>
50#endif
51
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52extern void bootx_init(unsigned long r4, unsigned long phys);
53
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54struct ide_machdep_calls ppc_ide_md;
55
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56int boot_cpuid;
57EXPORT_SYMBOL_GPL(boot_cpuid);
58int boot_cpuid_phys;
59
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60unsigned long ISA_DMA_THRESHOLD;
61unsigned int DMA_MODE_READ;
62unsigned int DMA_MODE_WRITE;
63
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64int have_of = 1;
65
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66#ifdef CONFIG_VGA_CONSOLE
67unsigned long vgacon_remap_base;
d003e7a1 68EXPORT_SYMBOL(vgacon_remap_base);
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69#endif
70
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71/*
72 * These are used in binfmt_elf.c to put aux entries on the stack
73 * for each elf executable being started.
74 */
75int dcache_bsize;
76int icache_bsize;
77int ucache_bsize;
78
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79/*
80 * We're called here very early in the boot. We determine the machine
81 * type and call the appropriate low-level setup functions.
82 * -- Cort <cort@fsmlabs.com>
83 *
84 * Note that the kernel may be running at an address which is different
85 * from the address that it was linked at, so we must use RELOC/PTRRELOC
86 * to access static data (including strings). -- paulus
87 */
88unsigned long __init early_init(unsigned long dt_ptr)
89{
90 unsigned long offset = reloc_offset();
42c4aaad 91 struct cpu_spec *spec;
9b6b563c 92
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93 /* First zero the BSS -- use memset_io, some platforms don't have
94 * caches on yet */
af308377 95 memset_io((void __iomem *)PTRRELOC(&__bss_start), 0, _end - __bss_start);
dd184343 96
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97 /*
98 * Identify the CPU type and fix up code sections
99 * that depend on which cpu we have.
100 */
974a76f5 101 spec = identify_cpu(offset, mfspr(SPRN_PVR));
42c4aaad 102
0909c8c2 103 do_feature_fixups(spec->cpu_features,
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104 PTRRELOC(&__start___ftr_fixup),
105 PTRRELOC(&__stop___ftr_fixup));
9b6b563c 106
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107 return KERNELBASE + offset;
108}
109
9b6b563c 110
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111/*
112 * Find out what kind of machine we're on and save any data we need
113 * from the early boot process (devtree is copied on pmac by prom_init()).
114 * This is called very early on the boot process, after a minimal
115 * MMU environment has been set up but before MMU_init is called.
116 */
117void __init machine_init(unsigned long dt_ptr, unsigned long phys)
118{
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119 /* Enable early debugging if any specified (see udbg.h) */
120 udbg_early_init();
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121
122 /* Do some early initialization based on the flat device tree */
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123 early_init_devtree(__va(dt_ptr));
124
e8222502 125 probe_machine();
35499c01 126
9b6b563c 127#ifdef CONFIG_6xx
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128 if (cpu_has_feature(CPU_FTR_CAN_DOZE) ||
129 cpu_has_feature(CPU_FTR_CAN_NAP))
130 ppc_md.power_save = ppc6xx_idle;
9b6b563c 131#endif
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132
133 if (ppc_md.progress)
134 ppc_md.progress("id mach(): done", 0x200);
135}
136
137#ifdef CONFIG_BOOKE_WDT
138/* Checks wdt=x and wdt_period=xx command-line option */
139int __init early_parse_wdt(char *p)
140{
141 if (p && strncmp(p, "0", 1) != 0)
142 booke_wdt_enabled = 1;
143
144 return 0;
145}
146early_param("wdt", early_parse_wdt);
147
148int __init early_parse_wdt_period (char *p)
149{
150 if (p)
151 booke_wdt_period = simple_strtoul(p, NULL, 0);
152
153 return 0;
154}
155early_param("wdt_period", early_parse_wdt_period);
156#endif /* CONFIG_BOOKE_WDT */
157
158/* Checks "l2cr=xxxx" command-line option */
159int __init ppc_setup_l2cr(char *str)
160{
161 if (cpu_has_feature(CPU_FTR_L2CR)) {
162 unsigned long val = simple_strtoul(str, NULL, 0);
163 printk(KERN_INFO "l2cr set to %lx\n", val);
164 _set_L2CR(0); /* force invalidate by disable cache */
165 _set_L2CR(val); /* and enable it */
166 }
167 return 1;
168}
169__setup("l2cr=", ppc_setup_l2cr);
170
171#ifdef CONFIG_GENERIC_NVRAM
172
173/* Generic nvram hooks used by drivers/char/gen_nvram.c */
174unsigned char nvram_read_byte(int addr)
175{
176 if (ppc_md.nvram_read_val)
177 return ppc_md.nvram_read_val(addr);
178 return 0xff;
179}
180EXPORT_SYMBOL(nvram_read_byte);
181
182void nvram_write_byte(unsigned char val, int addr)
183{
184 if (ppc_md.nvram_write_val)
185 ppc_md.nvram_write_val(addr, val);
186}
187EXPORT_SYMBOL(nvram_write_byte);
188
189void nvram_sync(void)
190{
191 if (ppc_md.nvram_sync)
192 ppc_md.nvram_sync();
193}
194EXPORT_SYMBOL(nvram_sync);
195
196#endif /* CONFIG_NVRAM */
197
198static struct cpu cpu_devices[NR_CPUS];
199
200int __init ppc_init(void)
201{
202 int i;
203
204 /* clear the progress line */
205 if ( ppc_md.progress ) ppc_md.progress(" ", 0xffff);
206
207 /* register CPU devices */
0e551954 208 for_each_possible_cpu(i)
76b67ed9 209 register_cpu(&cpu_devices[i], i);
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210
211 /* call platform init */
212 if (ppc_md.init != NULL) {
213 ppc_md.init();
214 }
215 return 0;
216}
217
218arch_initcall(ppc_init);
219
220/* Warning, IO base is not yet inited */
221void __init setup_arch(char **cmdline_p)
222{
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223 *cmdline_p = cmd_line;
224
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225 /* so udelay does something sensible, assume <= 1000 bogomips */
226 loops_per_jiffy = 500000000 / HZ;
227
9b6b563c 228 unflatten_device_tree();
a82765b6 229 check_for_initrd();
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230
231 if (ppc_md.init_early)
232 ppc_md.init_early();
233
463ce0e1 234 find_legacy_serial_ports();
9b6b563c 235
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236 smp_setup_cpu_maps();
237
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238 /* Register early console */
239 register_early_udbg_console();
9b6b563c 240
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241 xmon_setup();
242
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243#if defined(CONFIG_KGDB)
244 if (ppc_md.kgdb_map_scc)
245 ppc_md.kgdb_map_scc();
246 set_debug_traps();
247 if (strstr(cmd_line, "gdb")) {
248 if (ppc_md.progress)
249 ppc_md.progress("setup_arch: kgdb breakpoint", 0x4000);
250 printk("kgdb breakpoint activated\n");
251 breakpoint();
252 }
253#endif
254
255 /*
256 * Set cache line size based on type of cpu as a default.
257 * Systems with OF can look in the properties on the cpu node(s)
258 * for a possibly more accurate value.
259 */
260 if (cpu_has_feature(CPU_FTR_SPLIT_ID_CACHE)) {
261 dcache_bsize = cur_cpu_spec->dcache_bsize;
262 icache_bsize = cur_cpu_spec->icache_bsize;
263 ucache_bsize = 0;
264 } else
265 ucache_bsize = dcache_bsize = icache_bsize
266 = cur_cpu_spec->dcache_bsize;
267
268 /* reboot on panic */
269 panic_timeout = 180;
270
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271 if (ppc_md.panic)
272 setup_panic();
273
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274 init_mm.start_code = PAGE_OFFSET;
275 init_mm.end_code = (unsigned long) _etext;
276 init_mm.end_data = (unsigned long) _edata;
49b09853 277 init_mm.brk = klimit;
9b6b563c 278
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279 /* set up the bootmem stuff with available memory */
280 do_init_bootmem();
281 if ( ppc_md.progress ) ppc_md.progress("setup_arch: bootmem", 0x3eab);
282
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283#ifdef CONFIG_DUMMY_CONSOLE
284 conswitchp = &dummy_con;
285#endif
286
287 ppc_md.setup_arch();
288 if ( ppc_md.progress ) ppc_md.progress("arch: exit", 0x3eab);
289
290 paging_init();
9b6b563c 291}