[PATCH] nvram_print_partitions cosmetic fixup
[GitHub/mt8127/android_kernel_alcatel_ttab.git] / arch / powerpc / kernel / setup_32.c
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1/*
2 * Common prep/pmac/chrp boot and setup code.
3 */
4
5#include <linux/config.h>
6#include <linux/module.h>
7#include <linux/string.h>
8#include <linux/sched.h>
9#include <linux/init.h>
10#include <linux/kernel.h>
11#include <linux/reboot.h>
12#include <linux/delay.h>
13#include <linux/initrd.h>
14#include <linux/ide.h>
15#include <linux/tty.h>
16#include <linux/bootmem.h>
17#include <linux/seq_file.h>
18#include <linux/root_dev.h>
19#include <linux/cpu.h>
20#include <linux/console.h>
21
22#include <asm/residual.h>
23#include <asm/io.h>
24#include <asm/prom.h>
25#include <asm/processor.h>
26#include <asm/pgtable.h>
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27#include <asm/setup.h>
28#include <asm/amigappc.h>
29#include <asm/smp.h>
30#include <asm/elf.h>
31#include <asm/cputable.h>
32#include <asm/bootx.h>
33#include <asm/btext.h>
34#include <asm/machdep.h>
35#include <asm/uaccess.h>
36#include <asm/system.h>
37#include <asm/pmac_feature.h>
38#include <asm/sections.h>
39#include <asm/nvram.h>
40#include <asm/xmon.h>
6d7f58b0 41#include <asm/time.h>
463ce0e1 42#include <asm/serial.h>
51d3082f 43#include <asm/udbg.h>
9b6b563c 44
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45#include "setup.h"
46
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47#define DBG(fmt...)
48
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49#if defined CONFIG_KGDB
50#include <asm/kgdb.h>
51#endif
52
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53extern void bootx_init(unsigned long r4, unsigned long phys);
54
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55boot_infos_t *boot_infos;
56struct ide_machdep_calls ppc_ide_md;
57
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58int boot_cpuid;
59EXPORT_SYMBOL_GPL(boot_cpuid);
60int boot_cpuid_phys;
61
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62unsigned long ISA_DMA_THRESHOLD;
63unsigned int DMA_MODE_READ;
64unsigned int DMA_MODE_WRITE;
65
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66int have_of = 1;
67
9b6b563c 68#ifdef CONFIG_PPC_MULTIPLATFORM
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69dev_t boot_dev;
70#endif /* CONFIG_PPC_MULTIPLATFORM */
71
72#ifdef CONFIG_MAGIC_SYSRQ
73unsigned long SYSRQ_KEY = 0x54;
74#endif /* CONFIG_MAGIC_SYSRQ */
75
76#ifdef CONFIG_VGA_CONSOLE
77unsigned long vgacon_remap_base;
78#endif
79
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80/*
81 * These are used in binfmt_elf.c to put aux entries on the stack
82 * for each elf executable being started.
83 */
84int dcache_bsize;
85int icache_bsize;
86int ucache_bsize;
87
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88/*
89 * We're called here very early in the boot. We determine the machine
90 * type and call the appropriate low-level setup functions.
91 * -- Cort <cort@fsmlabs.com>
92 *
93 * Note that the kernel may be running at an address which is different
94 * from the address that it was linked at, so we must use RELOC/PTRRELOC
95 * to access static data (including strings). -- paulus
96 */
97unsigned long __init early_init(unsigned long dt_ptr)
98{
99 unsigned long offset = reloc_offset();
100
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101 /* First zero the BSS -- use memset_io, some platforms don't have
102 * caches on yet */
af308377 103 memset_io((void __iomem *)PTRRELOC(&__bss_start), 0, _end - __bss_start);
dd184343 104
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105 /*
106 * Identify the CPU type and fix up code sections
107 * that depend on which cpu we have.
108 */
109 identify_cpu(offset, 0);
110 do_cpu_ftr_fixups(offset);
111
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112 return KERNELBASE + offset;
113}
114
9b6b563c 115
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116/*
117 * Find out what kind of machine we're on and save any data we need
118 * from the early boot process (devtree is copied on pmac by prom_init()).
119 * This is called very early on the boot process, after a minimal
120 * MMU environment has been set up but before MMU_init is called.
121 */
122void __init machine_init(unsigned long dt_ptr, unsigned long phys)
123{
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124 /* If btext is enabled, we might have a BAT setup for early display,
125 * thus we do enable some very basic udbg output
126 */
127#ifdef CONFIG_BOOTX_TEXT
128 udbg_putc = btext_drawchar;
129#endif
130
131 /* Do some early initialization based on the flat device tree */
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132 early_init_devtree(__va(dt_ptr));
133
51d3082f 134 /* Check default command line */
9b6b563c 135#ifdef CONFIG_CMDLINE
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136 if (cmd_line[0] == 0)
137 strlcpy(cmd_line, CONFIG_CMDLINE, sizeof(cmd_line));
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138#endif /* CONFIG_CMDLINE */
139
e8222502 140 probe_machine();
35499c01 141
9b6b563c 142#ifdef CONFIG_6xx
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143 if (cpu_has_feature(CPU_FTR_CAN_DOZE) ||
144 cpu_has_feature(CPU_FTR_CAN_NAP))
145 ppc_md.power_save = ppc6xx_idle;
9b6b563c 146#endif
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147
148 if (ppc_md.progress)
149 ppc_md.progress("id mach(): done", 0x200);
150}
151
152#ifdef CONFIG_BOOKE_WDT
153/* Checks wdt=x and wdt_period=xx command-line option */
154int __init early_parse_wdt(char *p)
155{
156 if (p && strncmp(p, "0", 1) != 0)
157 booke_wdt_enabled = 1;
158
159 return 0;
160}
161early_param("wdt", early_parse_wdt);
162
163int __init early_parse_wdt_period (char *p)
164{
165 if (p)
166 booke_wdt_period = simple_strtoul(p, NULL, 0);
167
168 return 0;
169}
170early_param("wdt_period", early_parse_wdt_period);
171#endif /* CONFIG_BOOKE_WDT */
172
173/* Checks "l2cr=xxxx" command-line option */
174int __init ppc_setup_l2cr(char *str)
175{
176 if (cpu_has_feature(CPU_FTR_L2CR)) {
177 unsigned long val = simple_strtoul(str, NULL, 0);
178 printk(KERN_INFO "l2cr set to %lx\n", val);
179 _set_L2CR(0); /* force invalidate by disable cache */
180 _set_L2CR(val); /* and enable it */
181 }
182 return 1;
183}
184__setup("l2cr=", ppc_setup_l2cr);
185
186#ifdef CONFIG_GENERIC_NVRAM
187
188/* Generic nvram hooks used by drivers/char/gen_nvram.c */
189unsigned char nvram_read_byte(int addr)
190{
191 if (ppc_md.nvram_read_val)
192 return ppc_md.nvram_read_val(addr);
193 return 0xff;
194}
195EXPORT_SYMBOL(nvram_read_byte);
196
197void nvram_write_byte(unsigned char val, int addr)
198{
199 if (ppc_md.nvram_write_val)
200 ppc_md.nvram_write_val(addr, val);
201}
202EXPORT_SYMBOL(nvram_write_byte);
203
204void nvram_sync(void)
205{
206 if (ppc_md.nvram_sync)
207 ppc_md.nvram_sync();
208}
209EXPORT_SYMBOL(nvram_sync);
210
211#endif /* CONFIG_NVRAM */
212
213static struct cpu cpu_devices[NR_CPUS];
214
215int __init ppc_init(void)
216{
217 int i;
218
219 /* clear the progress line */
220 if ( ppc_md.progress ) ppc_md.progress(" ", 0xffff);
221
222 /* register CPU devices */
0e551954 223 for_each_possible_cpu(i)
394e3902 224 register_cpu(&cpu_devices[i], i, NULL);
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225
226 /* call platform init */
227 if (ppc_md.init != NULL) {
228 ppc_md.init();
229 }
230 return 0;
231}
232
233arch_initcall(ppc_init);
234
235/* Warning, IO base is not yet inited */
236void __init setup_arch(char **cmdline_p)
237{
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238 extern void do_init_bootmem(void);
239
240 /* so udelay does something sensible, assume <= 1000 bogomips */
241 loops_per_jiffy = 500000000 / HZ;
242
9b6b563c 243 unflatten_device_tree();
a82765b6 244 check_for_initrd();
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245
246 if (ppc_md.init_early)
247 ppc_md.init_early();
248
463ce0e1 249 find_legacy_serial_ports();
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250 finish_device_tree();
251
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252 smp_setup_cpu_maps();
253
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254#ifdef CONFIG_XMON_DEFAULT
255 xmon_init(1);
256#endif
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257 /* Register early console */
258 register_early_udbg_console();
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259
260#if defined(CONFIG_KGDB)
261 if (ppc_md.kgdb_map_scc)
262 ppc_md.kgdb_map_scc();
263 set_debug_traps();
264 if (strstr(cmd_line, "gdb")) {
265 if (ppc_md.progress)
266 ppc_md.progress("setup_arch: kgdb breakpoint", 0x4000);
267 printk("kgdb breakpoint activated\n");
268 breakpoint();
269 }
270#endif
271
272 /*
273 * Set cache line size based on type of cpu as a default.
274 * Systems with OF can look in the properties on the cpu node(s)
275 * for a possibly more accurate value.
276 */
277 if (cpu_has_feature(CPU_FTR_SPLIT_ID_CACHE)) {
278 dcache_bsize = cur_cpu_spec->dcache_bsize;
279 icache_bsize = cur_cpu_spec->icache_bsize;
280 ucache_bsize = 0;
281 } else
282 ucache_bsize = dcache_bsize = icache_bsize
283 = cur_cpu_spec->dcache_bsize;
284
285 /* reboot on panic */
286 panic_timeout = 180;
287
288 init_mm.start_code = PAGE_OFFSET;
289 init_mm.end_code = (unsigned long) _etext;
290 init_mm.end_data = (unsigned long) _edata;
49b09853 291 init_mm.brk = klimit;
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292
293 /* Save unparsed command line copy for /proc/cmdline */
294 strlcpy(saved_command_line, cmd_line, COMMAND_LINE_SIZE);
295 *cmdline_p = cmd_line;
296
297 parse_early_param();
298
299 /* set up the bootmem stuff with available memory */
300 do_init_bootmem();
301 if ( ppc_md.progress ) ppc_md.progress("setup_arch: bootmem", 0x3eab);
302
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303#ifdef CONFIG_DUMMY_CONSOLE
304 conswitchp = &dummy_con;
305#endif
306
307 ppc_md.setup_arch();
308 if ( ppc_md.progress ) ppc_md.progress("arch: exit", 0x3eab);
309
310 paging_init();
9b6b563c 311}