[PATCH] for_each_possible_cpu: powerpc
[GitHub/mt8127/android_kernel_alcatel_ttab.git] / arch / powerpc / kernel / setup_32.c
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1/*
2 * Common prep/pmac/chrp boot and setup code.
3 */
4
5#include <linux/config.h>
6#include <linux/module.h>
7#include <linux/string.h>
8#include <linux/sched.h>
9#include <linux/init.h>
10#include <linux/kernel.h>
11#include <linux/reboot.h>
12#include <linux/delay.h>
13#include <linux/initrd.h>
14#include <linux/ide.h>
15#include <linux/tty.h>
16#include <linux/bootmem.h>
17#include <linux/seq_file.h>
18#include <linux/root_dev.h>
19#include <linux/cpu.h>
20#include <linux/console.h>
21
22#include <asm/residual.h>
23#include <asm/io.h>
24#include <asm/prom.h>
25#include <asm/processor.h>
26#include <asm/pgtable.h>
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27#include <asm/setup.h>
28#include <asm/amigappc.h>
29#include <asm/smp.h>
30#include <asm/elf.h>
31#include <asm/cputable.h>
32#include <asm/bootx.h>
33#include <asm/btext.h>
34#include <asm/machdep.h>
35#include <asm/uaccess.h>
36#include <asm/system.h>
37#include <asm/pmac_feature.h>
38#include <asm/sections.h>
39#include <asm/nvram.h>
40#include <asm/xmon.h>
6d7f58b0 41#include <asm/time.h>
463ce0e1 42#include <asm/serial.h>
51d3082f 43#include <asm/udbg.h>
9b6b563c 44
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45#include "setup.h"
46
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47#define DBG(fmt...)
48
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49#if defined CONFIG_KGDB
50#include <asm/kgdb.h>
51#endif
52
53extern void platform_init(void);
54extern void bootx_init(unsigned long r4, unsigned long phys);
55
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56boot_infos_t *boot_infos;
57struct ide_machdep_calls ppc_ide_md;
58
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59int boot_cpuid;
60EXPORT_SYMBOL_GPL(boot_cpuid);
61int boot_cpuid_phys;
62
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63unsigned long ISA_DMA_THRESHOLD;
64unsigned int DMA_MODE_READ;
65unsigned int DMA_MODE_WRITE;
66
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67int have_of = 1;
68
9b6b563c 69#ifdef CONFIG_PPC_MULTIPLATFORM
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70dev_t boot_dev;
71#endif /* CONFIG_PPC_MULTIPLATFORM */
72
73#ifdef CONFIG_MAGIC_SYSRQ
74unsigned long SYSRQ_KEY = 0x54;
75#endif /* CONFIG_MAGIC_SYSRQ */
76
77#ifdef CONFIG_VGA_CONSOLE
78unsigned long vgacon_remap_base;
79#endif
80
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81/*
82 * These are used in binfmt_elf.c to put aux entries on the stack
83 * for each elf executable being started.
84 */
85int dcache_bsize;
86int icache_bsize;
87int ucache_bsize;
88
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89/*
90 * We're called here very early in the boot. We determine the machine
91 * type and call the appropriate low-level setup functions.
92 * -- Cort <cort@fsmlabs.com>
93 *
94 * Note that the kernel may be running at an address which is different
95 * from the address that it was linked at, so we must use RELOC/PTRRELOC
96 * to access static data (including strings). -- paulus
97 */
98unsigned long __init early_init(unsigned long dt_ptr)
99{
100 unsigned long offset = reloc_offset();
101
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102 /* First zero the BSS -- use memset_io, some platforms don't have
103 * caches on yet */
af308377 104 memset_io((void __iomem *)PTRRELOC(&__bss_start), 0, _end - __bss_start);
dd184343 105
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106 /*
107 * Identify the CPU type and fix up code sections
108 * that depend on which cpu we have.
109 */
110 identify_cpu(offset, 0);
111 do_cpu_ftr_fixups(offset);
112
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113 return KERNELBASE + offset;
114}
115
9b6b563c 116
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117/*
118 * Find out what kind of machine we're on and save any data we need
119 * from the early boot process (devtree is copied on pmac by prom_init()).
120 * This is called very early on the boot process, after a minimal
121 * MMU environment has been set up but before MMU_init is called.
122 */
123void __init machine_init(unsigned long dt_ptr, unsigned long phys)
124{
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125 /* If btext is enabled, we might have a BAT setup for early display,
126 * thus we do enable some very basic udbg output
127 */
128#ifdef CONFIG_BOOTX_TEXT
129 udbg_putc = btext_drawchar;
130#endif
131
132 /* Do some early initialization based on the flat device tree */
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133 early_init_devtree(__va(dt_ptr));
134
51d3082f 135 /* Check default command line */
9b6b563c 136#ifdef CONFIG_CMDLINE
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137 if (cmd_line[0] == 0)
138 strlcpy(cmd_line, CONFIG_CMDLINE, sizeof(cmd_line));
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139#endif /* CONFIG_CMDLINE */
140
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141#ifdef CONFIG_PPC_MULTIPLATFORM
142 probe_machine();
143#else
144 /* Base init based on machine type. Obsoloete, please kill ! */
35499c01 145 platform_init();
e8222502 146#endif
35499c01 147
9b6b563c 148#ifdef CONFIG_6xx
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149 if (cpu_has_feature(CPU_FTR_CAN_DOZE) ||
150 cpu_has_feature(CPU_FTR_CAN_NAP))
151 ppc_md.power_save = ppc6xx_idle;
9b6b563c 152#endif
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153
154 if (ppc_md.progress)
155 ppc_md.progress("id mach(): done", 0x200);
156}
157
158#ifdef CONFIG_BOOKE_WDT
159/* Checks wdt=x and wdt_period=xx command-line option */
160int __init early_parse_wdt(char *p)
161{
162 if (p && strncmp(p, "0", 1) != 0)
163 booke_wdt_enabled = 1;
164
165 return 0;
166}
167early_param("wdt", early_parse_wdt);
168
169int __init early_parse_wdt_period (char *p)
170{
171 if (p)
172 booke_wdt_period = simple_strtoul(p, NULL, 0);
173
174 return 0;
175}
176early_param("wdt_period", early_parse_wdt_period);
177#endif /* CONFIG_BOOKE_WDT */
178
179/* Checks "l2cr=xxxx" command-line option */
180int __init ppc_setup_l2cr(char *str)
181{
182 if (cpu_has_feature(CPU_FTR_L2CR)) {
183 unsigned long val = simple_strtoul(str, NULL, 0);
184 printk(KERN_INFO "l2cr set to %lx\n", val);
185 _set_L2CR(0); /* force invalidate by disable cache */
186 _set_L2CR(val); /* and enable it */
187 }
188 return 1;
189}
190__setup("l2cr=", ppc_setup_l2cr);
191
192#ifdef CONFIG_GENERIC_NVRAM
193
194/* Generic nvram hooks used by drivers/char/gen_nvram.c */
195unsigned char nvram_read_byte(int addr)
196{
197 if (ppc_md.nvram_read_val)
198 return ppc_md.nvram_read_val(addr);
199 return 0xff;
200}
201EXPORT_SYMBOL(nvram_read_byte);
202
203void nvram_write_byte(unsigned char val, int addr)
204{
205 if (ppc_md.nvram_write_val)
206 ppc_md.nvram_write_val(addr, val);
207}
208EXPORT_SYMBOL(nvram_write_byte);
209
210void nvram_sync(void)
211{
212 if (ppc_md.nvram_sync)
213 ppc_md.nvram_sync();
214}
215EXPORT_SYMBOL(nvram_sync);
216
217#endif /* CONFIG_NVRAM */
218
219static struct cpu cpu_devices[NR_CPUS];
220
221int __init ppc_init(void)
222{
223 int i;
224
225 /* clear the progress line */
226 if ( ppc_md.progress ) ppc_md.progress(" ", 0xffff);
227
228 /* register CPU devices */
0e551954 229 for_each_possible_cpu(i)
394e3902 230 register_cpu(&cpu_devices[i], i, NULL);
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231
232 /* call platform init */
233 if (ppc_md.init != NULL) {
234 ppc_md.init();
235 }
236 return 0;
237}
238
239arch_initcall(ppc_init);
240
241/* Warning, IO base is not yet inited */
242void __init setup_arch(char **cmdline_p)
243{
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244 extern void do_init_bootmem(void);
245
246 /* so udelay does something sensible, assume <= 1000 bogomips */
247 loops_per_jiffy = 500000000 / HZ;
248
9b6b563c 249 unflatten_device_tree();
a82765b6 250 check_for_initrd();
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251
252 if (ppc_md.init_early)
253 ppc_md.init_early();
254
463ce0e1 255 find_legacy_serial_ports();
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256 finish_device_tree();
257
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258 smp_setup_cpu_maps();
259
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260#ifdef CONFIG_XMON_DEFAULT
261 xmon_init(1);
262#endif
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263 /* Register early console */
264 register_early_udbg_console();
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265
266#if defined(CONFIG_KGDB)
267 if (ppc_md.kgdb_map_scc)
268 ppc_md.kgdb_map_scc();
269 set_debug_traps();
270 if (strstr(cmd_line, "gdb")) {
271 if (ppc_md.progress)
272 ppc_md.progress("setup_arch: kgdb breakpoint", 0x4000);
273 printk("kgdb breakpoint activated\n");
274 breakpoint();
275 }
276#endif
277
278 /*
279 * Set cache line size based on type of cpu as a default.
280 * Systems with OF can look in the properties on the cpu node(s)
281 * for a possibly more accurate value.
282 */
283 if (cpu_has_feature(CPU_FTR_SPLIT_ID_CACHE)) {
284 dcache_bsize = cur_cpu_spec->dcache_bsize;
285 icache_bsize = cur_cpu_spec->icache_bsize;
286 ucache_bsize = 0;
287 } else
288 ucache_bsize = dcache_bsize = icache_bsize
289 = cur_cpu_spec->dcache_bsize;
290
291 /* reboot on panic */
292 panic_timeout = 180;
293
294 init_mm.start_code = PAGE_OFFSET;
295 init_mm.end_code = (unsigned long) _etext;
296 init_mm.end_data = (unsigned long) _edata;
49b09853 297 init_mm.brk = klimit;
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298
299 /* Save unparsed command line copy for /proc/cmdline */
300 strlcpy(saved_command_line, cmd_line, COMMAND_LINE_SIZE);
301 *cmdline_p = cmd_line;
302
303 parse_early_param();
304
305 /* set up the bootmem stuff with available memory */
306 do_init_bootmem();
307 if ( ppc_md.progress ) ppc_md.progress("setup_arch: bootmem", 0x3eab);
308
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309#ifdef CONFIG_DUMMY_CONSOLE
310 conswitchp = &dummy_con;
311#endif
312
313 ppc_md.setup_arch();
314 if ( ppc_md.progress ) ppc_md.progress("arch: exit", 0x3eab);
315
316 paging_init();
9b6b563c 317}