[GitHub/mt8127/android_kernel_alcatel_ttab.git] / arch / powerpc / kernel / pmc.c

/*
 *  arch/powerpc/kernel/pmc.c
 *
 *  Copyright (C) 2004 David Gibson, IBM Corporation.
 *  Includes code formerly from arch/ppc/kernel/perfmon.c:
 *    Author: Andy Fleming
 *    Copyright (c) 2004 Freescale Semiconductor, Inc
 *
 *  This program is free software; you can redistribute it and/or
 *  modify it under the terms of the GNU General Public License
 *  as published by the Free Software Foundation; either version
 *  2 of the License, or (at your option) any later version.
 */

#include <linux/errno.h>
#include <linux/spinlock.h>
#include <linux/module.h>

#include <asm/processor.h>
#include <asm/pmc.h>

#ifndef MMCR0_PMA0
#define MMCR0_PMA0	0
#endif

static void dummy_perf(struct pt_regs *regs)
{
#if defined(CONFIG_FSL_BOOKE) && !defined(CONFIG_E200)
	mtpmr(PMRN_PMGC0, mfpmr(PMRN_PMGC0) & ~PMGC0_PMIE);
#elif defined(CONFIG_PPC64) || defined(CONFIG_6xx)
	mtspr(SPRN_MMCR0, mfspr(SPRN_MMCR0) & ~(MMCR0_PMXE|MMCR0_PMA0));
#else
	mtspr(SPRN_MMCR0, mfspr(SPRN_MMCR0) & ~MMCR0_PMXE);
#endif
}


static DEFINE_SPINLOCK(pmc_owner_lock);
static void *pmc_owner_caller; /* mostly for debugging */
perf_irq_t perf_irq = dummy_perf;

int reserve_pmc_hardware(perf_irq_t new_perf_irq)
{
	int err = 0;

	spin_lock(&pmc_owner_lock);

	if (pmc_owner_caller) {
		printk(KERN_WARNING "reserve_pmc_hardware: "
		       "PMC hardware busy (reserved by caller %p)\n",
		       pmc_owner_caller);
		err = -EBUSY;
		goto out;
	}

	pmc_owner_caller = __builtin_return_address(0);
	perf_irq = new_perf_irq ? new_perf_irq : dummy_perf;

 out:
	spin_unlock(&pmc_owner_lock);
	return err;
}
EXPORT_SYMBOL_GPL(reserve_pmc_hardware);

void release_pmc_hardware(void)
{
	spin_lock(&pmc_owner_lock);

	WARN_ON(! pmc_owner_caller);

	pmc_owner_caller = NULL;
	perf_irq = dummy_perf;

	spin_unlock(&pmc_owner_lock);
}
EXPORT_SYMBOL_GPL(release_pmc_hardware);

#ifdef CONFIG_PPC64
void power4_enable_pmcs(void)
{
	unsigned long hid0;

	hid0 = mfspr(SPRN_HID0);
	hid0 |= 1UL << (63 - 20);

	/* POWER4 requires the following sequence */
	asm volatile(
		"sync\n"
		"mtspr     %1, %0\n"
		"mfspr     %0, %1\n"
		"mfspr     %0, %1\n"
		"mfspr     %0, %1\n"
		"mfspr     %0, %1\n"
		"mfspr     %0, %1\n"
		"mfspr     %0, %1\n"
		"isync" : "=&r" (hid0) : "i" (SPRN_HID0), "0" (hid0):
		"memory");
}
#endif /* CONFIG_PPC64 */
Commit	Line	Data
1da177e4	1	/*
f7f6f4fe	2	* arch/powerpc/kernel/pmc.c
1da177e4 LT	3	*
1da177e4 LT	4	* Copyright (C) 2004 David Gibson, IBM Corporation.
f7f6f4fe DG	5	* Includes code formerly from arch/ppc/kernel/perfmon.c:
	6	* Author: Andy Fleming
	7	* Copyright (c) 2004 Freescale Semiconductor, Inc
1da177e4 LT	8	*
	9	* This program is free software; you can redistribute it and/or
	10	* modify it under the terms of the GNU General Public License
	11	* as published by the Free Software Foundation; either version
	12	* 2 of the License, or (at your option) any later version.
	13	*/
	14
1da177e4 LT	15	#include <linux/errno.h>
	16	#include <linux/spinlock.h>
	17	#include <linux/module.h>
	18
	19	#include <asm/processor.h>
	20	#include <asm/pmc.h>
	21
1bd2e5ae OJ	22	#ifndef MMCR0_PMA0
1bd2e5ae OJ	23	#define MMCR0_PMA0 0
f7f6f4fe DG	24	#endif
f7f6f4fe DG	25
1da177e4 LT	26	static void dummy_perf(struct pt_regs *regs)
1da177e4 LT	27	{
1bd2e5ae OJ	28	#if defined(CONFIG_FSL_BOOKE) && !defined(CONFIG_E200)
	29	mtpmr(PMRN_PMGC0, mfpmr(PMRN_PMGC0) & ~PMGC0_PMIE);
	30	#elif defined(CONFIG_PPC64) \|\| defined(CONFIG_6xx)
	31	mtspr(SPRN_MMCR0, mfspr(SPRN_MMCR0) & ~(MMCR0_PMXE\|MMCR0_PMA0));
f7f6f4fe	32	#else
1bd2e5ae	33	mtspr(SPRN_MMCR0, mfspr(SPRN_MMCR0) & ~MMCR0_PMXE);
f7f6f4fe	34	#endif
1bd2e5ae OJ	35	}
1bd2e5ae OJ	36
1da177e4	37
a9f6a0dd	38	static DEFINE_SPINLOCK(pmc_owner_lock);
1da177e4 LT	39	static void pmc_owner_caller; / mostly for debugging */
	40	perf_irq_t perf_irq = dummy_perf;
	41
	42	int reserve_pmc_hardware(perf_irq_t new_perf_irq)
	43	{
	44	int err = 0;
	45
	46	spin_lock(&pmc_owner_lock);
	47
	48	if (pmc_owner_caller) {
	49	printk(KERN_WARNING "reserve_pmc_hardware: "
	50	"PMC hardware busy (reserved by caller %p)\n",
	51	pmc_owner_caller);
	52	err = -EBUSY;
	53	goto out;
	54	}
	55
	56	pmc_owner_caller = __builtin_return_address(0);
dd6c89f6	57	perf_irq = new_perf_irq ? new_perf_irq : dummy_perf;
1da177e4 LT	58
	59	out:
	60	spin_unlock(&pmc_owner_lock);
	61	return err;
	62	}
	63	EXPORT_SYMBOL_GPL(reserve_pmc_hardware);
	64
	65	void release_pmc_hardware(void)
	66	{
	67	spin_lock(&pmc_owner_lock);
	68
	69	WARN_ON(! pmc_owner_caller);
	70
	71	pmc_owner_caller = NULL;
	72	perf_irq = dummy_perf;
	73
	74	spin_unlock(&pmc_owner_lock);
	75	}
	76	EXPORT_SYMBOL_GPL(release_pmc_hardware);
180a3362	77
f7f6f4fe	78	#ifdef CONFIG_PPC64
180a3362 ME	79	void power4_enable_pmcs(void)
	80	{
	81	unsigned long hid0;
	82
b5bbeb23	83	hid0 = mfspr(SPRN_HID0);
180a3362 ME	84	hid0 \|= 1UL << (63 - 20);
	85
	86	/* POWER4 requires the following sequence */
	87	asm volatile(
	88	"sync\n"
	89	"mtspr %1, %0\n"
	90	"mfspr %0, %1\n"
	91	"mfspr %0, %1\n"
	92	"mfspr %0, %1\n"
	93	"mfspr %0, %1\n"
	94	"mfspr %0, %1\n"
	95	"mfspr %0, %1\n"
b5bbeb23	96	"isync" : "=&r" (hid0) : "i" (SPRN_HID0), "0" (hid0):
180a3362 ME	97	"memory");
180a3362 ME	98	}
f7f6f4fe	99	#endif /* CONFIG_PPC64 */