Commit | Line | Data |
---|---|---|
e05b3b4a PM |
1 | /* |
2 | * Common pmac/prep/chrp pci routines. -- Cort | |
3 | */ | |
4 | ||
e05b3b4a PM |
5 | #include <linux/kernel.h> |
6 | #include <linux/pci.h> | |
7 | #include <linux/delay.h> | |
8 | #include <linux/string.h> | |
9 | #include <linux/init.h> | |
10 | #include <linux/capability.h> | |
11 | #include <linux/sched.h> | |
12 | #include <linux/errno.h> | |
13 | #include <linux/bootmem.h> | |
6e99e458 | 14 | #include <linux/irq.h> |
f90bb153 | 15 | #include <linux/list.h> |
66524b22 | 16 | #include <linux/of.h> |
e05b3b4a PM |
17 | |
18 | #include <asm/processor.h> | |
19 | #include <asm/io.h> | |
20 | #include <asm/prom.h> | |
21 | #include <asm/sections.h> | |
22 | #include <asm/pci-bridge.h> | |
c3bd517d | 23 | #include <asm/ppc-pci.h> |
e05b3b4a | 24 | #include <asm/byteorder.h> |
e05b3b4a PM |
25 | #include <asm/uaccess.h> |
26 | #include <asm/machdep.h> | |
27 | ||
28 | #undef DEBUG | |
29 | ||
e05b3b4a | 30 | unsigned long isa_io_base = 0; |
e05b3b4a PM |
31 | unsigned long pci_dram_offset = 0; |
32 | int pcibios_assign_bus_offset = 1; | |
33 | ||
34 | void pcibios_make_OF_bus_map(void); | |
35 | ||
e05b3b4a | 36 | static void fixup_cpc710_pci64(struct pci_dev* dev); |
e05b3b4a | 37 | static u8* pci_to_OF_bus_map; |
e05b3b4a PM |
38 | |
39 | /* By default, we don't re-assign bus numbers. We do this only on | |
40 | * some pmacs | |
41 | */ | |
fc3fb71c | 42 | static int pci_assign_all_buses; |
e05b3b4a | 43 | |
e05b3b4a PM |
44 | static int pci_bus_count; |
45 | ||
7b6b574c BH |
46 | /* This will remain NULL for now, until isa-bridge.c is made common |
47 | * to both 32-bit and 64-bit. | |
48 | */ | |
49 | struct pci_dev *isa_bridge_pcidev; | |
50 | EXPORT_SYMBOL_GPL(isa_bridge_pcidev); | |
51 | ||
2052d6d2 | 52 | static void |
4a015c37 | 53 | fixup_hide_host_resource_fsl(struct pci_dev *dev) |
2052d6d2 KG |
54 | { |
55 | int i, class = dev->class >> 8; | |
56 | ||
4a015c37 JR |
57 | if ((class == PCI_CLASS_PROCESSOR_POWERPC || |
58 | class == PCI_CLASS_BRIDGE_OTHER) && | |
2052d6d2 KG |
59 | (dev->hdr_type == PCI_HEADER_TYPE_NORMAL) && |
60 | (dev->bus->parent == NULL)) { | |
61 | for (i = 0; i < DEVICE_COUNT_RESOURCE; i++) { | |
62 | dev->resource[i].start = 0; | |
63 | dev->resource[i].end = 0; | |
64 | dev->resource[i].flags = 0; | |
65 | } | |
66 | } | |
67 | } | |
68 | DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_MOTOROLA, PCI_ANY_ID, fixup_hide_host_resource_fsl); | |
69 | DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_FREESCALE, PCI_ANY_ID, fixup_hide_host_resource_fsl); | |
70 | ||
e05b3b4a PM |
71 | static void |
72 | fixup_cpc710_pci64(struct pci_dev* dev) | |
73 | { | |
74 | /* Hide the PCI64 BARs from the kernel as their content doesn't | |
75 | * fit well in the resource management | |
76 | */ | |
77 | dev->resource[0].start = dev->resource[0].end = 0; | |
78 | dev->resource[0].flags = 0; | |
79 | dev->resource[1].start = dev->resource[1].end = 0; | |
80 | dev->resource[1].flags = 0; | |
81 | } | |
82 | DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_CPC710_PCI64, fixup_cpc710_pci64); | |
83 | ||
e05b3b4a PM |
84 | /* |
85 | * Functions below are used on OpenFirmware machines. | |
86 | */ | |
87 | static void | |
88 | make_one_node_map(struct device_node* node, u8 pci_bus) | |
89 | { | |
a7f67bdf | 90 | const int *bus_range; |
e05b3b4a PM |
91 | int len; |
92 | ||
93 | if (pci_bus >= pci_bus_count) | |
94 | return; | |
e2eb6392 | 95 | bus_range = of_get_property(node, "bus-range", &len); |
e05b3b4a PM |
96 | if (bus_range == NULL || len < 2 * sizeof(int)) { |
97 | printk(KERN_WARNING "Can't get bus-range for %s, " | |
98 | "assuming it starts at 0\n", node->full_name); | |
99 | pci_to_OF_bus_map[pci_bus] = 0; | |
100 | } else | |
101 | pci_to_OF_bus_map[pci_bus] = bus_range[0]; | |
102 | ||
66524b22 | 103 | for_each_child_of_node(node, node) { |
e05b3b4a | 104 | struct pci_dev* dev; |
a7f67bdf | 105 | const unsigned int *class_code, *reg; |
e05b3b4a | 106 | |
e2eb6392 | 107 | class_code = of_get_property(node, "class-code", NULL); |
e05b3b4a PM |
108 | if (!class_code || ((*class_code >> 8) != PCI_CLASS_BRIDGE_PCI && |
109 | (*class_code >> 8) != PCI_CLASS_BRIDGE_CARDBUS)) | |
110 | continue; | |
e2eb6392 | 111 | reg = of_get_property(node, "reg", NULL); |
e05b3b4a PM |
112 | if (!reg) |
113 | continue; | |
ab462768 AC |
114 | dev = pci_get_bus_and_slot(pci_bus, ((reg[0] >> 8) & 0xff)); |
115 | if (!dev || !dev->subordinate) { | |
116 | pci_dev_put(dev); | |
e05b3b4a | 117 | continue; |
ab462768 | 118 | } |
e05b3b4a | 119 | make_one_node_map(node, dev->subordinate->number); |
ab462768 | 120 | pci_dev_put(dev); |
e05b3b4a PM |
121 | } |
122 | } | |
123 | ||
124 | void | |
125 | pcibios_make_OF_bus_map(void) | |
126 | { | |
127 | int i; | |
a4c9e328 | 128 | struct pci_controller *hose, *tmp; |
a7f67bdf | 129 | struct property *map_prop; |
8c8dc322 | 130 | struct device_node *dn; |
e05b3b4a | 131 | |
5cbded58 | 132 | pci_to_OF_bus_map = kmalloc(pci_bus_count, GFP_KERNEL); |
e05b3b4a PM |
133 | if (!pci_to_OF_bus_map) { |
134 | printk(KERN_ERR "Can't allocate OF bus map !\n"); | |
135 | return; | |
136 | } | |
137 | ||
138 | /* We fill the bus map with invalid values, that helps | |
139 | * debugging. | |
140 | */ | |
141 | for (i=0; i<pci_bus_count; i++) | |
142 | pci_to_OF_bus_map[i] = 0xff; | |
143 | ||
144 | /* For each hose, we begin searching bridges */ | |
a4c9e328 | 145 | list_for_each_entry_safe(hose, tmp, &hose_list, list_node) { |
44ef3390 SR |
146 | struct device_node* node = hose->dn; |
147 | ||
e05b3b4a PM |
148 | if (!node) |
149 | continue; | |
150 | make_one_node_map(node, hose->first_busno); | |
151 | } | |
8c8dc322 SR |
152 | dn = of_find_node_by_path("/"); |
153 | map_prop = of_find_property(dn, "pci-OF-bus-map", NULL); | |
a7f67bdf JK |
154 | if (map_prop) { |
155 | BUG_ON(pci_bus_count > map_prop->length); | |
156 | memcpy(map_prop->value, pci_to_OF_bus_map, pci_bus_count); | |
157 | } | |
8c8dc322 | 158 | of_node_put(dn); |
e05b3b4a PM |
159 | #ifdef DEBUG |
160 | printk("PCI->OF bus map:\n"); | |
161 | for (i=0; i<pci_bus_count; i++) { | |
162 | if (pci_to_OF_bus_map[i] == 0xff) | |
163 | continue; | |
164 | printk("%d -> %d\n", i, pci_to_OF_bus_map[i]); | |
165 | } | |
166 | #endif | |
167 | } | |
168 | ||
169 | typedef int (*pci_OF_scan_iterator)(struct device_node* node, void* data); | |
170 | ||
171 | static struct device_node* | |
66524b22 | 172 | scan_OF_pci_childs(struct device_node *parent, pci_OF_scan_iterator filter, void* data) |
e05b3b4a | 173 | { |
66524b22 | 174 | struct device_node *node; |
e05b3b4a PM |
175 | struct device_node* sub_node; |
176 | ||
66524b22 | 177 | for_each_child_of_node(parent, node) { |
a7f67bdf | 178 | const unsigned int *class_code; |
e05b3b4a | 179 | |
66524b22 SR |
180 | if (filter(node, data)) { |
181 | of_node_put(node); | |
e05b3b4a | 182 | return node; |
66524b22 | 183 | } |
e05b3b4a PM |
184 | |
185 | /* For PCI<->PCI bridges or CardBus bridges, we go down | |
186 | * Note: some OFs create a parent node "multifunc-device" as | |
187 | * a fake root for all functions of a multi-function device, | |
188 | * we go down them as well. | |
189 | */ | |
e2eb6392 | 190 | class_code = of_get_property(node, "class-code", NULL); |
e05b3b4a PM |
191 | if ((!class_code || ((*class_code >> 8) != PCI_CLASS_BRIDGE_PCI && |
192 | (*class_code >> 8) != PCI_CLASS_BRIDGE_CARDBUS)) && | |
193 | strcmp(node->name, "multifunc-device")) | |
194 | continue; | |
66524b22 SR |
195 | sub_node = scan_OF_pci_childs(node, filter, data); |
196 | if (sub_node) { | |
197 | of_node_put(node); | |
e05b3b4a | 198 | return sub_node; |
66524b22 | 199 | } |
e05b3b4a PM |
200 | } |
201 | return NULL; | |
202 | } | |
203 | ||
dae4828d BH |
204 | static struct device_node *scan_OF_for_pci_dev(struct device_node *parent, |
205 | unsigned int devfn) | |
e05b3b4a | 206 | { |
f8178691 | 207 | struct device_node *np, *cnp; |
dae4828d BH |
208 | const u32 *reg; |
209 | unsigned int psize; | |
210 | ||
85e99b9f | 211 | for_each_child_of_node(parent, np) { |
e2eb6392 | 212 | reg = of_get_property(np, "reg", &psize); |
f8178691 | 213 | if (reg && psize >= 4 && ((reg[0] >> 8) & 0xff) == devfn) |
dae4828d | 214 | return np; |
f8178691 TA |
215 | |
216 | /* Note: some OFs create a parent node "multifunc-device" as | |
217 | * a fake root for all functions of a multi-function device, | |
218 | * we go down them as well. */ | |
219 | if (!strcmp(np->name, "multifunc-device")) { | |
220 | cnp = scan_OF_for_pci_dev(np, devfn); | |
221 | if (cnp) | |
222 | return cnp; | |
223 | } | |
dae4828d BH |
224 | } |
225 | return NULL; | |
e05b3b4a PM |
226 | } |
227 | ||
dae4828d BH |
228 | |
229 | static struct device_node *scan_OF_for_pci_bus(struct pci_bus *bus) | |
e05b3b4a | 230 | { |
dae4828d BH |
231 | struct device_node *parent, *np; |
232 | ||
233 | /* Are we a root bus ? */ | |
234 | if (bus->self == NULL || bus->parent == NULL) { | |
0b1d40c4 | 235 | struct pci_controller *hose = pci_bus_to_host(bus); |
dae4828d BH |
236 | if (hose == NULL) |
237 | return NULL; | |
44ef3390 | 238 | return of_node_get(hose->dn); |
dae4828d BH |
239 | } |
240 | ||
241 | /* not a root bus, we need to get our parent */ | |
242 | parent = scan_OF_for_pci_bus(bus->parent); | |
243 | if (parent == NULL) | |
244 | return NULL; | |
245 | ||
246 | /* now iterate for children for a match */ | |
247 | np = scan_OF_for_pci_dev(parent, bus->self->devfn); | |
248 | of_node_put(parent); | |
249 | ||
dae4828d | 250 | return np; |
e05b3b4a PM |
251 | } |
252 | ||
253 | /* | |
254 | * Scans the OF tree for a device node matching a PCI device | |
255 | */ | |
256 | struct device_node * | |
257 | pci_busdev_to_OF_node(struct pci_bus *bus, int devfn) | |
258 | { | |
dae4828d | 259 | struct device_node *parent, *np; |
e05b3b4a | 260 | |
b0494bc8 | 261 | pr_debug("pci_busdev_to_OF_node(%d,0x%x)\n", bus->number, devfn); |
dae4828d BH |
262 | parent = scan_OF_for_pci_bus(bus); |
263 | if (parent == NULL) | |
e05b3b4a | 264 | return NULL; |
b0494bc8 | 265 | pr_debug(" parent is %s\n", parent ? parent->full_name : "<NULL>"); |
dae4828d BH |
266 | np = scan_OF_for_pci_dev(parent, devfn); |
267 | of_node_put(parent); | |
b0494bc8 | 268 | pr_debug(" result is %s\n", np ? np->full_name : "<NULL>"); |
dae4828d BH |
269 | |
270 | /* XXX most callers don't release the returned node | |
271 | * mostly because ppc64 doesn't increase the refcount, | |
272 | * we need to fix that. | |
e05b3b4a | 273 | */ |
dae4828d | 274 | return np; |
e05b3b4a PM |
275 | } |
276 | EXPORT_SYMBOL(pci_busdev_to_OF_node); | |
277 | ||
278 | struct device_node* | |
279 | pci_device_to_OF_node(struct pci_dev *dev) | |
280 | { | |
281 | return pci_busdev_to_OF_node(dev->bus, dev->devfn); | |
282 | } | |
283 | EXPORT_SYMBOL(pci_device_to_OF_node); | |
284 | ||
e05b3b4a PM |
285 | static int |
286 | find_OF_pci_device_filter(struct device_node* node, void* data) | |
287 | { | |
288 | return ((void *)node == data); | |
289 | } | |
290 | ||
291 | /* | |
292 | * Returns the PCI device matching a given OF node | |
293 | */ | |
294 | int | |
295 | pci_device_from_OF_node(struct device_node* node, u8* bus, u8* devfn) | |
296 | { | |
a7f67bdf | 297 | const unsigned int *reg; |
e05b3b4a PM |
298 | struct pci_controller* hose; |
299 | struct pci_dev* dev = NULL; | |
300 | ||
e05b3b4a PM |
301 | /* Make sure it's really a PCI device */ |
302 | hose = pci_find_hose_for_OF_device(node); | |
44ef3390 | 303 | if (!hose || !hose->dn) |
e05b3b4a | 304 | return -ENODEV; |
66524b22 | 305 | if (!scan_OF_pci_childs(hose->dn, |
e05b3b4a PM |
306 | find_OF_pci_device_filter, (void *)node)) |
307 | return -ENODEV; | |
e2eb6392 | 308 | reg = of_get_property(node, "reg", NULL); |
e05b3b4a PM |
309 | if (!reg) |
310 | return -ENODEV; | |
311 | *bus = (reg[0] >> 16) & 0xff; | |
312 | *devfn = ((reg[0] >> 8) & 0xff); | |
313 | ||
314 | /* Ok, here we need some tweak. If we have already renumbered | |
315 | * all busses, we can't rely on the OF bus number any more. | |
316 | * the pci_to_OF_bus_map is not enough as several PCI busses | |
317 | * may match the same OF bus number. | |
318 | */ | |
319 | if (!pci_to_OF_bus_map) | |
320 | return 0; | |
321 | ||
322 | for_each_pci_dev(dev) | |
323 | if (pci_to_OF_bus_map[dev->bus->number] == *bus && | |
324 | dev->devfn == *devfn) { | |
325 | *bus = dev->bus->number; | |
326 | pci_dev_put(dev); | |
327 | return 0; | |
328 | } | |
329 | ||
330 | return -ENODEV; | |
331 | } | |
332 | EXPORT_SYMBOL(pci_device_from_OF_node); | |
333 | ||
e05b3b4a PM |
334 | /* We create the "pci-OF-bus-map" property now so it appears in the |
335 | * /proc device tree | |
336 | */ | |
337 | void __init | |
338 | pci_create_OF_bus_map(void) | |
339 | { | |
340 | struct property* of_prop; | |
8c8dc322 SR |
341 | struct device_node *dn; |
342 | ||
e05b3b4a | 343 | of_prop = (struct property*) alloc_bootmem(sizeof(struct property) + 256); |
8c8dc322 SR |
344 | if (!of_prop) |
345 | return; | |
346 | dn = of_find_node_by_path("/"); | |
347 | if (dn) { | |
e05b3b4a PM |
348 | memset(of_prop, -1, sizeof(struct property) + 256); |
349 | of_prop->name = "pci-OF-bus-map"; | |
350 | of_prop->length = 256; | |
1a38147e | 351 | of_prop->value = &of_prop[1]; |
8c8dc322 SR |
352 | prom_add_property(dn, of_prop); |
353 | of_node_put(dn); | |
e05b3b4a PM |
354 | } |
355 | } | |
356 | ||
53280323 BH |
357 | static void __devinit pcibios_scan_phb(struct pci_controller *hose) |
358 | { | |
359 | struct pci_bus *bus; | |
360 | struct device_node *node = hose->dn; | |
361 | unsigned long io_offset; | |
362 | struct resource *res = &hose->io_resource; | |
363 | ||
364 | pr_debug("PCI: Scanning PHB %s\n", | |
365 | node ? node->full_name : "<NO NAME>"); | |
366 | ||
367 | /* Create an empty bus for the toplevel */ | |
368 | bus = pci_create_bus(hose->parent, hose->first_busno, hose->ops, hose); | |
369 | if (bus == NULL) { | |
370 | printk(KERN_ERR "Failed to create bus for PCI domain %04x\n", | |
371 | hose->global_number); | |
372 | return; | |
373 | } | |
374 | bus->secondary = hose->first_busno; | |
375 | hose->bus = bus; | |
376 | ||
377 | /* Fixup IO space offset */ | |
378 | io_offset = (unsigned long)hose->io_base_virt - isa_io_base; | |
379 | res->start = (res->start + io_offset) & 0xffffffffu; | |
380 | res->end = (res->end + io_offset) & 0xffffffffu; | |
381 | ||
382 | /* Wire up PHB bus resources */ | |
383 | pcibios_setup_phb_resources(hose); | |
384 | ||
385 | /* Scan children */ | |
386 | hose->last_busno = bus->subordinate = pci_scan_child_bus(bus); | |
387 | } | |
388 | ||
3fd94c6b | 389 | static int __init pcibios_init(void) |
e05b3b4a | 390 | { |
a4c9e328 | 391 | struct pci_controller *hose, *tmp; |
a4c9e328 | 392 | int next_busno = 0; |
e05b3b4a PM |
393 | |
394 | printk(KERN_INFO "PCI: Probing PCI hardware\n"); | |
395 | ||
fc3fb71c BH |
396 | if (ppc_pci_flags & PPC_PCI_REASSIGN_ALL_BUS) |
397 | pci_assign_all_buses = 1; | |
398 | ||
e05b3b4a | 399 | /* Scan all of the recorded PCI controllers. */ |
a4c9e328 | 400 | list_for_each_entry_safe(hose, tmp, &hose_list, list_node) { |
e05b3b4a PM |
401 | if (pci_assign_all_buses) |
402 | hose->first_busno = next_busno; | |
403 | hose->last_busno = 0xff; | |
53280323 BH |
404 | pcibios_scan_phb(hose); |
405 | pci_bus_add_devices(hose->bus); | |
e05b3b4a PM |
406 | if (pci_assign_all_buses || next_busno <= hose->last_busno) |
407 | next_busno = hose->last_busno + pcibios_assign_bus_offset; | |
408 | } | |
409 | pci_bus_count = next_busno; | |
410 | ||
411 | /* OpenFirmware based machines need a map of OF bus | |
412 | * numbers vs. kernel bus numbers since we may have to | |
413 | * remap them. | |
414 | */ | |
6b82b3e4 | 415 | if (pci_assign_all_buses) |
e05b3b4a PM |
416 | pcibios_make_OF_bus_map(); |
417 | ||
3fd94c6b BH |
418 | /* Call common code to handle resource allocation */ |
419 | pcibios_resource_survey(); | |
e05b3b4a PM |
420 | |
421 | /* Call machine dependent post-init code */ | |
422 | if (ppc_md.pcibios_after_init) | |
423 | ppc_md.pcibios_after_init(); | |
424 | ||
425 | return 0; | |
426 | } | |
427 | ||
428 | subsys_initcall(pcibios_init); | |
429 | ||
0b1d40c4 | 430 | static struct pci_controller* |
e05b3b4a PM |
431 | pci_bus_to_hose(int bus) |
432 | { | |
a4c9e328 | 433 | struct pci_controller *hose, *tmp; |
e05b3b4a | 434 | |
a4c9e328 | 435 | list_for_each_entry_safe(hose, tmp, &hose_list, list_node) |
e05b3b4a PM |
436 | if (bus >= hose->first_busno && bus <= hose->last_busno) |
437 | return hose; | |
438 | return NULL; | |
439 | } | |
440 | ||
e05b3b4a PM |
441 | /* Provide information on locations of various I/O regions in physical |
442 | * memory. Do this on a per-card basis so that we choose the right | |
443 | * root bridge. | |
444 | * Note that the returned IO or memory base is a physical address | |
445 | */ | |
446 | ||
447 | long sys_pciconfig_iobase(long which, unsigned long bus, unsigned long devfn) | |
448 | { | |
449 | struct pci_controller* hose; | |
450 | long result = -EOPNOTSUPP; | |
451 | ||
e05b3b4a PM |
452 | hose = pci_bus_to_hose(bus); |
453 | if (!hose) | |
454 | return -ENODEV; | |
455 | ||
456 | switch (which) { | |
457 | case IOBASE_BRIDGE_NUMBER: | |
458 | return (long)hose->first_busno; | |
459 | case IOBASE_MEMORY: | |
460 | return (long)hose->pci_mem_offset; | |
461 | case IOBASE_IO: | |
462 | return (long)hose->io_base_phys; | |
463 | case IOBASE_ISA_IO: | |
464 | return (long)isa_io_base; | |
465 | case IOBASE_ISA_MEM: | |
466 | return (long)isa_mem_base; | |
467 | } | |
468 | ||
469 | return result; | |
470 | } | |
471 | ||
e05b3b4a | 472 |