[POWERPC] Stacktrace support for lockdep
[GitHub/mt8127/android_kernel_alcatel_ttab.git] / arch / powerpc / kernel / irq.c
CommitLineData
1da177e4 1/*
1da177e4
LT
2 * Derived from arch/i386/kernel/irq.c
3 * Copyright (C) 1992 Linus Torvalds
4 * Adapted from arch/i386 by Gary Thomas
5 * Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org)
756e7104
SR
6 * Updated and modified by Cort Dougan <cort@fsmlabs.com>
7 * Copyright (C) 1996-2001 Cort Dougan
1da177e4
LT
8 * Adapted for Power Macintosh by Paul Mackerras
9 * Copyright (C) 1996 Paul Mackerras (paulus@cs.anu.edu.au)
756e7104 10 *
1da177e4
LT
11 * This program is free software; you can redistribute it and/or
12 * modify it under the terms of the GNU General Public License
13 * as published by the Free Software Foundation; either version
14 * 2 of the License, or (at your option) any later version.
15 *
16 * This file contains the code used by various IRQ handling routines:
17 * asking for different IRQ's should be done through these routines
18 * instead of just grabbing them. Thus setups with different IRQ numbers
19 * shouldn't result in any weird surprises, and installing new handlers
20 * should be easier.
756e7104
SR
21 *
22 * The MPC8xx has an interrupt mask in the SIU. If a bit is set, the
23 * interrupt is _enabled_. As expected, IRQ0 is bit 0 in the 32-bit
24 * mask register (of which only 16 are defined), hence the weird shifting
25 * and complement of the cached_irq_mask. I want to be able to stuff
26 * this right into the SIU SMASK register.
27 * Many of the prep/chrp functions are conditional compiled on CONFIG_8xx
28 * to reduce code space and undefined function references.
1da177e4
LT
29 */
30
0ebfff14
BH
31#undef DEBUG
32
1da177e4
LT
33#include <linux/module.h>
34#include <linux/threads.h>
35#include <linux/kernel_stat.h>
36#include <linux/signal.h>
37#include <linux/sched.h>
756e7104 38#include <linux/ptrace.h>
1da177e4
LT
39#include <linux/ioport.h>
40#include <linux/interrupt.h>
41#include <linux/timex.h>
1da177e4
LT
42#include <linux/init.h>
43#include <linux/slab.h>
1da177e4
LT
44#include <linux/delay.h>
45#include <linux/irq.h>
756e7104
SR
46#include <linux/seq_file.h>
47#include <linux/cpumask.h>
1da177e4
LT
48#include <linux/profile.h>
49#include <linux/bitops.h>
0ebfff14
BH
50#include <linux/list.h>
51#include <linux/radix-tree.h>
52#include <linux/mutex.h>
53#include <linux/bootmem.h>
45934c47 54#include <linux/pci.h>
60b332e7 55#include <linux/debugfs.h>
1da177e4
LT
56
57#include <asm/uaccess.h>
58#include <asm/system.h>
59#include <asm/io.h>
60#include <asm/pgtable.h>
61#include <asm/irq.h>
62#include <asm/cache.h>
63#include <asm/prom.h>
64#include <asm/ptrace.h>
1da177e4 65#include <asm/machdep.h>
0ebfff14 66#include <asm/udbg.h>
d04c56f7 67#ifdef CONFIG_PPC64
1da177e4 68#include <asm/paca.h>
d04c56f7 69#include <asm/firmware.h>
0874dd40 70#include <asm/lv1call.h>
756e7104 71#endif
1da177e4 72
868accb7 73int __irq_offset_value;
756e7104
SR
74static int ppc_spurious_interrupts;
75
756e7104 76#ifdef CONFIG_PPC32
b9e5b4e6
BH
77EXPORT_SYMBOL(__irq_offset_value);
78atomic_t ppc_n_lost_interrupts;
756e7104 79
b9e5b4e6
BH
80#ifndef CONFIG_PPC_MERGE
81#define NR_MASK_WORDS ((NR_IRQS + 31) / 32)
756e7104 82unsigned long ppc_cached_irq_mask[NR_MASK_WORDS];
b9e5b4e6 83#endif
756e7104
SR
84
85#ifdef CONFIG_TAU_INT
86extern int tau_initialized;
87extern int tau_interrupts(int);
88#endif
b9e5b4e6 89#endif /* CONFIG_PPC32 */
756e7104
SR
90
91#if defined(CONFIG_SMP) && !defined(CONFIG_PPC_MERGE)
92extern atomic_t ipi_recv;
93extern atomic_t ipi_sent;
94#endif
756e7104
SR
95
96#ifdef CONFIG_PPC64
1da177e4
LT
97EXPORT_SYMBOL(irq_desc);
98
99int distribute_irqs = 1;
d04c56f7 100
ef2b343e
HD
101static inline unsigned long get_hard_enabled(void)
102{
103 unsigned long enabled;
104
105 __asm__ __volatile__("lbz %0,%1(13)"
106 : "=r" (enabled) : "i" (offsetof(struct paca_struct, hard_enabled)));
107
108 return enabled;
109}
110
111static inline void set_soft_enabled(unsigned long enable)
112{
113 __asm__ __volatile__("stb %0,%1(13)"
114 : : "r" (enable), "i" (offsetof(struct paca_struct, soft_enabled)));
115}
116
d04c56f7
PM
117void local_irq_restore(unsigned long en)
118{
ef2b343e
HD
119 /*
120 * get_paca()->soft_enabled = en;
121 * Is it ever valid to use local_irq_restore(0) when soft_enabled is 1?
122 * That was allowed before, and in such a case we do need to take care
123 * that gcc will set soft_enabled directly via r13, not choose to use
124 * an intermediate register, lest we're preempted to a different cpu.
125 */
126 set_soft_enabled(en);
d04c56f7
PM
127 if (!en)
128 return;
129
130 if (firmware_has_feature(FW_FEATURE_ISERIES)) {
ef2b343e
HD
131 /*
132 * Do we need to disable preemption here? Not really: in the
133 * unlikely event that we're preempted to a different cpu in
134 * between getting r13, loading its lppaca_ptr, and loading
135 * its any_int, we might call iseries_handle_interrupts without
136 * an interrupt pending on the new cpu, but that's no disaster,
137 * is it? And the business of preempting us off the old cpu
138 * would itself involve a local_irq_restore which handles the
139 * interrupt to that cpu.
140 *
141 * But use "local_paca->lppaca_ptr" instead of "get_lppaca()"
142 * to avoid any preemption checking added into get_paca().
143 */
144 if (local_paca->lppaca_ptr->int_dword.any_int)
d04c56f7 145 iseries_handle_interrupts();
d04c56f7
PM
146 }
147
ef2b343e
HD
148 /*
149 * if (get_paca()->hard_enabled) return;
150 * But again we need to take care that gcc gets hard_enabled directly
151 * via r13, not choose to use an intermediate register, lest we're
152 * preempted to a different cpu in between the two instructions.
153 */
154 if (get_hard_enabled())
d04c56f7 155 return;
ef2b343e
HD
156
157 /*
158 * Need to hard-enable interrupts here. Since currently disabled,
159 * no need to take further asm precautions against preemption; but
160 * use local_paca instead of get_paca() to avoid preemption checking.
161 */
162 local_paca->hard_enabled = en;
d04c56f7
PM
163 if ((int)mfspr(SPRN_DEC) < 0)
164 mtspr(SPRN_DEC, 1);
0874dd40
TS
165
166 /*
167 * Force the delivery of pending soft-disabled interrupts on PS3.
168 * Any HV call will have this side effect.
169 */
170 if (firmware_has_feature(FW_FEATURE_PS3_LV1)) {
171 u64 tmp;
172 lv1_get_version_info(&tmp);
173 }
174
e1fa2e13 175 __hard_irq_enable();
d04c56f7 176}
756e7104 177#endif /* CONFIG_PPC64 */
1da177e4
LT
178
179int show_interrupts(struct seq_file *p, void *v)
180{
756e7104
SR
181 int i = *(loff_t *)v, j;
182 struct irqaction *action;
1da177e4
LT
183 irq_desc_t *desc;
184 unsigned long flags;
185
186 if (i == 0) {
756e7104
SR
187 seq_puts(p, " ");
188 for_each_online_cpu(j)
189 seq_printf(p, "CPU%d ", j);
1da177e4
LT
190 seq_putc(p, '\n');
191 }
192
193 if (i < NR_IRQS) {
194 desc = get_irq_desc(i);
195 spin_lock_irqsave(&desc->lock, flags);
196 action = desc->action;
197 if (!action || !action->handler)
198 goto skip;
199 seq_printf(p, "%3d: ", i);
200#ifdef CONFIG_SMP
756e7104
SR
201 for_each_online_cpu(j)
202 seq_printf(p, "%10u ", kstat_cpu(j).irqs[i]);
1da177e4
LT
203#else
204 seq_printf(p, "%10u ", kstat_irqs(i));
205#endif /* CONFIG_SMP */
d1bef4ed
IM
206 if (desc->chip)
207 seq_printf(p, " %s ", desc->chip->typename);
1da177e4 208 else
756e7104 209 seq_puts(p, " None ");
1da177e4 210 seq_printf(p, "%s", (desc->status & IRQ_LEVEL) ? "Level " : "Edge ");
756e7104
SR
211 seq_printf(p, " %s", action->name);
212 for (action = action->next; action; action = action->next)
1da177e4
LT
213 seq_printf(p, ", %s", action->name);
214 seq_putc(p, '\n');
215skip:
216 spin_unlock_irqrestore(&desc->lock, flags);
756e7104
SR
217 } else if (i == NR_IRQS) {
218#ifdef CONFIG_PPC32
219#ifdef CONFIG_TAU_INT
220 if (tau_initialized){
221 seq_puts(p, "TAU: ");
394e3902
AM
222 for_each_online_cpu(j)
223 seq_printf(p, "%10u ", tau_interrupts(j));
756e7104
SR
224 seq_puts(p, " PowerPC Thermal Assist (cpu temp)\n");
225 }
226#endif
227#if defined(CONFIG_SMP) && !defined(CONFIG_PPC_MERGE)
228 /* should this be per processor send/receive? */
229 seq_printf(p, "IPI (recv/sent): %10u/%u\n",
230 atomic_read(&ipi_recv), atomic_read(&ipi_sent));
231#endif
232#endif /* CONFIG_PPC32 */
1da177e4 233 seq_printf(p, "BAD: %10u\n", ppc_spurious_interrupts);
756e7104 234 }
1da177e4
LT
235 return 0;
236}
237
238#ifdef CONFIG_HOTPLUG_CPU
239void fixup_irqs(cpumask_t map)
240{
241 unsigned int irq;
242 static int warned;
243
244 for_each_irq(irq) {
245 cpumask_t mask;
246
247 if (irq_desc[irq].status & IRQ_PER_CPU)
248 continue;
249
a53da52f 250 cpus_and(mask, irq_desc[irq].affinity, map);
1da177e4
LT
251 if (any_online_cpu(mask) == NR_CPUS) {
252 printk("Breaking affinity for irq %i\n", irq);
253 mask = map;
254 }
d1bef4ed
IM
255 if (irq_desc[irq].chip->set_affinity)
256 irq_desc[irq].chip->set_affinity(irq, mask);
1da177e4
LT
257 else if (irq_desc[irq].action && !(warned++))
258 printk("Cannot set affinity for irq %i\n", irq);
259 }
260
261 local_irq_enable();
262 mdelay(1);
263 local_irq_disable();
264}
265#endif
266
1da177e4
LT
267void do_IRQ(struct pt_regs *regs)
268{
7d12e780 269 struct pt_regs *old_regs = set_irq_regs(regs);
0ebfff14 270 unsigned int irq;
b709c083
SR
271#ifdef CONFIG_IRQSTACKS
272 struct thread_info *curtp, *irqtp;
273#endif
1da177e4 274
4b218e9b 275 irq_enter();
1da177e4
LT
276
277#ifdef CONFIG_DEBUG_STACKOVERFLOW
278 /* Debugging check for stack overflow: is there less than 2KB free? */
279 {
280 long sp;
281
282 sp = __get_SP() & (THREAD_SIZE-1);
283
284 if (unlikely(sp < (sizeof(struct thread_info) + 2048))) {
285 printk("do_IRQ: stack overflow: %ld\n",
286 sp - sizeof(struct thread_info));
287 dump_stack();
288 }
289 }
290#endif
291
756e7104
SR
292 /*
293 * Every platform is required to implement ppc_md.get_irq.
92d4dda3 294 * This function will either return an irq number or NO_IRQ to
756e7104 295 * indicate there are no more pending.
92d4dda3
JB
296 * The value NO_IRQ_IGNORE is for buggy hardware and means that this
297 * IRQ has already been handled. -- Tom
756e7104 298 */
35a84c2f 299 irq = ppc_md.get_irq();
1da177e4 300
0ebfff14 301 if (irq != NO_IRQ && irq != NO_IRQ_IGNORE) {
b709c083
SR
302#ifdef CONFIG_IRQSTACKS
303 /* Switch to the irq stack to handle this */
304 curtp = current_thread_info();
305 irqtp = hardirq_ctx[smp_processor_id()];
306 if (curtp != irqtp) {
b9e5b4e6
BH
307 struct irq_desc *desc = irq_desc + irq;
308 void *handler = desc->handle_irq;
309 if (handler == NULL)
310 handler = &__do_IRQ;
b709c083
SR
311 irqtp->task = curtp->task;
312 irqtp->flags = 0;
e6768a4f
BH
313
314 /* Copy the softirq bits in preempt_count so that the
315 * softirq checks work in the hardirq context.
316 */
317 irqtp->preempt_count =
318 (irqtp->preempt_count & ~SOFTIRQ_MASK) |
319 (curtp->preempt_count & SOFTIRQ_MASK);
320
7d12e780 321 call_handle_irq(irq, desc, irqtp, handler);
b709c083 322 irqtp->task = NULL;
e6768a4f
BH
323
324
325 /* Set any flag that may have been set on the
326 * alternate stack
327 */
b709c083
SR
328 if (irqtp->flags)
329 set_bits(irqtp->flags, &curtp->flags);
330 } else
331#endif
7d12e780 332 generic_handle_irq(irq);
0ebfff14 333 } else if (irq != NO_IRQ_IGNORE)
e199500c
SR
334 /* That's not SMP safe ... but who cares ? */
335 ppc_spurious_interrupts++;
336
4b218e9b 337 irq_exit();
7d12e780 338 set_irq_regs(old_regs);
756e7104 339
e199500c 340#ifdef CONFIG_PPC_ISERIES
b06a3183
SR
341 if (firmware_has_feature(FW_FEATURE_ISERIES) &&
342 get_lppaca()->int_dword.fields.decr_int) {
3356bb9f
DG
343 get_lppaca()->int_dword.fields.decr_int = 0;
344 /* Signal a fake decrementer interrupt */
345 timer_interrupt(regs);
e199500c
SR
346 }
347#endif
348}
1da177e4
LT
349
350void __init init_IRQ(void)
351{
70584578
SR
352 if (ppc_md.init_IRQ)
353 ppc_md.init_IRQ();
756e7104 354#ifdef CONFIG_PPC64
1da177e4 355 irq_ctx_init();
756e7104 356#endif
1da177e4
LT
357}
358
1da177e4 359
1da177e4 360#ifdef CONFIG_IRQSTACKS
22722051
AM
361struct thread_info *softirq_ctx[NR_CPUS] __read_mostly;
362struct thread_info *hardirq_ctx[NR_CPUS] __read_mostly;
1da177e4
LT
363
364void irq_ctx_init(void)
365{
366 struct thread_info *tp;
367 int i;
368
0e551954 369 for_each_possible_cpu(i) {
1da177e4
LT
370 memset((void *)softirq_ctx[i], 0, THREAD_SIZE);
371 tp = softirq_ctx[i];
372 tp->cpu = i;
e6768a4f 373 tp->preempt_count = 0;
1da177e4
LT
374
375 memset((void *)hardirq_ctx[i], 0, THREAD_SIZE);
376 tp = hardirq_ctx[i];
377 tp->cpu = i;
378 tp->preempt_count = HARDIRQ_OFFSET;
379 }
380}
381
c6622f63
PM
382static inline void do_softirq_onstack(void)
383{
384 struct thread_info *curtp, *irqtp;
385
386 curtp = current_thread_info();
387 irqtp = softirq_ctx[smp_processor_id()];
388 irqtp->task = curtp->task;
389 call_do_softirq(irqtp);
390 irqtp->task = NULL;
391}
1da177e4 392
c6622f63
PM
393#else
394#define do_softirq_onstack() __do_softirq()
395#endif /* CONFIG_IRQSTACKS */
396
1da177e4
LT
397void do_softirq(void)
398{
399 unsigned long flags;
1da177e4
LT
400
401 if (in_interrupt())
1da177e4
LT
402 return;
403
1da177e4 404 local_irq_save(flags);
1da177e4 405
912b2539 406 if (local_softirq_pending())
c6622f63 407 do_softirq_onstack();
1da177e4
LT
408
409 local_irq_restore(flags);
1da177e4 410}
1da177e4 411
1da177e4 412
1da177e4 413/*
0ebfff14 414 * IRQ controller and virtual interrupts
1da177e4
LT
415 */
416
0ebfff14 417#ifdef CONFIG_PPC_MERGE
1da177e4 418
0ebfff14 419static LIST_HEAD(irq_hosts);
057b184a 420static DEFINE_SPINLOCK(irq_big_lock);
8ec8f2e8
BH
421static DEFINE_PER_CPU(unsigned int, irq_radix_reader);
422static unsigned int irq_radix_writer;
0ebfff14
BH
423struct irq_map_entry irq_map[NR_IRQS];
424static unsigned int irq_virq_count = NR_IRQS;
425static struct irq_host *irq_default_host;
1da177e4 426
35923f12
OJ
427irq_hw_number_t virq_to_hw(unsigned int virq)
428{
429 return irq_map[virq].hwirq;
430}
431EXPORT_SYMBOL_GPL(virq_to_hw);
432
68158006
ME
433static int default_irq_host_match(struct irq_host *h, struct device_node *np)
434{
435 return h->of_node != NULL && h->of_node == np;
436}
437
5669c3cf 438struct irq_host *irq_alloc_host(struct device_node *of_node,
52964f87
ME
439 unsigned int revmap_type,
440 unsigned int revmap_arg,
441 struct irq_host_ops *ops,
442 irq_hw_number_t inval_irq)
1da177e4 443{
0ebfff14
BH
444 struct irq_host *host;
445 unsigned int size = sizeof(struct irq_host);
446 unsigned int i;
447 unsigned int *rmap;
448 unsigned long flags;
449
450 /* Allocate structure and revmap table if using linear mapping */
451 if (revmap_type == IRQ_HOST_MAP_LINEAR)
452 size += revmap_arg * sizeof(unsigned int);
5669c3cf 453 host = zalloc_maybe_bootmem(size, GFP_KERNEL);
0ebfff14
BH
454 if (host == NULL)
455 return NULL;
7d01c880 456
0ebfff14
BH
457 /* Fill structure */
458 host->revmap_type = revmap_type;
459 host->inval_irq = inval_irq;
460 host->ops = ops;
52964f87 461 host->of_node = of_node;
7d01c880 462
68158006
ME
463 if (host->ops->match == NULL)
464 host->ops->match = default_irq_host_match;
7d01c880 465
0ebfff14
BH
466 spin_lock_irqsave(&irq_big_lock, flags);
467
468 /* If it's a legacy controller, check for duplicates and
469 * mark it as allocated (we use irq 0 host pointer for that
470 */
471 if (revmap_type == IRQ_HOST_MAP_LEGACY) {
472 if (irq_map[0].host != NULL) {
473 spin_unlock_irqrestore(&irq_big_lock, flags);
474 /* If we are early boot, we can't free the structure,
475 * too bad...
476 * this will be fixed once slab is made available early
477 * instead of the current cruft
478 */
479 if (mem_init_done)
480 kfree(host);
481 return NULL;
482 }
483 irq_map[0].host = host;
484 }
485
486 list_add(&host->link, &irq_hosts);
487 spin_unlock_irqrestore(&irq_big_lock, flags);
488
489 /* Additional setups per revmap type */
490 switch(revmap_type) {
491 case IRQ_HOST_MAP_LEGACY:
492 /* 0 is always the invalid number for legacy */
493 host->inval_irq = 0;
494 /* setup us as the host for all legacy interrupts */
495 for (i = 1; i < NUM_ISA_INTERRUPTS; i++) {
7866291d 496 irq_map[i].hwirq = i;
0ebfff14
BH
497 smp_wmb();
498 irq_map[i].host = host;
499 smp_wmb();
500
6e99e458
BH
501 /* Clear norequest flags */
502 get_irq_desc(i)->status &= ~IRQ_NOREQUEST;
0ebfff14
BH
503
504 /* Legacy flags are left to default at this point,
505 * one can then use irq_create_mapping() to
c03983ac 506 * explicitly change them
0ebfff14 507 */
6e99e458 508 ops->map(host, i, i);
0ebfff14
BH
509 }
510 break;
511 case IRQ_HOST_MAP_LINEAR:
512 rmap = (unsigned int *)(host + 1);
513 for (i = 0; i < revmap_arg; i++)
f5921697 514 rmap[i] = NO_IRQ;
0ebfff14
BH
515 host->revmap_data.linear.size = revmap_arg;
516 smp_wmb();
517 host->revmap_data.linear.revmap = rmap;
518 break;
519 default:
520 break;
521 }
522
523 pr_debug("irq: Allocated host of type %d @0x%p\n", revmap_type, host);
524
525 return host;
1da177e4
LT
526}
527
0ebfff14 528struct irq_host *irq_find_host(struct device_node *node)
1da177e4 529{
0ebfff14
BH
530 struct irq_host *h, *found = NULL;
531 unsigned long flags;
532
533 /* We might want to match the legacy controller last since
534 * it might potentially be set to match all interrupts in
535 * the absence of a device node. This isn't a problem so far
536 * yet though...
537 */
538 spin_lock_irqsave(&irq_big_lock, flags);
539 list_for_each_entry(h, &irq_hosts, link)
68158006 540 if (h->ops->match(h, node)) {
0ebfff14
BH
541 found = h;
542 break;
543 }
544 spin_unlock_irqrestore(&irq_big_lock, flags);
545 return found;
546}
547EXPORT_SYMBOL_GPL(irq_find_host);
548
549void irq_set_default_host(struct irq_host *host)
550{
551 pr_debug("irq: Default host set to @0x%p\n", host);
1da177e4 552
0ebfff14
BH
553 irq_default_host = host;
554}
1da177e4 555
0ebfff14
BH
556void irq_set_virq_count(unsigned int count)
557{
558 pr_debug("irq: Trying to set virq count to %d\n", count);
fef1c772 559
0ebfff14
BH
560 BUG_ON(count < NUM_ISA_INTERRUPTS);
561 if (count < NR_IRQS)
562 irq_virq_count = count;
563}
564
8ec8f2e8
BH
565/* radix tree not lockless safe ! we use a brlock-type mecanism
566 * for now, until we can use a lockless radix tree
567 */
568static void irq_radix_wrlock(unsigned long *flags)
569{
570 unsigned int cpu, ok;
571
572 spin_lock_irqsave(&irq_big_lock, *flags);
573 irq_radix_writer = 1;
574 smp_mb();
575 do {
576 barrier();
577 ok = 1;
578 for_each_possible_cpu(cpu) {
579 if (per_cpu(irq_radix_reader, cpu)) {
580 ok = 0;
581 break;
582 }
583 }
584 if (!ok)
585 cpu_relax();
586 } while(!ok);
587}
588
589static void irq_radix_wrunlock(unsigned long flags)
590{
591 smp_wmb();
592 irq_radix_writer = 0;
593 spin_unlock_irqrestore(&irq_big_lock, flags);
594}
595
596static void irq_radix_rdlock(unsigned long *flags)
597{
598 local_irq_save(*flags);
599 __get_cpu_var(irq_radix_reader) = 1;
600 smp_mb();
601 if (likely(irq_radix_writer == 0))
602 return;
603 __get_cpu_var(irq_radix_reader) = 0;
604 smp_wmb();
605 spin_lock(&irq_big_lock);
606 __get_cpu_var(irq_radix_reader) = 1;
607 spin_unlock(&irq_big_lock);
608}
609
610static void irq_radix_rdunlock(unsigned long flags)
611{
612 __get_cpu_var(irq_radix_reader) = 0;
613 local_irq_restore(flags);
614}
615
6fde40f3
ME
616static int irq_setup_virq(struct irq_host *host, unsigned int virq,
617 irq_hw_number_t hwirq)
618{
619 /* Clear IRQ_NOREQUEST flag */
620 get_irq_desc(virq)->status &= ~IRQ_NOREQUEST;
621
622 /* map it */
623 smp_wmb();
624 irq_map[virq].hwirq = hwirq;
625 smp_mb();
626
627 if (host->ops->map(host, virq, hwirq)) {
628 pr_debug("irq: -> mapping failed, freeing\n");
629 irq_free_virt(virq, 1);
630 return -1;
631 }
632
633 return 0;
634}
8ec8f2e8 635
ee51de56
ME
636unsigned int irq_create_direct_mapping(struct irq_host *host)
637{
638 unsigned int virq;
639
640 if (host == NULL)
641 host = irq_default_host;
642
643 BUG_ON(host == NULL);
644 WARN_ON(host->revmap_type != IRQ_HOST_MAP_NOMAP);
645
646 virq = irq_alloc_virt(host, 1, 0);
647 if (virq == NO_IRQ) {
648 pr_debug("irq: create_direct virq allocation failed\n");
649 return NO_IRQ;
650 }
651
652 pr_debug("irq: create_direct obtained virq %d\n", virq);
653
654 if (irq_setup_virq(host, virq, virq))
655 return NO_IRQ;
656
657 return virq;
658}
659
0ebfff14 660unsigned int irq_create_mapping(struct irq_host *host,
6e99e458 661 irq_hw_number_t hwirq)
0ebfff14
BH
662{
663 unsigned int virq, hint;
664
6e99e458 665 pr_debug("irq: irq_create_mapping(0x%p, 0x%lx)\n", host, hwirq);
0ebfff14
BH
666
667 /* Look for default host if nececssary */
668 if (host == NULL)
669 host = irq_default_host;
670 if (host == NULL) {
671 printk(KERN_WARNING "irq_create_mapping called for"
672 " NULL host, hwirq=%lx\n", hwirq);
673 WARN_ON(1);
674 return NO_IRQ;
1da177e4 675 }
0ebfff14 676 pr_debug("irq: -> using host @%p\n", host);
1da177e4 677
0ebfff14
BH
678 /* Check if mapping already exist, if it does, call
679 * host->ops->map() to update the flags
680 */
681 virq = irq_find_mapping(host, hwirq);
f5921697 682 if (virq != NO_IRQ) {
acc900ef
IK
683 if (host->ops->remap)
684 host->ops->remap(host, virq, hwirq);
0ebfff14 685 pr_debug("irq: -> existing mapping on virq %d\n", virq);
0ebfff14 686 return virq;
1da177e4
LT
687 }
688
0ebfff14
BH
689 /* Get a virtual interrupt number */
690 if (host->revmap_type == IRQ_HOST_MAP_LEGACY) {
691 /* Handle legacy */
692 virq = (unsigned int)hwirq;
693 if (virq == 0 || virq >= NUM_ISA_INTERRUPTS)
694 return NO_IRQ;
695 return virq;
696 } else {
697 /* Allocate a virtual interrupt number */
698 hint = hwirq % irq_virq_count;
699 virq = irq_alloc_virt(host, 1, hint);
700 if (virq == NO_IRQ) {
701 pr_debug("irq: -> virq allocation failed\n");
702 return NO_IRQ;
703 }
704 }
705 pr_debug("irq: -> obtained virq %d\n", virq);
706
6fde40f3 707 if (irq_setup_virq(host, virq, hwirq))
0ebfff14 708 return NO_IRQ;
6fde40f3 709
1da177e4 710 return virq;
0ebfff14
BH
711}
712EXPORT_SYMBOL_GPL(irq_create_mapping);
713
f3d2ab41
AV
714unsigned int irq_create_of_mapping(struct device_node *controller,
715 u32 *intspec, unsigned int intsize)
0ebfff14
BH
716{
717 struct irq_host *host;
718 irq_hw_number_t hwirq;
6e99e458
BH
719 unsigned int type = IRQ_TYPE_NONE;
720 unsigned int virq;
1da177e4 721
0ebfff14
BH
722 if (controller == NULL)
723 host = irq_default_host;
724 else
725 host = irq_find_host(controller);
6e99e458
BH
726 if (host == NULL) {
727 printk(KERN_WARNING "irq: no irq host found for %s !\n",
728 controller->full_name);
0ebfff14 729 return NO_IRQ;
6e99e458 730 }
0ebfff14
BH
731
732 /* If host has no translation, then we assume interrupt line */
733 if (host->ops->xlate == NULL)
734 hwirq = intspec[0];
735 else {
736 if (host->ops->xlate(host, controller, intspec, intsize,
6e99e458 737 &hwirq, &type))
0ebfff14 738 return NO_IRQ;
1da177e4 739 }
0ebfff14 740
6e99e458
BH
741 /* Create mapping */
742 virq = irq_create_mapping(host, hwirq);
743 if (virq == NO_IRQ)
744 return virq;
745
746 /* Set type if specified and different than the current one */
747 if (type != IRQ_TYPE_NONE &&
748 type != (get_irq_desc(virq)->status & IRQF_TRIGGER_MASK))
749 set_irq_type(virq, type);
750 return virq;
1da177e4 751}
0ebfff14 752EXPORT_SYMBOL_GPL(irq_create_of_mapping);
1da177e4 753
0ebfff14 754unsigned int irq_of_parse_and_map(struct device_node *dev, int index)
1da177e4 755{
0ebfff14 756 struct of_irq oirq;
1da177e4 757
0ebfff14
BH
758 if (of_irq_map_one(dev, index, &oirq))
759 return NO_IRQ;
1da177e4 760
0ebfff14
BH
761 return irq_create_of_mapping(oirq.controller, oirq.specifier,
762 oirq.size);
763}
764EXPORT_SYMBOL_GPL(irq_of_parse_and_map);
1da177e4 765
0ebfff14
BH
766void irq_dispose_mapping(unsigned int virq)
767{
5414c6be 768 struct irq_host *host;
0ebfff14
BH
769 irq_hw_number_t hwirq;
770 unsigned long flags;
1da177e4 771
5414c6be
ME
772 if (virq == NO_IRQ)
773 return;
774
775 host = irq_map[virq].host;
0ebfff14
BH
776 WARN_ON (host == NULL);
777 if (host == NULL)
778 return;
1da177e4 779
0ebfff14
BH
780 /* Never unmap legacy interrupts */
781 if (host->revmap_type == IRQ_HOST_MAP_LEGACY)
782 return;
1da177e4 783
0ebfff14
BH
784 /* remove chip and handler */
785 set_irq_chip_and_handler(virq, NULL, NULL);
786
787 /* Make sure it's completed */
788 synchronize_irq(virq);
789
790 /* Tell the PIC about it */
791 if (host->ops->unmap)
792 host->ops->unmap(host, virq);
793 smp_mb();
794
795 /* Clear reverse map */
796 hwirq = irq_map[virq].hwirq;
797 switch(host->revmap_type) {
798 case IRQ_HOST_MAP_LINEAR:
799 if (hwirq < host->revmap_data.linear.size)
f5921697 800 host->revmap_data.linear.revmap[hwirq] = NO_IRQ;
0ebfff14
BH
801 break;
802 case IRQ_HOST_MAP_TREE:
803 /* Check if radix tree allocated yet */
804 if (host->revmap_data.tree.gfp_mask == 0)
805 break;
8ec8f2e8 806 irq_radix_wrlock(&flags);
0ebfff14 807 radix_tree_delete(&host->revmap_data.tree, hwirq);
8ec8f2e8 808 irq_radix_wrunlock(flags);
0ebfff14
BH
809 break;
810 }
1da177e4 811
0ebfff14
BH
812 /* Destroy map */
813 smp_mb();
814 irq_map[virq].hwirq = host->inval_irq;
1da177e4 815
0ebfff14
BH
816 /* Set some flags */
817 get_irq_desc(virq)->status |= IRQ_NOREQUEST;
1da177e4 818
0ebfff14
BH
819 /* Free it */
820 irq_free_virt(virq, 1);
1da177e4 821}
0ebfff14 822EXPORT_SYMBOL_GPL(irq_dispose_mapping);
1da177e4 823
0ebfff14
BH
824unsigned int irq_find_mapping(struct irq_host *host,
825 irq_hw_number_t hwirq)
826{
827 unsigned int i;
828 unsigned int hint = hwirq % irq_virq_count;
829
830 /* Look for default host if nececssary */
831 if (host == NULL)
832 host = irq_default_host;
833 if (host == NULL)
834 return NO_IRQ;
835
836 /* legacy -> bail early */
837 if (host->revmap_type == IRQ_HOST_MAP_LEGACY)
838 return hwirq;
839
840 /* Slow path does a linear search of the map */
841 if (hint < NUM_ISA_INTERRUPTS)
842 hint = NUM_ISA_INTERRUPTS;
843 i = hint;
844 do {
845 if (irq_map[i].host == host &&
846 irq_map[i].hwirq == hwirq)
847 return i;
848 i++;
849 if (i >= irq_virq_count)
850 i = NUM_ISA_INTERRUPTS;
851 } while(i != hint);
852 return NO_IRQ;
853}
854EXPORT_SYMBOL_GPL(irq_find_mapping);
1da177e4 855
0ebfff14
BH
856
857unsigned int irq_radix_revmap(struct irq_host *host,
858 irq_hw_number_t hwirq)
1da177e4 859{
0ebfff14
BH
860 struct radix_tree_root *tree;
861 struct irq_map_entry *ptr;
862 unsigned int virq;
863 unsigned long flags;
1da177e4 864
0ebfff14 865 WARN_ON(host->revmap_type != IRQ_HOST_MAP_TREE);
1da177e4 866
0ebfff14
BH
867 /* Check if the radix tree exist yet. We test the value of
868 * the gfp_mask for that. Sneaky but saves another int in the
869 * structure. If not, we fallback to slow mode
870 */
871 tree = &host->revmap_data.tree;
872 if (tree->gfp_mask == 0)
873 return irq_find_mapping(host, hwirq);
874
0ebfff14 875 /* Now try to resolve */
8ec8f2e8 876 irq_radix_rdlock(&flags);
0ebfff14 877 ptr = radix_tree_lookup(tree, hwirq);
8ec8f2e8
BH
878 irq_radix_rdunlock(flags);
879
0ebfff14
BH
880 /* Found it, return */
881 if (ptr) {
882 virq = ptr - irq_map;
8ec8f2e8 883 return virq;
1da177e4 884 }
0ebfff14
BH
885
886 /* If not there, try to insert it */
887 virq = irq_find_mapping(host, hwirq);
8ec8f2e8
BH
888 if (virq != NO_IRQ) {
889 irq_radix_wrlock(&flags);
e5c14ce1 890 radix_tree_insert(tree, hwirq, &irq_map[virq]);
8ec8f2e8
BH
891 irq_radix_wrunlock(flags);
892 }
0ebfff14 893 return virq;
1da177e4
LT
894}
895
0ebfff14
BH
896unsigned int irq_linear_revmap(struct irq_host *host,
897 irq_hw_number_t hwirq)
c6622f63 898{
0ebfff14 899 unsigned int *revmap;
c6622f63 900
0ebfff14
BH
901 WARN_ON(host->revmap_type != IRQ_HOST_MAP_LINEAR);
902
903 /* Check revmap bounds */
904 if (unlikely(hwirq >= host->revmap_data.linear.size))
905 return irq_find_mapping(host, hwirq);
906
907 /* Check if revmap was allocated */
908 revmap = host->revmap_data.linear.revmap;
909 if (unlikely(revmap == NULL))
910 return irq_find_mapping(host, hwirq);
911
912 /* Fill up revmap with slow path if no mapping found */
913 if (unlikely(revmap[hwirq] == NO_IRQ))
914 revmap[hwirq] = irq_find_mapping(host, hwirq);
915
916 return revmap[hwirq];
c6622f63
PM
917}
918
0ebfff14
BH
919unsigned int irq_alloc_virt(struct irq_host *host,
920 unsigned int count,
921 unsigned int hint)
922{
923 unsigned long flags;
924 unsigned int i, j, found = NO_IRQ;
c6622f63 925
0ebfff14
BH
926 if (count == 0 || count > (irq_virq_count - NUM_ISA_INTERRUPTS))
927 return NO_IRQ;
928
929 spin_lock_irqsave(&irq_big_lock, flags);
930
931 /* Use hint for 1 interrupt if any */
932 if (count == 1 && hint >= NUM_ISA_INTERRUPTS &&
933 hint < irq_virq_count && irq_map[hint].host == NULL) {
934 found = hint;
935 goto hint_found;
936 }
937
938 /* Look for count consecutive numbers in the allocatable
939 * (non-legacy) space
940 */
e1251465
ME
941 for (i = NUM_ISA_INTERRUPTS, j = 0; i < irq_virq_count; i++) {
942 if (irq_map[i].host != NULL)
943 j = 0;
944 else
945 j++;
946
947 if (j == count) {
948 found = i - count + 1;
949 break;
950 }
0ebfff14
BH
951 }
952 if (found == NO_IRQ) {
953 spin_unlock_irqrestore(&irq_big_lock, flags);
954 return NO_IRQ;
955 }
956 hint_found:
957 for (i = found; i < (found + count); i++) {
958 irq_map[i].hwirq = host->inval_irq;
959 smp_wmb();
960 irq_map[i].host = host;
961 }
962 spin_unlock_irqrestore(&irq_big_lock, flags);
963 return found;
964}
965
966void irq_free_virt(unsigned int virq, unsigned int count)
1da177e4
LT
967{
968 unsigned long flags;
0ebfff14 969 unsigned int i;
1da177e4 970
0ebfff14
BH
971 WARN_ON (virq < NUM_ISA_INTERRUPTS);
972 WARN_ON (count == 0 || (virq + count) > irq_virq_count);
1da177e4 973
0ebfff14
BH
974 spin_lock_irqsave(&irq_big_lock, flags);
975 for (i = virq; i < (virq + count); i++) {
976 struct irq_host *host;
1da177e4 977
0ebfff14
BH
978 if (i < NUM_ISA_INTERRUPTS ||
979 (virq + count) > irq_virq_count)
980 continue;
1da177e4 981
0ebfff14
BH
982 host = irq_map[i].host;
983 irq_map[i].hwirq = host->inval_irq;
984 smp_wmb();
985 irq_map[i].host = NULL;
986 }
987 spin_unlock_irqrestore(&irq_big_lock, flags);
1da177e4 988}
0ebfff14
BH
989
990void irq_early_init(void)
991{
992 unsigned int i;
993
994 for (i = 0; i < NR_IRQS; i++)
995 get_irq_desc(i)->status |= IRQ_NOREQUEST;
996}
997
998/* We need to create the radix trees late */
999static int irq_late_init(void)
1000{
1001 struct irq_host *h;
1002 unsigned long flags;
1003
8ec8f2e8 1004 irq_radix_wrlock(&flags);
0ebfff14
BH
1005 list_for_each_entry(h, &irq_hosts, link) {
1006 if (h->revmap_type == IRQ_HOST_MAP_TREE)
1007 INIT_RADIX_TREE(&h->revmap_data.tree, GFP_ATOMIC);
1008 }
8ec8f2e8 1009 irq_radix_wrunlock(flags);
0ebfff14
BH
1010
1011 return 0;
1012}
1013arch_initcall(irq_late_init);
1014
60b332e7
ME
1015#ifdef CONFIG_VIRQ_DEBUG
1016static int virq_debug_show(struct seq_file *m, void *private)
1017{
1018 unsigned long flags;
1019 irq_desc_t *desc;
1020 const char *p;
1021 char none[] = "none";
1022 int i;
1023
1024 seq_printf(m, "%-5s %-7s %-15s %s\n", "virq", "hwirq",
1025 "chip name", "host name");
1026
1027 for (i = 1; i < NR_IRQS; i++) {
1028 desc = get_irq_desc(i);
1029 spin_lock_irqsave(&desc->lock, flags);
1030
1031 if (desc->action && desc->action->handler) {
1032 seq_printf(m, "%5d ", i);
1033 seq_printf(m, "0x%05lx ", virq_to_hw(i));
1034
1035 if (desc->chip && desc->chip->typename)
1036 p = desc->chip->typename;
1037 else
1038 p = none;
1039 seq_printf(m, "%-15s ", p);
1040
1041 if (irq_map[i].host && irq_map[i].host->of_node)
1042 p = irq_map[i].host->of_node->full_name;
1043 else
1044 p = none;
1045 seq_printf(m, "%s\n", p);
1046 }
1047
1048 spin_unlock_irqrestore(&desc->lock, flags);
1049 }
1050
1051 return 0;
1052}
1053
1054static int virq_debug_open(struct inode *inode, struct file *file)
1055{
1056 return single_open(file, virq_debug_show, inode->i_private);
1057}
1058
1059static const struct file_operations virq_debug_fops = {
1060 .open = virq_debug_open,
1061 .read = seq_read,
1062 .llseek = seq_lseek,
1063 .release = single_release,
1064};
1065
1066static int __init irq_debugfs_init(void)
1067{
1068 if (debugfs_create_file("virq_mapping", S_IRUGO, powerpc_debugfs_root,
1069 NULL, &virq_debug_fops))
1070 return -ENOMEM;
1071
1072 return 0;
1073}
1074__initcall(irq_debugfs_init);
1075#endif /* CONFIG_VIRQ_DEBUG */
1076
0ebfff14 1077#endif /* CONFIG_PPC_MERGE */
1da177e4 1078
c6622f63 1079#ifdef CONFIG_PPC64
1da177e4
LT
1080static int __init setup_noirqdistrib(char *str)
1081{
1082 distribute_irqs = 0;
1083 return 1;
1084}
1085
1086__setup("noirqdistrib", setup_noirqdistrib);
756e7104 1087#endif /* CONFIG_PPC64 */