of: kill struct of_device
[GitHub/mt8127/android_kernel_alcatel_ttab.git] / arch / powerpc / kernel / irq.c
CommitLineData
1da177e4 1/*
1da177e4
LT
2 * Derived from arch/i386/kernel/irq.c
3 * Copyright (C) 1992 Linus Torvalds
4 * Adapted from arch/i386 by Gary Thomas
5 * Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org)
756e7104
SR
6 * Updated and modified by Cort Dougan <cort@fsmlabs.com>
7 * Copyright (C) 1996-2001 Cort Dougan
1da177e4
LT
8 * Adapted for Power Macintosh by Paul Mackerras
9 * Copyright (C) 1996 Paul Mackerras (paulus@cs.anu.edu.au)
756e7104 10 *
1da177e4
LT
11 * This program is free software; you can redistribute it and/or
12 * modify it under the terms of the GNU General Public License
13 * as published by the Free Software Foundation; either version
14 * 2 of the License, or (at your option) any later version.
15 *
16 * This file contains the code used by various IRQ handling routines:
17 * asking for different IRQ's should be done through these routines
18 * instead of just grabbing them. Thus setups with different IRQ numbers
19 * shouldn't result in any weird surprises, and installing new handlers
20 * should be easier.
756e7104
SR
21 *
22 * The MPC8xx has an interrupt mask in the SIU. If a bit is set, the
23 * interrupt is _enabled_. As expected, IRQ0 is bit 0 in the 32-bit
24 * mask register (of which only 16 are defined), hence the weird shifting
25 * and complement of the cached_irq_mask. I want to be able to stuff
26 * this right into the SIU SMASK register.
27 * Many of the prep/chrp functions are conditional compiled on CONFIG_8xx
28 * to reduce code space and undefined function references.
1da177e4
LT
29 */
30
0ebfff14
BH
31#undef DEBUG
32
1da177e4
LT
33#include <linux/module.h>
34#include <linux/threads.h>
35#include <linux/kernel_stat.h>
36#include <linux/signal.h>
37#include <linux/sched.h>
756e7104 38#include <linux/ptrace.h>
1da177e4
LT
39#include <linux/ioport.h>
40#include <linux/interrupt.h>
41#include <linux/timex.h>
1da177e4
LT
42#include <linux/init.h>
43#include <linux/slab.h>
1da177e4
LT
44#include <linux/delay.h>
45#include <linux/irq.h>
756e7104
SR
46#include <linux/seq_file.h>
47#include <linux/cpumask.h>
1da177e4
LT
48#include <linux/profile.h>
49#include <linux/bitops.h>
0ebfff14
BH
50#include <linux/list.h>
51#include <linux/radix-tree.h>
52#include <linux/mutex.h>
53#include <linux/bootmem.h>
45934c47 54#include <linux/pci.h>
60b332e7 55#include <linux/debugfs.h>
1da177e4
LT
56
57#include <asm/uaccess.h>
58#include <asm/system.h>
59#include <asm/io.h>
60#include <asm/pgtable.h>
61#include <asm/irq.h>
62#include <asm/cache.h>
63#include <asm/prom.h>
64#include <asm/ptrace.h>
1da177e4 65#include <asm/machdep.h>
0ebfff14 66#include <asm/udbg.h>
d04c56f7 67#ifdef CONFIG_PPC64
1da177e4 68#include <asm/paca.h>
d04c56f7 69#include <asm/firmware.h>
0874dd40 70#include <asm/lv1call.h>
756e7104 71#endif
1bf4af16
AB
72#define CREATE_TRACE_POINTS
73#include <asm/trace.h>
1da177e4 74
8c007bfd
AB
75DEFINE_PER_CPU_SHARED_ALIGNED(irq_cpustat_t, irq_stat);
76EXPORT_PER_CPU_SYMBOL(irq_stat);
77
868accb7 78int __irq_offset_value;
756e7104 79
756e7104 80#ifdef CONFIG_PPC32
b9e5b4e6
BH
81EXPORT_SYMBOL(__irq_offset_value);
82atomic_t ppc_n_lost_interrupts;
756e7104 83
756e7104
SR
84#ifdef CONFIG_TAU_INT
85extern int tau_initialized;
86extern int tau_interrupts(int);
87#endif
b9e5b4e6 88#endif /* CONFIG_PPC32 */
756e7104 89
756e7104 90#ifdef CONFIG_PPC64
cd015707
ME
91
92#ifndef CONFIG_SPARSE_IRQ
1da177e4 93EXPORT_SYMBOL(irq_desc);
cd015707 94#endif
1da177e4
LT
95
96int distribute_irqs = 1;
d04c56f7 97
4e491d14 98static inline notrace unsigned long get_hard_enabled(void)
ef2b343e
HD
99{
100 unsigned long enabled;
101
102 __asm__ __volatile__("lbz %0,%1(13)"
103 : "=r" (enabled) : "i" (offsetof(struct paca_struct, hard_enabled)));
104
105 return enabled;
106}
107
4e491d14 108static inline notrace void set_soft_enabled(unsigned long enable)
ef2b343e
HD
109{
110 __asm__ __volatile__("stb %0,%1(13)"
111 : : "r" (enable), "i" (offsetof(struct paca_struct, soft_enabled)));
112}
113
4e491d14 114notrace void raw_local_irq_restore(unsigned long en)
d04c56f7 115{
ef2b343e
HD
116 /*
117 * get_paca()->soft_enabled = en;
118 * Is it ever valid to use local_irq_restore(0) when soft_enabled is 1?
119 * That was allowed before, and in such a case we do need to take care
120 * that gcc will set soft_enabled directly via r13, not choose to use
121 * an intermediate register, lest we're preempted to a different cpu.
122 */
123 set_soft_enabled(en);
d04c56f7
PM
124 if (!en)
125 return;
126
94491685 127#ifdef CONFIG_PPC_STD_MMU_64
d04c56f7 128 if (firmware_has_feature(FW_FEATURE_ISERIES)) {
ef2b343e
HD
129 /*
130 * Do we need to disable preemption here? Not really: in the
131 * unlikely event that we're preempted to a different cpu in
132 * between getting r13, loading its lppaca_ptr, and loading
133 * its any_int, we might call iseries_handle_interrupts without
134 * an interrupt pending on the new cpu, but that's no disaster,
135 * is it? And the business of preempting us off the old cpu
136 * would itself involve a local_irq_restore which handles the
137 * interrupt to that cpu.
138 *
139 * But use "local_paca->lppaca_ptr" instead of "get_lppaca()"
140 * to avoid any preemption checking added into get_paca().
141 */
142 if (local_paca->lppaca_ptr->int_dword.any_int)
d04c56f7 143 iseries_handle_interrupts();
d04c56f7 144 }
94491685 145#endif /* CONFIG_PPC_STD_MMU_64 */
d04c56f7 146
ef2b343e
HD
147 /*
148 * if (get_paca()->hard_enabled) return;
149 * But again we need to take care that gcc gets hard_enabled directly
150 * via r13, not choose to use an intermediate register, lest we're
151 * preempted to a different cpu in between the two instructions.
152 */
153 if (get_hard_enabled())
d04c56f7 154 return;
ef2b343e
HD
155
156 /*
157 * Need to hard-enable interrupts here. Since currently disabled,
158 * no need to take further asm precautions against preemption; but
159 * use local_paca instead of get_paca() to avoid preemption checking.
160 */
161 local_paca->hard_enabled = en;
d04c56f7
PM
162 if ((int)mfspr(SPRN_DEC) < 0)
163 mtspr(SPRN_DEC, 1);
0874dd40
TS
164
165 /*
166 * Force the delivery of pending soft-disabled interrupts on PS3.
167 * Any HV call will have this side effect.
168 */
169 if (firmware_has_feature(FW_FEATURE_PS3_LV1)) {
170 u64 tmp;
171 lv1_get_version_info(&tmp);
172 }
173
e1fa2e13 174 __hard_irq_enable();
d04c56f7 175}
945feb17 176EXPORT_SYMBOL(raw_local_irq_restore);
756e7104 177#endif /* CONFIG_PPC64 */
1da177e4 178
c86845ed
AB
179static int show_other_interrupts(struct seq_file *p, int prec)
180{
181 int j;
182
183#if defined(CONFIG_PPC32) && defined(CONFIG_TAU_INT)
184 if (tau_initialized) {
185 seq_printf(p, "%*s: ", prec, "TAU");
186 for_each_online_cpu(j)
187 seq_printf(p, "%10u ", tau_interrupts(j));
188 seq_puts(p, " PowerPC Thermal Assist (cpu temp)\n");
189 }
190#endif /* CONFIG_PPC32 && CONFIG_TAU_INT */
191
89713ed1
AB
192 seq_printf(p, "%*s: ", prec, "LOC");
193 for_each_online_cpu(j)
194 seq_printf(p, "%10u ", per_cpu(irq_stat, j).timer_irqs);
195 seq_printf(p, " Local timer interrupts\n");
196
17081102
AB
197 seq_printf(p, "%*s: ", prec, "SPU");
198 for_each_online_cpu(j)
199 seq_printf(p, "%10u ", per_cpu(irq_stat, j).spurious_irqs);
200 seq_printf(p, " Spurious interrupts\n");
201
89713ed1
AB
202 seq_printf(p, "%*s: ", prec, "CNT");
203 for_each_online_cpu(j)
204 seq_printf(p, "%10u ", per_cpu(irq_stat, j).pmu_irqs);
205 seq_printf(p, " Performance monitoring interrupts\n");
206
207 seq_printf(p, "%*s: ", prec, "MCE");
208 for_each_online_cpu(j)
209 seq_printf(p, "%10u ", per_cpu(irq_stat, j).mce_exceptions);
210 seq_printf(p, " Machine check exceptions\n");
211
c86845ed
AB
212 return 0;
213}
214
1da177e4
LT
215int show_interrupts(struct seq_file *p, void *v)
216{
c86845ed
AB
217 unsigned long flags, any_count = 0;
218 int i = *(loff_t *) v, j, prec;
756e7104 219 struct irqaction *action;
97f7d6bc 220 struct irq_desc *desc;
1da177e4 221
c86845ed
AB
222 if (i > nr_irqs)
223 return 0;
224
225 for (prec = 3, j = 1000; prec < 10 && j <= nr_irqs; ++prec)
226 j *= 10;
227
228 if (i == nr_irqs)
229 return show_other_interrupts(p, prec);
230
231 /* print header */
1da177e4 232 if (i == 0) {
c86845ed 233 seq_printf(p, "%*s", prec + 8, "");
756e7104 234 for_each_online_cpu(j)
c86845ed 235 seq_printf(p, "CPU%-8d", j);
1da177e4 236 seq_putc(p, '\n');
756e7104 237 }
750ab112
ME
238
239 desc = irq_to_desc(i);
240 if (!desc)
241 return 0;
242
239007b8 243 raw_spin_lock_irqsave(&desc->lock, flags);
c86845ed
AB
244 for_each_online_cpu(j)
245 any_count |= kstat_irqs_cpu(i, j);
750ab112 246 action = desc->action;
c86845ed
AB
247 if (!action && !any_count)
248 goto out;
750ab112 249
c86845ed 250 seq_printf(p, "%*d: ", prec, i);
750ab112
ME
251 for_each_online_cpu(j)
252 seq_printf(p, "%10u ", kstat_irqs_cpu(i, j));
750ab112
ME
253
254 if (desc->chip)
c86845ed 255 seq_printf(p, " %-16s", desc->chip->name);
750ab112 256 else
c86845ed
AB
257 seq_printf(p, " %-16s", "None");
258 seq_printf(p, " %-8s", (desc->status & IRQ_LEVEL) ? "Level" : "Edge");
750ab112 259
c86845ed
AB
260 if (action) {
261 seq_printf(p, " %s", action->name);
262 while ((action = action->next) != NULL)
263 seq_printf(p, ", %s", action->name);
264 }
750ab112 265
750ab112 266 seq_putc(p, '\n');
c86845ed 267out:
239007b8 268 raw_spin_unlock_irqrestore(&desc->lock, flags);
1da177e4
LT
269 return 0;
270}
271
89713ed1
AB
272/*
273 * /proc/stat helpers
274 */
275u64 arch_irq_stat_cpu(unsigned int cpu)
276{
277 u64 sum = per_cpu(irq_stat, cpu).timer_irqs;
278
279 sum += per_cpu(irq_stat, cpu).pmu_irqs;
280 sum += per_cpu(irq_stat, cpu).mce_exceptions;
17081102 281 sum += per_cpu(irq_stat, cpu).spurious_irqs;
89713ed1
AB
282
283 return sum;
284}
285
1da177e4 286#ifdef CONFIG_HOTPLUG_CPU
b6decb70 287void fixup_irqs(const struct cpumask *map)
1da177e4 288{
6cff46f4 289 struct irq_desc *desc;
1da177e4
LT
290 unsigned int irq;
291 static int warned;
b6decb70 292 cpumask_var_t mask;
1da177e4 293
b6decb70 294 alloc_cpumask_var(&mask, GFP_KERNEL);
1da177e4 295
b6decb70 296 for_each_irq(irq) {
6cff46f4
ME
297 desc = irq_to_desc(irq);
298 if (desc && desc->status & IRQ_PER_CPU)
1da177e4
LT
299 continue;
300
b6decb70
AB
301 cpumask_and(mask, desc->affinity, map);
302 if (cpumask_any(mask) >= nr_cpu_ids) {
1da177e4 303 printk("Breaking affinity for irq %i\n", irq);
b6decb70 304 cpumask_copy(mask, map);
1da177e4 305 }
6cff46f4 306 if (desc->chip->set_affinity)
b6decb70 307 desc->chip->set_affinity(irq, mask);
6cff46f4 308 else if (desc->action && !(warned++))
1da177e4
LT
309 printk("Cannot set affinity for irq %i\n", irq);
310 }
311
b6decb70
AB
312 free_cpumask_var(mask);
313
1da177e4
LT
314 local_irq_enable();
315 mdelay(1);
316 local_irq_disable();
317}
318#endif
319
f2694ba5
ME
320#ifdef CONFIG_IRQSTACKS
321static inline void handle_one_irq(unsigned int irq)
322{
323 struct thread_info *curtp, *irqtp;
324 unsigned long saved_sp_limit;
325 struct irq_desc *desc;
f2694ba5
ME
326
327 /* Switch to the irq stack to handle this */
328 curtp = current_thread_info();
329 irqtp = hardirq_ctx[smp_processor_id()];
330
331 if (curtp == irqtp) {
332 /* We're already on the irq stack, just handle it */
333 generic_handle_irq(irq);
334 return;
335 }
336
6cff46f4 337 desc = irq_to_desc(irq);
f2694ba5
ME
338 saved_sp_limit = current->thread.ksp_limit;
339
f2694ba5
ME
340 irqtp->task = curtp->task;
341 irqtp->flags = 0;
342
343 /* Copy the softirq bits in preempt_count so that the
344 * softirq checks work in the hardirq context. */
345 irqtp->preempt_count = (irqtp->preempt_count & ~SOFTIRQ_MASK) |
346 (curtp->preempt_count & SOFTIRQ_MASK);
347
348 current->thread.ksp_limit = (unsigned long)irqtp +
349 _ALIGN_UP(sizeof(struct thread_info), 16);
350
835363e6 351 call_handle_irq(irq, desc, irqtp, desc->handle_irq);
f2694ba5
ME
352 current->thread.ksp_limit = saved_sp_limit;
353 irqtp->task = NULL;
354
355 /* Set any flag that may have been set on the
356 * alternate stack
357 */
358 if (irqtp->flags)
359 set_bits(irqtp->flags, &curtp->flags);
360}
361#else
362static inline void handle_one_irq(unsigned int irq)
363{
364 generic_handle_irq(irq);
365}
366#endif
367
d7cb10d6
ME
368static inline void check_stack_overflow(void)
369{
370#ifdef CONFIG_DEBUG_STACKOVERFLOW
371 long sp;
372
373 sp = __get_SP() & (THREAD_SIZE-1);
374
375 /* check for stack overflow: is there less than 2KB free? */
376 if (unlikely(sp < (sizeof(struct thread_info) + 2048))) {
377 printk("do_IRQ: stack overflow: %ld\n",
378 sp - sizeof(struct thread_info));
379 dump_stack();
380 }
381#endif
382}
383
1da177e4
LT
384void do_IRQ(struct pt_regs *regs)
385{
7d12e780 386 struct pt_regs *old_regs = set_irq_regs(regs);
0ebfff14 387 unsigned int irq;
1da177e4 388
1bf4af16
AB
389 trace_irq_entry(regs);
390
4b218e9b 391 irq_enter();
1da177e4 392
d7cb10d6 393 check_stack_overflow();
1da177e4 394
35a84c2f 395 irq = ppc_md.get_irq();
1da177e4 396
f2694ba5
ME
397 if (irq != NO_IRQ && irq != NO_IRQ_IGNORE)
398 handle_one_irq(irq);
399 else if (irq != NO_IRQ_IGNORE)
17081102 400 __get_cpu_var(irq_stat).spurious_irqs++;
e199500c 401
4b218e9b 402 irq_exit();
7d12e780 403 set_irq_regs(old_regs);
756e7104 404
e199500c 405#ifdef CONFIG_PPC_ISERIES
b06a3183
SR
406 if (firmware_has_feature(FW_FEATURE_ISERIES) &&
407 get_lppaca()->int_dword.fields.decr_int) {
3356bb9f
DG
408 get_lppaca()->int_dword.fields.decr_int = 0;
409 /* Signal a fake decrementer interrupt */
410 timer_interrupt(regs);
e199500c
SR
411 }
412#endif
1bf4af16
AB
413
414 trace_irq_exit(regs);
e199500c 415}
1da177e4
LT
416
417void __init init_IRQ(void)
418{
70584578
SR
419 if (ppc_md.init_IRQ)
420 ppc_md.init_IRQ();
bcf0b088
KG
421
422 exc_lvl_ctx_init();
423
1da177e4
LT
424 irq_ctx_init();
425}
426
bcf0b088
KG
427#if defined(CONFIG_BOOKE) || defined(CONFIG_40x)
428struct thread_info *critirq_ctx[NR_CPUS] __read_mostly;
429struct thread_info *dbgirq_ctx[NR_CPUS] __read_mostly;
430struct thread_info *mcheckirq_ctx[NR_CPUS] __read_mostly;
431
432void exc_lvl_ctx_init(void)
433{
434 struct thread_info *tp;
435 int i;
436
437 for_each_possible_cpu(i) {
438 memset((void *)critirq_ctx[i], 0, THREAD_SIZE);
439 tp = critirq_ctx[i];
440 tp->cpu = i;
441 tp->preempt_count = 0;
442
443#ifdef CONFIG_BOOKE
444 memset((void *)dbgirq_ctx[i], 0, THREAD_SIZE);
445 tp = dbgirq_ctx[i];
446 tp->cpu = i;
447 tp->preempt_count = 0;
448
449 memset((void *)mcheckirq_ctx[i], 0, THREAD_SIZE);
450 tp = mcheckirq_ctx[i];
451 tp->cpu = i;
452 tp->preempt_count = HARDIRQ_OFFSET;
453#endif
454 }
455}
456#endif
1da177e4 457
1da177e4 458#ifdef CONFIG_IRQSTACKS
22722051
AM
459struct thread_info *softirq_ctx[NR_CPUS] __read_mostly;
460struct thread_info *hardirq_ctx[NR_CPUS] __read_mostly;
1da177e4
LT
461
462void irq_ctx_init(void)
463{
464 struct thread_info *tp;
465 int i;
466
0e551954 467 for_each_possible_cpu(i) {
1da177e4
LT
468 memset((void *)softirq_ctx[i], 0, THREAD_SIZE);
469 tp = softirq_ctx[i];
470 tp->cpu = i;
e6768a4f 471 tp->preempt_count = 0;
1da177e4
LT
472
473 memset((void *)hardirq_ctx[i], 0, THREAD_SIZE);
474 tp = hardirq_ctx[i];
475 tp->cpu = i;
476 tp->preempt_count = HARDIRQ_OFFSET;
477 }
478}
479
c6622f63
PM
480static inline void do_softirq_onstack(void)
481{
482 struct thread_info *curtp, *irqtp;
85218827 483 unsigned long saved_sp_limit = current->thread.ksp_limit;
c6622f63
PM
484
485 curtp = current_thread_info();
486 irqtp = softirq_ctx[smp_processor_id()];
487 irqtp->task = curtp->task;
85218827
KG
488 current->thread.ksp_limit = (unsigned long)irqtp +
489 _ALIGN_UP(sizeof(struct thread_info), 16);
c6622f63 490 call_do_softirq(irqtp);
85218827 491 current->thread.ksp_limit = saved_sp_limit;
c6622f63
PM
492 irqtp->task = NULL;
493}
1da177e4 494
c6622f63
PM
495#else
496#define do_softirq_onstack() __do_softirq()
497#endif /* CONFIG_IRQSTACKS */
498
1da177e4
LT
499void do_softirq(void)
500{
501 unsigned long flags;
1da177e4
LT
502
503 if (in_interrupt())
1da177e4
LT
504 return;
505
1da177e4 506 local_irq_save(flags);
1da177e4 507
912b2539 508 if (local_softirq_pending())
c6622f63 509 do_softirq_onstack();
1da177e4
LT
510
511 local_irq_restore(flags);
1da177e4 512}
1da177e4 513
1da177e4 514
1da177e4 515/*
0ebfff14 516 * IRQ controller and virtual interrupts
1da177e4
LT
517 */
518
0ebfff14 519static LIST_HEAD(irq_hosts);
f95e085b 520static DEFINE_RAW_SPINLOCK(irq_big_lock);
967e012e 521static unsigned int revmap_trees_allocated;
150c6c8f 522static DEFINE_MUTEX(revmap_trees_mutex);
0ebfff14
BH
523struct irq_map_entry irq_map[NR_IRQS];
524static unsigned int irq_virq_count = NR_IRQS;
525static struct irq_host *irq_default_host;
1da177e4 526
35923f12
OJ
527irq_hw_number_t virq_to_hw(unsigned int virq)
528{
529 return irq_map[virq].hwirq;
530}
531EXPORT_SYMBOL_GPL(virq_to_hw);
532
68158006
ME
533static int default_irq_host_match(struct irq_host *h, struct device_node *np)
534{
535 return h->of_node != NULL && h->of_node == np;
536}
537
5669c3cf 538struct irq_host *irq_alloc_host(struct device_node *of_node,
52964f87
ME
539 unsigned int revmap_type,
540 unsigned int revmap_arg,
541 struct irq_host_ops *ops,
542 irq_hw_number_t inval_irq)
1da177e4 543{
0ebfff14
BH
544 struct irq_host *host;
545 unsigned int size = sizeof(struct irq_host);
546 unsigned int i;
547 unsigned int *rmap;
548 unsigned long flags;
549
550 /* Allocate structure and revmap table if using linear mapping */
551 if (revmap_type == IRQ_HOST_MAP_LINEAR)
552 size += revmap_arg * sizeof(unsigned int);
5669c3cf 553 host = zalloc_maybe_bootmem(size, GFP_KERNEL);
0ebfff14
BH
554 if (host == NULL)
555 return NULL;
7d01c880 556
0ebfff14
BH
557 /* Fill structure */
558 host->revmap_type = revmap_type;
559 host->inval_irq = inval_irq;
560 host->ops = ops;
19fc65b5 561 host->of_node = of_node_get(of_node);
7d01c880 562
68158006
ME
563 if (host->ops->match == NULL)
564 host->ops->match = default_irq_host_match;
7d01c880 565
f95e085b 566 raw_spin_lock_irqsave(&irq_big_lock, flags);
0ebfff14
BH
567
568 /* If it's a legacy controller, check for duplicates and
569 * mark it as allocated (we use irq 0 host pointer for that
570 */
571 if (revmap_type == IRQ_HOST_MAP_LEGACY) {
572 if (irq_map[0].host != NULL) {
f95e085b 573 raw_spin_unlock_irqrestore(&irq_big_lock, flags);
0ebfff14
BH
574 /* If we are early boot, we can't free the structure,
575 * too bad...
576 * this will be fixed once slab is made available early
577 * instead of the current cruft
578 */
579 if (mem_init_done)
580 kfree(host);
581 return NULL;
582 }
583 irq_map[0].host = host;
584 }
585
586 list_add(&host->link, &irq_hosts);
f95e085b 587 raw_spin_unlock_irqrestore(&irq_big_lock, flags);
0ebfff14
BH
588
589 /* Additional setups per revmap type */
590 switch(revmap_type) {
591 case IRQ_HOST_MAP_LEGACY:
592 /* 0 is always the invalid number for legacy */
593 host->inval_irq = 0;
594 /* setup us as the host for all legacy interrupts */
595 for (i = 1; i < NUM_ISA_INTERRUPTS; i++) {
7866291d 596 irq_map[i].hwirq = i;
0ebfff14
BH
597 smp_wmb();
598 irq_map[i].host = host;
599 smp_wmb();
600
6e99e458 601 /* Clear norequest flags */
6cff46f4 602 irq_to_desc(i)->status &= ~IRQ_NOREQUEST;
0ebfff14
BH
603
604 /* Legacy flags are left to default at this point,
605 * one can then use irq_create_mapping() to
c03983ac 606 * explicitly change them
0ebfff14 607 */
6e99e458 608 ops->map(host, i, i);
0ebfff14
BH
609 }
610 break;
611 case IRQ_HOST_MAP_LINEAR:
612 rmap = (unsigned int *)(host + 1);
613 for (i = 0; i < revmap_arg; i++)
f5921697 614 rmap[i] = NO_IRQ;
0ebfff14
BH
615 host->revmap_data.linear.size = revmap_arg;
616 smp_wmb();
617 host->revmap_data.linear.revmap = rmap;
618 break;
619 default:
620 break;
621 }
622
623 pr_debug("irq: Allocated host of type %d @0x%p\n", revmap_type, host);
624
625 return host;
1da177e4
LT
626}
627
0ebfff14 628struct irq_host *irq_find_host(struct device_node *node)
1da177e4 629{
0ebfff14
BH
630 struct irq_host *h, *found = NULL;
631 unsigned long flags;
632
633 /* We might want to match the legacy controller last since
634 * it might potentially be set to match all interrupts in
635 * the absence of a device node. This isn't a problem so far
636 * yet though...
637 */
f95e085b 638 raw_spin_lock_irqsave(&irq_big_lock, flags);
0ebfff14 639 list_for_each_entry(h, &irq_hosts, link)
68158006 640 if (h->ops->match(h, node)) {
0ebfff14
BH
641 found = h;
642 break;
643 }
f95e085b 644 raw_spin_unlock_irqrestore(&irq_big_lock, flags);
0ebfff14
BH
645 return found;
646}
647EXPORT_SYMBOL_GPL(irq_find_host);
648
649void irq_set_default_host(struct irq_host *host)
650{
651 pr_debug("irq: Default host set to @0x%p\n", host);
1da177e4 652
0ebfff14
BH
653 irq_default_host = host;
654}
1da177e4 655
0ebfff14
BH
656void irq_set_virq_count(unsigned int count)
657{
658 pr_debug("irq: Trying to set virq count to %d\n", count);
fef1c772 659
0ebfff14
BH
660 BUG_ON(count < NUM_ISA_INTERRUPTS);
661 if (count < NR_IRQS)
662 irq_virq_count = count;
663}
664
6fde40f3
ME
665static int irq_setup_virq(struct irq_host *host, unsigned int virq,
666 irq_hw_number_t hwirq)
667{
cd015707
ME
668 struct irq_desc *desc;
669
670 desc = irq_to_desc_alloc_node(virq, 0);
671 if (!desc) {
672 pr_debug("irq: -> allocating desc failed\n");
673 goto error;
674 }
675
6fde40f3 676 /* Clear IRQ_NOREQUEST flag */
cd015707 677 desc->status &= ~IRQ_NOREQUEST;
6fde40f3
ME
678
679 /* map it */
680 smp_wmb();
681 irq_map[virq].hwirq = hwirq;
682 smp_mb();
683
684 if (host->ops->map(host, virq, hwirq)) {
685 pr_debug("irq: -> mapping failed, freeing\n");
cd015707 686 goto error;
6fde40f3
ME
687 }
688
689 return 0;
cd015707
ME
690
691error:
692 irq_free_virt(virq, 1);
693 return -1;
6fde40f3 694}
8ec8f2e8 695
ee51de56
ME
696unsigned int irq_create_direct_mapping(struct irq_host *host)
697{
698 unsigned int virq;
699
700 if (host == NULL)
701 host = irq_default_host;
702
703 BUG_ON(host == NULL);
704 WARN_ON(host->revmap_type != IRQ_HOST_MAP_NOMAP);
705
706 virq = irq_alloc_virt(host, 1, 0);
707 if (virq == NO_IRQ) {
708 pr_debug("irq: create_direct virq allocation failed\n");
709 return NO_IRQ;
710 }
711
712 pr_debug("irq: create_direct obtained virq %d\n", virq);
713
714 if (irq_setup_virq(host, virq, virq))
715 return NO_IRQ;
716
717 return virq;
718}
719
0ebfff14 720unsigned int irq_create_mapping(struct irq_host *host,
6e99e458 721 irq_hw_number_t hwirq)
0ebfff14
BH
722{
723 unsigned int virq, hint;
724
6e99e458 725 pr_debug("irq: irq_create_mapping(0x%p, 0x%lx)\n", host, hwirq);
0ebfff14
BH
726
727 /* Look for default host if nececssary */
728 if (host == NULL)
729 host = irq_default_host;
730 if (host == NULL) {
731 printk(KERN_WARNING "irq_create_mapping called for"
732 " NULL host, hwirq=%lx\n", hwirq);
733 WARN_ON(1);
734 return NO_IRQ;
1da177e4 735 }
0ebfff14 736 pr_debug("irq: -> using host @%p\n", host);
1da177e4 737
0ebfff14
BH
738 /* Check if mapping already exist, if it does, call
739 * host->ops->map() to update the flags
740 */
741 virq = irq_find_mapping(host, hwirq);
f5921697 742 if (virq != NO_IRQ) {
acc900ef
IK
743 if (host->ops->remap)
744 host->ops->remap(host, virq, hwirq);
0ebfff14 745 pr_debug("irq: -> existing mapping on virq %d\n", virq);
0ebfff14 746 return virq;
1da177e4
LT
747 }
748
0ebfff14
BH
749 /* Get a virtual interrupt number */
750 if (host->revmap_type == IRQ_HOST_MAP_LEGACY) {
751 /* Handle legacy */
752 virq = (unsigned int)hwirq;
753 if (virq == 0 || virq >= NUM_ISA_INTERRUPTS)
754 return NO_IRQ;
755 return virq;
756 } else {
757 /* Allocate a virtual interrupt number */
758 hint = hwirq % irq_virq_count;
759 virq = irq_alloc_virt(host, 1, hint);
760 if (virq == NO_IRQ) {
761 pr_debug("irq: -> virq allocation failed\n");
762 return NO_IRQ;
763 }
764 }
0ebfff14 765
6fde40f3 766 if (irq_setup_virq(host, virq, hwirq))
0ebfff14 767 return NO_IRQ;
6fde40f3 768
c7d07fdd
ME
769 printk(KERN_DEBUG "irq: irq %lu on host %s mapped to virtual irq %u\n",
770 hwirq, host->of_node ? host->of_node->full_name : "null", virq);
771
1da177e4 772 return virq;
0ebfff14
BH
773}
774EXPORT_SYMBOL_GPL(irq_create_mapping);
775
f3d2ab41 776unsigned int irq_create_of_mapping(struct device_node *controller,
40d50cf7 777 const u32 *intspec, unsigned int intsize)
0ebfff14
BH
778{
779 struct irq_host *host;
780 irq_hw_number_t hwirq;
6e99e458
BH
781 unsigned int type = IRQ_TYPE_NONE;
782 unsigned int virq;
1da177e4 783
0ebfff14
BH
784 if (controller == NULL)
785 host = irq_default_host;
786 else
787 host = irq_find_host(controller);
6e99e458
BH
788 if (host == NULL) {
789 printk(KERN_WARNING "irq: no irq host found for %s !\n",
790 controller->full_name);
0ebfff14 791 return NO_IRQ;
6e99e458 792 }
0ebfff14
BH
793
794 /* If host has no translation, then we assume interrupt line */
795 if (host->ops->xlate == NULL)
796 hwirq = intspec[0];
797 else {
798 if (host->ops->xlate(host, controller, intspec, intsize,
6e99e458 799 &hwirq, &type))
0ebfff14 800 return NO_IRQ;
1da177e4 801 }
0ebfff14 802
6e99e458
BH
803 /* Create mapping */
804 virq = irq_create_mapping(host, hwirq);
805 if (virq == NO_IRQ)
806 return virq;
807
808 /* Set type if specified and different than the current one */
809 if (type != IRQ_TYPE_NONE &&
6cff46f4 810 type != (irq_to_desc(virq)->status & IRQF_TRIGGER_MASK))
6e99e458
BH
811 set_irq_type(virq, type);
812 return virq;
1da177e4 813}
0ebfff14 814EXPORT_SYMBOL_GPL(irq_create_of_mapping);
1da177e4 815
0ebfff14 816unsigned int irq_of_parse_and_map(struct device_node *dev, int index)
1da177e4 817{
0ebfff14 818 struct of_irq oirq;
1da177e4 819
0ebfff14
BH
820 if (of_irq_map_one(dev, index, &oirq))
821 return NO_IRQ;
1da177e4 822
0ebfff14
BH
823 return irq_create_of_mapping(oirq.controller, oirq.specifier,
824 oirq.size);
825}
826EXPORT_SYMBOL_GPL(irq_of_parse_and_map);
1da177e4 827
0ebfff14
BH
828void irq_dispose_mapping(unsigned int virq)
829{
5414c6be 830 struct irq_host *host;
0ebfff14 831 irq_hw_number_t hwirq;
1da177e4 832
5414c6be
ME
833 if (virq == NO_IRQ)
834 return;
835
836 host = irq_map[virq].host;
0ebfff14
BH
837 WARN_ON (host == NULL);
838 if (host == NULL)
839 return;
1da177e4 840
0ebfff14
BH
841 /* Never unmap legacy interrupts */
842 if (host->revmap_type == IRQ_HOST_MAP_LEGACY)
843 return;
1da177e4 844
0ebfff14
BH
845 /* remove chip and handler */
846 set_irq_chip_and_handler(virq, NULL, NULL);
847
848 /* Make sure it's completed */
849 synchronize_irq(virq);
850
851 /* Tell the PIC about it */
852 if (host->ops->unmap)
853 host->ops->unmap(host, virq);
854 smp_mb();
855
856 /* Clear reverse map */
857 hwirq = irq_map[virq].hwirq;
858 switch(host->revmap_type) {
859 case IRQ_HOST_MAP_LINEAR:
860 if (hwirq < host->revmap_data.linear.size)
f5921697 861 host->revmap_data.linear.revmap[hwirq] = NO_IRQ;
0ebfff14
BH
862 break;
863 case IRQ_HOST_MAP_TREE:
967e012e
SD
864 /*
865 * Check if radix tree allocated yet, if not then nothing to
866 * remove.
867 */
868 smp_rmb();
869 if (revmap_trees_allocated < 1)
0ebfff14 870 break;
150c6c8f 871 mutex_lock(&revmap_trees_mutex);
0ebfff14 872 radix_tree_delete(&host->revmap_data.tree, hwirq);
150c6c8f 873 mutex_unlock(&revmap_trees_mutex);
0ebfff14
BH
874 break;
875 }
1da177e4 876
0ebfff14
BH
877 /* Destroy map */
878 smp_mb();
879 irq_map[virq].hwirq = host->inval_irq;
1da177e4 880
0ebfff14 881 /* Set some flags */
6cff46f4 882 irq_to_desc(virq)->status |= IRQ_NOREQUEST;
1da177e4 883
0ebfff14
BH
884 /* Free it */
885 irq_free_virt(virq, 1);
1da177e4 886}
0ebfff14 887EXPORT_SYMBOL_GPL(irq_dispose_mapping);
1da177e4 888
0ebfff14
BH
889unsigned int irq_find_mapping(struct irq_host *host,
890 irq_hw_number_t hwirq)
891{
892 unsigned int i;
893 unsigned int hint = hwirq % irq_virq_count;
894
895 /* Look for default host if nececssary */
896 if (host == NULL)
897 host = irq_default_host;
898 if (host == NULL)
899 return NO_IRQ;
900
901 /* legacy -> bail early */
902 if (host->revmap_type == IRQ_HOST_MAP_LEGACY)
903 return hwirq;
904
905 /* Slow path does a linear search of the map */
906 if (hint < NUM_ISA_INTERRUPTS)
907 hint = NUM_ISA_INTERRUPTS;
908 i = hint;
909 do {
910 if (irq_map[i].host == host &&
911 irq_map[i].hwirq == hwirq)
912 return i;
913 i++;
914 if (i >= irq_virq_count)
915 i = NUM_ISA_INTERRUPTS;
916 } while(i != hint);
917 return NO_IRQ;
918}
919EXPORT_SYMBOL_GPL(irq_find_mapping);
1da177e4 920
0ebfff14 921
967e012e
SD
922unsigned int irq_radix_revmap_lookup(struct irq_host *host,
923 irq_hw_number_t hwirq)
1da177e4 924{
0ebfff14
BH
925 struct irq_map_entry *ptr;
926 unsigned int virq;
1da177e4 927
0ebfff14 928 WARN_ON(host->revmap_type != IRQ_HOST_MAP_TREE);
1da177e4 929
967e012e
SD
930 /*
931 * Check if the radix tree exists and has bee initialized.
932 * If not, we fallback to slow mode
0ebfff14 933 */
967e012e 934 if (revmap_trees_allocated < 2)
0ebfff14
BH
935 return irq_find_mapping(host, hwirq);
936
0ebfff14 937 /* Now try to resolve */
150c6c8f
SD
938 /*
939 * No rcu_read_lock(ing) needed, the ptr returned can't go under us
940 * as it's referencing an entry in the static irq_map table.
941 */
967e012e 942 ptr = radix_tree_lookup(&host->revmap_data.tree, hwirq);
8ec8f2e8 943
967e012e
SD
944 /*
945 * If found in radix tree, then fine.
946 * Else fallback to linear lookup - this should not happen in practice
947 * as it means that we failed to insert the node in the radix tree.
948 */
949 if (ptr)
0ebfff14 950 virq = ptr - irq_map;
967e012e
SD
951 else
952 virq = irq_find_mapping(host, hwirq);
953
954 return virq;
955}
956
957void irq_radix_revmap_insert(struct irq_host *host, unsigned int virq,
958 irq_hw_number_t hwirq)
959{
967e012e
SD
960
961 WARN_ON(host->revmap_type != IRQ_HOST_MAP_TREE);
962
963 /*
964 * Check if the radix tree exists yet.
965 * If not, then the irq will be inserted into the tree when it gets
966 * initialized.
967 */
968 smp_rmb();
969 if (revmap_trees_allocated < 1)
970 return;
0ebfff14 971
8ec8f2e8 972 if (virq != NO_IRQ) {
150c6c8f 973 mutex_lock(&revmap_trees_mutex);
967e012e
SD
974 radix_tree_insert(&host->revmap_data.tree, hwirq,
975 &irq_map[virq]);
150c6c8f 976 mutex_unlock(&revmap_trees_mutex);
8ec8f2e8 977 }
1da177e4
LT
978}
979
0ebfff14
BH
980unsigned int irq_linear_revmap(struct irq_host *host,
981 irq_hw_number_t hwirq)
c6622f63 982{
0ebfff14 983 unsigned int *revmap;
c6622f63 984
0ebfff14
BH
985 WARN_ON(host->revmap_type != IRQ_HOST_MAP_LINEAR);
986
987 /* Check revmap bounds */
988 if (unlikely(hwirq >= host->revmap_data.linear.size))
989 return irq_find_mapping(host, hwirq);
990
991 /* Check if revmap was allocated */
992 revmap = host->revmap_data.linear.revmap;
993 if (unlikely(revmap == NULL))
994 return irq_find_mapping(host, hwirq);
995
996 /* Fill up revmap with slow path if no mapping found */
997 if (unlikely(revmap[hwirq] == NO_IRQ))
998 revmap[hwirq] = irq_find_mapping(host, hwirq);
999
1000 return revmap[hwirq];
c6622f63
PM
1001}
1002
0ebfff14
BH
1003unsigned int irq_alloc_virt(struct irq_host *host,
1004 unsigned int count,
1005 unsigned int hint)
1006{
1007 unsigned long flags;
1008 unsigned int i, j, found = NO_IRQ;
c6622f63 1009
0ebfff14
BH
1010 if (count == 0 || count > (irq_virq_count - NUM_ISA_INTERRUPTS))
1011 return NO_IRQ;
1012
f95e085b 1013 raw_spin_lock_irqsave(&irq_big_lock, flags);
0ebfff14
BH
1014
1015 /* Use hint for 1 interrupt if any */
1016 if (count == 1 && hint >= NUM_ISA_INTERRUPTS &&
1017 hint < irq_virq_count && irq_map[hint].host == NULL) {
1018 found = hint;
1019 goto hint_found;
1020 }
1021
1022 /* Look for count consecutive numbers in the allocatable
1023 * (non-legacy) space
1024 */
e1251465
ME
1025 for (i = NUM_ISA_INTERRUPTS, j = 0; i < irq_virq_count; i++) {
1026 if (irq_map[i].host != NULL)
1027 j = 0;
1028 else
1029 j++;
1030
1031 if (j == count) {
1032 found = i - count + 1;
1033 break;
1034 }
0ebfff14
BH
1035 }
1036 if (found == NO_IRQ) {
f95e085b 1037 raw_spin_unlock_irqrestore(&irq_big_lock, flags);
0ebfff14
BH
1038 return NO_IRQ;
1039 }
1040 hint_found:
1041 for (i = found; i < (found + count); i++) {
1042 irq_map[i].hwirq = host->inval_irq;
1043 smp_wmb();
1044 irq_map[i].host = host;
1045 }
f95e085b 1046 raw_spin_unlock_irqrestore(&irq_big_lock, flags);
0ebfff14
BH
1047 return found;
1048}
1049
1050void irq_free_virt(unsigned int virq, unsigned int count)
1da177e4
LT
1051{
1052 unsigned long flags;
0ebfff14 1053 unsigned int i;
1da177e4 1054
0ebfff14
BH
1055 WARN_ON (virq < NUM_ISA_INTERRUPTS);
1056 WARN_ON (count == 0 || (virq + count) > irq_virq_count);
1da177e4 1057
f95e085b 1058 raw_spin_lock_irqsave(&irq_big_lock, flags);
0ebfff14
BH
1059 for (i = virq; i < (virq + count); i++) {
1060 struct irq_host *host;
1da177e4 1061
0ebfff14
BH
1062 if (i < NUM_ISA_INTERRUPTS ||
1063 (virq + count) > irq_virq_count)
1064 continue;
1da177e4 1065
0ebfff14
BH
1066 host = irq_map[i].host;
1067 irq_map[i].hwirq = host->inval_irq;
1068 smp_wmb();
1069 irq_map[i].host = NULL;
1070 }
f95e085b 1071 raw_spin_unlock_irqrestore(&irq_big_lock, flags);
1da177e4 1072}
0ebfff14 1073
cd015707 1074int arch_early_irq_init(void)
0ebfff14 1075{
cd015707
ME
1076 struct irq_desc *desc;
1077 int i;
0ebfff14 1078
cd015707
ME
1079 for (i = 0; i < NR_IRQS; i++) {
1080 desc = irq_to_desc(i);
1081 if (desc)
1082 desc->status |= IRQ_NOREQUEST;
1083 }
1084
1085 return 0;
1086}
1087
1088int arch_init_chip_data(struct irq_desc *desc, int node)
1089{
1090 desc->status |= IRQ_NOREQUEST;
1091 return 0;
0ebfff14
BH
1092}
1093
1094/* We need to create the radix trees late */
1095static int irq_late_init(void)
1096{
1097 struct irq_host *h;
967e012e 1098 unsigned int i;
0ebfff14 1099
967e012e
SD
1100 /*
1101 * No mutual exclusion with respect to accessors of the tree is needed
1102 * here as the synchronization is done via the state variable
1103 * revmap_trees_allocated.
1104 */
0ebfff14
BH
1105 list_for_each_entry(h, &irq_hosts, link) {
1106 if (h->revmap_type == IRQ_HOST_MAP_TREE)
967e012e
SD
1107 INIT_RADIX_TREE(&h->revmap_data.tree, GFP_KERNEL);
1108 }
1109
1110 /*
1111 * Make sure the radix trees inits are visible before setting
1112 * the flag
1113 */
1114 smp_wmb();
1115 revmap_trees_allocated = 1;
1116
1117 /*
1118 * Insert the reverse mapping for those interrupts already present
1119 * in irq_map[].
1120 */
150c6c8f 1121 mutex_lock(&revmap_trees_mutex);
967e012e
SD
1122 for (i = 0; i < irq_virq_count; i++) {
1123 if (irq_map[i].host &&
1124 (irq_map[i].host->revmap_type == IRQ_HOST_MAP_TREE))
1125 radix_tree_insert(&irq_map[i].host->revmap_data.tree,
1126 irq_map[i].hwirq, &irq_map[i]);
0ebfff14 1127 }
150c6c8f 1128 mutex_unlock(&revmap_trees_mutex);
0ebfff14 1129
967e012e
SD
1130 /*
1131 * Make sure the radix trees insertions are visible before setting
1132 * the flag
1133 */
1134 smp_wmb();
1135 revmap_trees_allocated = 2;
1136
0ebfff14
BH
1137 return 0;
1138}
1139arch_initcall(irq_late_init);
1140
60b332e7
ME
1141#ifdef CONFIG_VIRQ_DEBUG
1142static int virq_debug_show(struct seq_file *m, void *private)
1143{
1144 unsigned long flags;
97f7d6bc 1145 struct irq_desc *desc;
60b332e7
ME
1146 const char *p;
1147 char none[] = "none";
1148 int i;
1149
1150 seq_printf(m, "%-5s %-7s %-15s %s\n", "virq", "hwirq",
1151 "chip name", "host name");
1152
76f1d94f 1153 for (i = 1; i < nr_irqs; i++) {
6cff46f4 1154 desc = irq_to_desc(i);
76f1d94f
ME
1155 if (!desc)
1156 continue;
1157
239007b8 1158 raw_spin_lock_irqsave(&desc->lock, flags);
60b332e7
ME
1159
1160 if (desc->action && desc->action->handler) {
1161 seq_printf(m, "%5d ", i);
1162 seq_printf(m, "0x%05lx ", virq_to_hw(i));
1163
b27df672
TG
1164 if (desc->chip && desc->chip->name)
1165 p = desc->chip->name;
60b332e7
ME
1166 else
1167 p = none;
1168 seq_printf(m, "%-15s ", p);
1169
1170 if (irq_map[i].host && irq_map[i].host->of_node)
1171 p = irq_map[i].host->of_node->full_name;
1172 else
1173 p = none;
1174 seq_printf(m, "%s\n", p);
1175 }
1176
239007b8 1177 raw_spin_unlock_irqrestore(&desc->lock, flags);
60b332e7
ME
1178 }
1179
1180 return 0;
1181}
1182
1183static int virq_debug_open(struct inode *inode, struct file *file)
1184{
1185 return single_open(file, virq_debug_show, inode->i_private);
1186}
1187
1188static const struct file_operations virq_debug_fops = {
1189 .open = virq_debug_open,
1190 .read = seq_read,
1191 .llseek = seq_lseek,
1192 .release = single_release,
1193};
1194
1195static int __init irq_debugfs_init(void)
1196{
1197 if (debugfs_create_file("virq_mapping", S_IRUGO, powerpc_debugfs_root,
476ff8a0 1198 NULL, &virq_debug_fops) == NULL)
60b332e7
ME
1199 return -ENOMEM;
1200
1201 return 0;
1202}
1203__initcall(irq_debugfs_init);
1204#endif /* CONFIG_VIRQ_DEBUG */
1205
c6622f63 1206#ifdef CONFIG_PPC64
1da177e4
LT
1207static int __init setup_noirqdistrib(char *str)
1208{
1209 distribute_irqs = 0;
1210 return 1;
1211}
1212
1213__setup("noirqdistrib", setup_noirqdistrib);
756e7104 1214#endif /* CONFIG_PPC64 */