Commit | Line | Data |
---|---|---|
1da177e4 | 1 | /* |
1da177e4 LT |
2 | * Derived from arch/i386/kernel/irq.c |
3 | * Copyright (C) 1992 Linus Torvalds | |
4 | * Adapted from arch/i386 by Gary Thomas | |
5 | * Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org) | |
756e7104 SR |
6 | * Updated and modified by Cort Dougan <cort@fsmlabs.com> |
7 | * Copyright (C) 1996-2001 Cort Dougan | |
1da177e4 LT |
8 | * Adapted for Power Macintosh by Paul Mackerras |
9 | * Copyright (C) 1996 Paul Mackerras (paulus@cs.anu.edu.au) | |
756e7104 | 10 | * |
1da177e4 LT |
11 | * This program is free software; you can redistribute it and/or |
12 | * modify it under the terms of the GNU General Public License | |
13 | * as published by the Free Software Foundation; either version | |
14 | * 2 of the License, or (at your option) any later version. | |
15 | * | |
16 | * This file contains the code used by various IRQ handling routines: | |
17 | * asking for different IRQ's should be done through these routines | |
18 | * instead of just grabbing them. Thus setups with different IRQ numbers | |
19 | * shouldn't result in any weird surprises, and installing new handlers | |
20 | * should be easier. | |
756e7104 SR |
21 | * |
22 | * The MPC8xx has an interrupt mask in the SIU. If a bit is set, the | |
23 | * interrupt is _enabled_. As expected, IRQ0 is bit 0 in the 32-bit | |
24 | * mask register (of which only 16 are defined), hence the weird shifting | |
25 | * and complement of the cached_irq_mask. I want to be able to stuff | |
26 | * this right into the SIU SMASK register. | |
27 | * Many of the prep/chrp functions are conditional compiled on CONFIG_8xx | |
28 | * to reduce code space and undefined function references. | |
1da177e4 LT |
29 | */ |
30 | ||
0ebfff14 BH |
31 | #undef DEBUG |
32 | ||
1da177e4 LT |
33 | #include <linux/module.h> |
34 | #include <linux/threads.h> | |
35 | #include <linux/kernel_stat.h> | |
36 | #include <linux/signal.h> | |
37 | #include <linux/sched.h> | |
756e7104 | 38 | #include <linux/ptrace.h> |
1da177e4 LT |
39 | #include <linux/ioport.h> |
40 | #include <linux/interrupt.h> | |
41 | #include <linux/timex.h> | |
1da177e4 LT |
42 | #include <linux/init.h> |
43 | #include <linux/slab.h> | |
1da177e4 LT |
44 | #include <linux/delay.h> |
45 | #include <linux/irq.h> | |
756e7104 SR |
46 | #include <linux/seq_file.h> |
47 | #include <linux/cpumask.h> | |
1da177e4 LT |
48 | #include <linux/profile.h> |
49 | #include <linux/bitops.h> | |
0ebfff14 BH |
50 | #include <linux/list.h> |
51 | #include <linux/radix-tree.h> | |
52 | #include <linux/mutex.h> | |
53 | #include <linux/bootmem.h> | |
45934c47 | 54 | #include <linux/pci.h> |
60b332e7 | 55 | #include <linux/debugfs.h> |
cdd6c482 | 56 | #include <linux/perf_event.h> |
1da177e4 LT |
57 | |
58 | #include <asm/uaccess.h> | |
59 | #include <asm/system.h> | |
60 | #include <asm/io.h> | |
61 | #include <asm/pgtable.h> | |
62 | #include <asm/irq.h> | |
63 | #include <asm/cache.h> | |
64 | #include <asm/prom.h> | |
65 | #include <asm/ptrace.h> | |
1da177e4 | 66 | #include <asm/machdep.h> |
0ebfff14 | 67 | #include <asm/udbg.h> |
d04c56f7 | 68 | #ifdef CONFIG_PPC64 |
1da177e4 | 69 | #include <asm/paca.h> |
d04c56f7 | 70 | #include <asm/firmware.h> |
0874dd40 | 71 | #include <asm/lv1call.h> |
756e7104 | 72 | #endif |
1da177e4 | 73 | |
868accb7 | 74 | int __irq_offset_value; |
756e7104 SR |
75 | static int ppc_spurious_interrupts; |
76 | ||
756e7104 | 77 | #ifdef CONFIG_PPC32 |
b9e5b4e6 BH |
78 | EXPORT_SYMBOL(__irq_offset_value); |
79 | atomic_t ppc_n_lost_interrupts; | |
756e7104 | 80 | |
756e7104 SR |
81 | #ifdef CONFIG_TAU_INT |
82 | extern int tau_initialized; | |
83 | extern int tau_interrupts(int); | |
84 | #endif | |
b9e5b4e6 | 85 | #endif /* CONFIG_PPC32 */ |
756e7104 | 86 | |
756e7104 | 87 | #ifdef CONFIG_PPC64 |
1da177e4 LT |
88 | EXPORT_SYMBOL(irq_desc); |
89 | ||
90 | int distribute_irqs = 1; | |
d04c56f7 | 91 | |
4e491d14 | 92 | static inline notrace unsigned long get_hard_enabled(void) |
ef2b343e HD |
93 | { |
94 | unsigned long enabled; | |
95 | ||
96 | __asm__ __volatile__("lbz %0,%1(13)" | |
97 | : "=r" (enabled) : "i" (offsetof(struct paca_struct, hard_enabled))); | |
98 | ||
99 | return enabled; | |
100 | } | |
101 | ||
4e491d14 | 102 | static inline notrace void set_soft_enabled(unsigned long enable) |
ef2b343e HD |
103 | { |
104 | __asm__ __volatile__("stb %0,%1(13)" | |
105 | : : "r" (enable), "i" (offsetof(struct paca_struct, soft_enabled))); | |
106 | } | |
107 | ||
4e491d14 | 108 | notrace void raw_local_irq_restore(unsigned long en) |
d04c56f7 | 109 | { |
ef2b343e HD |
110 | /* |
111 | * get_paca()->soft_enabled = en; | |
112 | * Is it ever valid to use local_irq_restore(0) when soft_enabled is 1? | |
113 | * That was allowed before, and in such a case we do need to take care | |
114 | * that gcc will set soft_enabled directly via r13, not choose to use | |
115 | * an intermediate register, lest we're preempted to a different cpu. | |
116 | */ | |
117 | set_soft_enabled(en); | |
d04c56f7 PM |
118 | if (!en) |
119 | return; | |
120 | ||
94491685 | 121 | #ifdef CONFIG_PPC_STD_MMU_64 |
d04c56f7 | 122 | if (firmware_has_feature(FW_FEATURE_ISERIES)) { |
ef2b343e HD |
123 | /* |
124 | * Do we need to disable preemption here? Not really: in the | |
125 | * unlikely event that we're preempted to a different cpu in | |
126 | * between getting r13, loading its lppaca_ptr, and loading | |
127 | * its any_int, we might call iseries_handle_interrupts without | |
128 | * an interrupt pending on the new cpu, but that's no disaster, | |
129 | * is it? And the business of preempting us off the old cpu | |
130 | * would itself involve a local_irq_restore which handles the | |
131 | * interrupt to that cpu. | |
132 | * | |
133 | * But use "local_paca->lppaca_ptr" instead of "get_lppaca()" | |
134 | * to avoid any preemption checking added into get_paca(). | |
135 | */ | |
136 | if (local_paca->lppaca_ptr->int_dword.any_int) | |
d04c56f7 | 137 | iseries_handle_interrupts(); |
d04c56f7 | 138 | } |
94491685 | 139 | #endif /* CONFIG_PPC_STD_MMU_64 */ |
d04c56f7 | 140 | |
cdd6c482 IM |
141 | if (test_perf_event_pending()) { |
142 | clear_perf_event_pending(); | |
143 | perf_event_do_pending(); | |
b6c5a71d | 144 | } |
93a6d3ce | 145 | |
ef2b343e HD |
146 | /* |
147 | * if (get_paca()->hard_enabled) return; | |
148 | * But again we need to take care that gcc gets hard_enabled directly | |
149 | * via r13, not choose to use an intermediate register, lest we're | |
150 | * preempted to a different cpu in between the two instructions. | |
151 | */ | |
152 | if (get_hard_enabled()) | |
d04c56f7 | 153 | return; |
ef2b343e HD |
154 | |
155 | /* | |
156 | * Need to hard-enable interrupts here. Since currently disabled, | |
157 | * no need to take further asm precautions against preemption; but | |
158 | * use local_paca instead of get_paca() to avoid preemption checking. | |
159 | */ | |
160 | local_paca->hard_enabled = en; | |
d04c56f7 PM |
161 | if ((int)mfspr(SPRN_DEC) < 0) |
162 | mtspr(SPRN_DEC, 1); | |
0874dd40 TS |
163 | |
164 | /* | |
165 | * Force the delivery of pending soft-disabled interrupts on PS3. | |
166 | * Any HV call will have this side effect. | |
167 | */ | |
168 | if (firmware_has_feature(FW_FEATURE_PS3_LV1)) { | |
169 | u64 tmp; | |
170 | lv1_get_version_info(&tmp); | |
171 | } | |
172 | ||
e1fa2e13 | 173 | __hard_irq_enable(); |
d04c56f7 | 174 | } |
945feb17 | 175 | EXPORT_SYMBOL(raw_local_irq_restore); |
756e7104 | 176 | #endif /* CONFIG_PPC64 */ |
1da177e4 LT |
177 | |
178 | int show_interrupts(struct seq_file *p, void *v) | |
179 | { | |
756e7104 SR |
180 | int i = *(loff_t *)v, j; |
181 | struct irqaction *action; | |
97f7d6bc | 182 | struct irq_desc *desc; |
1da177e4 LT |
183 | unsigned long flags; |
184 | ||
185 | if (i == 0) { | |
756e7104 SR |
186 | seq_puts(p, " "); |
187 | for_each_online_cpu(j) | |
188 | seq_printf(p, "CPU%d ", j); | |
1da177e4 LT |
189 | seq_putc(p, '\n'); |
190 | } | |
191 | ||
192 | if (i < NR_IRQS) { | |
6cff46f4 | 193 | desc = irq_to_desc(i); |
1da177e4 LT |
194 | spin_lock_irqsave(&desc->lock, flags); |
195 | action = desc->action; | |
196 | if (!action || !action->handler) | |
197 | goto skip; | |
198 | seq_printf(p, "%3d: ", i); | |
199 | #ifdef CONFIG_SMP | |
756e7104 | 200 | for_each_online_cpu(j) |
dee4102a | 201 | seq_printf(p, "%10u ", kstat_irqs_cpu(i, j)); |
1da177e4 LT |
202 | #else |
203 | seq_printf(p, "%10u ", kstat_irqs(i)); | |
204 | #endif /* CONFIG_SMP */ | |
d1bef4ed IM |
205 | if (desc->chip) |
206 | seq_printf(p, " %s ", desc->chip->typename); | |
1da177e4 | 207 | else |
756e7104 | 208 | seq_puts(p, " None "); |
1da177e4 | 209 | seq_printf(p, "%s", (desc->status & IRQ_LEVEL) ? "Level " : "Edge "); |
756e7104 SR |
210 | seq_printf(p, " %s", action->name); |
211 | for (action = action->next; action; action = action->next) | |
1da177e4 LT |
212 | seq_printf(p, ", %s", action->name); |
213 | seq_putc(p, '\n'); | |
214 | skip: | |
215 | spin_unlock_irqrestore(&desc->lock, flags); | |
756e7104 | 216 | } else if (i == NR_IRQS) { |
9c4cb825 | 217 | #if defined(CONFIG_PPC32) && defined(CONFIG_TAU_INT) |
756e7104 SR |
218 | if (tau_initialized){ |
219 | seq_puts(p, "TAU: "); | |
394e3902 AM |
220 | for_each_online_cpu(j) |
221 | seq_printf(p, "%10u ", tau_interrupts(j)); | |
756e7104 SR |
222 | seq_puts(p, " PowerPC Thermal Assist (cpu temp)\n"); |
223 | } | |
9c4cb825 | 224 | #endif /* CONFIG_PPC32 && CONFIG_TAU_INT*/ |
1da177e4 | 225 | seq_printf(p, "BAD: %10u\n", ppc_spurious_interrupts); |
756e7104 | 226 | } |
1da177e4 LT |
227 | return 0; |
228 | } | |
229 | ||
230 | #ifdef CONFIG_HOTPLUG_CPU | |
231 | void fixup_irqs(cpumask_t map) | |
232 | { | |
6cff46f4 | 233 | struct irq_desc *desc; |
1da177e4 LT |
234 | unsigned int irq; |
235 | static int warned; | |
236 | ||
237 | for_each_irq(irq) { | |
238 | cpumask_t mask; | |
239 | ||
6cff46f4 ME |
240 | desc = irq_to_desc(irq); |
241 | if (desc && desc->status & IRQ_PER_CPU) | |
1da177e4 LT |
242 | continue; |
243 | ||
6cff46f4 | 244 | cpumask_and(&mask, desc->affinity, &map); |
1da177e4 LT |
245 | if (any_online_cpu(mask) == NR_CPUS) { |
246 | printk("Breaking affinity for irq %i\n", irq); | |
247 | mask = map; | |
248 | } | |
6cff46f4 ME |
249 | if (desc->chip->set_affinity) |
250 | desc->chip->set_affinity(irq, &mask); | |
251 | else if (desc->action && !(warned++)) | |
1da177e4 LT |
252 | printk("Cannot set affinity for irq %i\n", irq); |
253 | } | |
254 | ||
255 | local_irq_enable(); | |
256 | mdelay(1); | |
257 | local_irq_disable(); | |
258 | } | |
259 | #endif | |
260 | ||
f2694ba5 ME |
261 | #ifdef CONFIG_IRQSTACKS |
262 | static inline void handle_one_irq(unsigned int irq) | |
263 | { | |
264 | struct thread_info *curtp, *irqtp; | |
265 | unsigned long saved_sp_limit; | |
266 | struct irq_desc *desc; | |
f2694ba5 ME |
267 | |
268 | /* Switch to the irq stack to handle this */ | |
269 | curtp = current_thread_info(); | |
270 | irqtp = hardirq_ctx[smp_processor_id()]; | |
271 | ||
272 | if (curtp == irqtp) { | |
273 | /* We're already on the irq stack, just handle it */ | |
274 | generic_handle_irq(irq); | |
275 | return; | |
276 | } | |
277 | ||
6cff46f4 | 278 | desc = irq_to_desc(irq); |
f2694ba5 ME |
279 | saved_sp_limit = current->thread.ksp_limit; |
280 | ||
f2694ba5 ME |
281 | irqtp->task = curtp->task; |
282 | irqtp->flags = 0; | |
283 | ||
284 | /* Copy the softirq bits in preempt_count so that the | |
285 | * softirq checks work in the hardirq context. */ | |
286 | irqtp->preempt_count = (irqtp->preempt_count & ~SOFTIRQ_MASK) | | |
287 | (curtp->preempt_count & SOFTIRQ_MASK); | |
288 | ||
289 | current->thread.ksp_limit = (unsigned long)irqtp + | |
290 | _ALIGN_UP(sizeof(struct thread_info), 16); | |
291 | ||
835363e6 | 292 | call_handle_irq(irq, desc, irqtp, desc->handle_irq); |
f2694ba5 ME |
293 | current->thread.ksp_limit = saved_sp_limit; |
294 | irqtp->task = NULL; | |
295 | ||
296 | /* Set any flag that may have been set on the | |
297 | * alternate stack | |
298 | */ | |
299 | if (irqtp->flags) | |
300 | set_bits(irqtp->flags, &curtp->flags); | |
301 | } | |
302 | #else | |
303 | static inline void handle_one_irq(unsigned int irq) | |
304 | { | |
305 | generic_handle_irq(irq); | |
306 | } | |
307 | #endif | |
308 | ||
d7cb10d6 ME |
309 | static inline void check_stack_overflow(void) |
310 | { | |
311 | #ifdef CONFIG_DEBUG_STACKOVERFLOW | |
312 | long sp; | |
313 | ||
314 | sp = __get_SP() & (THREAD_SIZE-1); | |
315 | ||
316 | /* check for stack overflow: is there less than 2KB free? */ | |
317 | if (unlikely(sp < (sizeof(struct thread_info) + 2048))) { | |
318 | printk("do_IRQ: stack overflow: %ld\n", | |
319 | sp - sizeof(struct thread_info)); | |
320 | dump_stack(); | |
321 | } | |
322 | #endif | |
323 | } | |
324 | ||
1da177e4 LT |
325 | void do_IRQ(struct pt_regs *regs) |
326 | { | |
7d12e780 | 327 | struct pt_regs *old_regs = set_irq_regs(regs); |
0ebfff14 | 328 | unsigned int irq; |
1da177e4 | 329 | |
4b218e9b | 330 | irq_enter(); |
1da177e4 | 331 | |
d7cb10d6 | 332 | check_stack_overflow(); |
1da177e4 | 333 | |
35a84c2f | 334 | irq = ppc_md.get_irq(); |
1da177e4 | 335 | |
f2694ba5 ME |
336 | if (irq != NO_IRQ && irq != NO_IRQ_IGNORE) |
337 | handle_one_irq(irq); | |
338 | else if (irq != NO_IRQ_IGNORE) | |
e199500c SR |
339 | /* That's not SMP safe ... but who cares ? */ |
340 | ppc_spurious_interrupts++; | |
341 | ||
4b218e9b | 342 | irq_exit(); |
7d12e780 | 343 | set_irq_regs(old_regs); |
756e7104 | 344 | |
e199500c | 345 | #ifdef CONFIG_PPC_ISERIES |
b06a3183 SR |
346 | if (firmware_has_feature(FW_FEATURE_ISERIES) && |
347 | get_lppaca()->int_dword.fields.decr_int) { | |
3356bb9f DG |
348 | get_lppaca()->int_dword.fields.decr_int = 0; |
349 | /* Signal a fake decrementer interrupt */ | |
350 | timer_interrupt(regs); | |
e199500c SR |
351 | } |
352 | #endif | |
353 | } | |
1da177e4 LT |
354 | |
355 | void __init init_IRQ(void) | |
356 | { | |
70584578 SR |
357 | if (ppc_md.init_IRQ) |
358 | ppc_md.init_IRQ(); | |
bcf0b088 KG |
359 | |
360 | exc_lvl_ctx_init(); | |
361 | ||
1da177e4 LT |
362 | irq_ctx_init(); |
363 | } | |
364 | ||
bcf0b088 KG |
365 | #if defined(CONFIG_BOOKE) || defined(CONFIG_40x) |
366 | struct thread_info *critirq_ctx[NR_CPUS] __read_mostly; | |
367 | struct thread_info *dbgirq_ctx[NR_CPUS] __read_mostly; | |
368 | struct thread_info *mcheckirq_ctx[NR_CPUS] __read_mostly; | |
369 | ||
370 | void exc_lvl_ctx_init(void) | |
371 | { | |
372 | struct thread_info *tp; | |
373 | int i; | |
374 | ||
375 | for_each_possible_cpu(i) { | |
376 | memset((void *)critirq_ctx[i], 0, THREAD_SIZE); | |
377 | tp = critirq_ctx[i]; | |
378 | tp->cpu = i; | |
379 | tp->preempt_count = 0; | |
380 | ||
381 | #ifdef CONFIG_BOOKE | |
382 | memset((void *)dbgirq_ctx[i], 0, THREAD_SIZE); | |
383 | tp = dbgirq_ctx[i]; | |
384 | tp->cpu = i; | |
385 | tp->preempt_count = 0; | |
386 | ||
387 | memset((void *)mcheckirq_ctx[i], 0, THREAD_SIZE); | |
388 | tp = mcheckirq_ctx[i]; | |
389 | tp->cpu = i; | |
390 | tp->preempt_count = HARDIRQ_OFFSET; | |
391 | #endif | |
392 | } | |
393 | } | |
394 | #endif | |
1da177e4 | 395 | |
1da177e4 | 396 | #ifdef CONFIG_IRQSTACKS |
22722051 AM |
397 | struct thread_info *softirq_ctx[NR_CPUS] __read_mostly; |
398 | struct thread_info *hardirq_ctx[NR_CPUS] __read_mostly; | |
1da177e4 LT |
399 | |
400 | void irq_ctx_init(void) | |
401 | { | |
402 | struct thread_info *tp; | |
403 | int i; | |
404 | ||
0e551954 | 405 | for_each_possible_cpu(i) { |
1da177e4 LT |
406 | memset((void *)softirq_ctx[i], 0, THREAD_SIZE); |
407 | tp = softirq_ctx[i]; | |
408 | tp->cpu = i; | |
e6768a4f | 409 | tp->preempt_count = 0; |
1da177e4 LT |
410 | |
411 | memset((void *)hardirq_ctx[i], 0, THREAD_SIZE); | |
412 | tp = hardirq_ctx[i]; | |
413 | tp->cpu = i; | |
414 | tp->preempt_count = HARDIRQ_OFFSET; | |
415 | } | |
416 | } | |
417 | ||
c6622f63 PM |
418 | static inline void do_softirq_onstack(void) |
419 | { | |
420 | struct thread_info *curtp, *irqtp; | |
85218827 | 421 | unsigned long saved_sp_limit = current->thread.ksp_limit; |
c6622f63 PM |
422 | |
423 | curtp = current_thread_info(); | |
424 | irqtp = softirq_ctx[smp_processor_id()]; | |
425 | irqtp->task = curtp->task; | |
85218827 KG |
426 | current->thread.ksp_limit = (unsigned long)irqtp + |
427 | _ALIGN_UP(sizeof(struct thread_info), 16); | |
c6622f63 | 428 | call_do_softirq(irqtp); |
85218827 | 429 | current->thread.ksp_limit = saved_sp_limit; |
c6622f63 PM |
430 | irqtp->task = NULL; |
431 | } | |
1da177e4 | 432 | |
c6622f63 PM |
433 | #else |
434 | #define do_softirq_onstack() __do_softirq() | |
435 | #endif /* CONFIG_IRQSTACKS */ | |
436 | ||
1da177e4 LT |
437 | void do_softirq(void) |
438 | { | |
439 | unsigned long flags; | |
1da177e4 LT |
440 | |
441 | if (in_interrupt()) | |
1da177e4 LT |
442 | return; |
443 | ||
1da177e4 | 444 | local_irq_save(flags); |
1da177e4 | 445 | |
912b2539 | 446 | if (local_softirq_pending()) |
c6622f63 | 447 | do_softirq_onstack(); |
1da177e4 LT |
448 | |
449 | local_irq_restore(flags); | |
1da177e4 | 450 | } |
1da177e4 | 451 | |
1da177e4 | 452 | |
1da177e4 | 453 | /* |
0ebfff14 | 454 | * IRQ controller and virtual interrupts |
1da177e4 LT |
455 | */ |
456 | ||
0ebfff14 | 457 | static LIST_HEAD(irq_hosts); |
057b184a | 458 | static DEFINE_SPINLOCK(irq_big_lock); |
967e012e | 459 | static unsigned int revmap_trees_allocated; |
150c6c8f | 460 | static DEFINE_MUTEX(revmap_trees_mutex); |
0ebfff14 BH |
461 | struct irq_map_entry irq_map[NR_IRQS]; |
462 | static unsigned int irq_virq_count = NR_IRQS; | |
463 | static struct irq_host *irq_default_host; | |
1da177e4 | 464 | |
35923f12 OJ |
465 | irq_hw_number_t virq_to_hw(unsigned int virq) |
466 | { | |
467 | return irq_map[virq].hwirq; | |
468 | } | |
469 | EXPORT_SYMBOL_GPL(virq_to_hw); | |
470 | ||
68158006 ME |
471 | static int default_irq_host_match(struct irq_host *h, struct device_node *np) |
472 | { | |
473 | return h->of_node != NULL && h->of_node == np; | |
474 | } | |
475 | ||
5669c3cf | 476 | struct irq_host *irq_alloc_host(struct device_node *of_node, |
52964f87 ME |
477 | unsigned int revmap_type, |
478 | unsigned int revmap_arg, | |
479 | struct irq_host_ops *ops, | |
480 | irq_hw_number_t inval_irq) | |
1da177e4 | 481 | { |
0ebfff14 BH |
482 | struct irq_host *host; |
483 | unsigned int size = sizeof(struct irq_host); | |
484 | unsigned int i; | |
485 | unsigned int *rmap; | |
486 | unsigned long flags; | |
487 | ||
488 | /* Allocate structure and revmap table if using linear mapping */ | |
489 | if (revmap_type == IRQ_HOST_MAP_LINEAR) | |
490 | size += revmap_arg * sizeof(unsigned int); | |
5669c3cf | 491 | host = zalloc_maybe_bootmem(size, GFP_KERNEL); |
0ebfff14 BH |
492 | if (host == NULL) |
493 | return NULL; | |
7d01c880 | 494 | |
0ebfff14 BH |
495 | /* Fill structure */ |
496 | host->revmap_type = revmap_type; | |
497 | host->inval_irq = inval_irq; | |
498 | host->ops = ops; | |
19fc65b5 | 499 | host->of_node = of_node_get(of_node); |
7d01c880 | 500 | |
68158006 ME |
501 | if (host->ops->match == NULL) |
502 | host->ops->match = default_irq_host_match; | |
7d01c880 | 503 | |
0ebfff14 BH |
504 | spin_lock_irqsave(&irq_big_lock, flags); |
505 | ||
506 | /* If it's a legacy controller, check for duplicates and | |
507 | * mark it as allocated (we use irq 0 host pointer for that | |
508 | */ | |
509 | if (revmap_type == IRQ_HOST_MAP_LEGACY) { | |
510 | if (irq_map[0].host != NULL) { | |
511 | spin_unlock_irqrestore(&irq_big_lock, flags); | |
512 | /* If we are early boot, we can't free the structure, | |
513 | * too bad... | |
514 | * this will be fixed once slab is made available early | |
515 | * instead of the current cruft | |
516 | */ | |
517 | if (mem_init_done) | |
518 | kfree(host); | |
519 | return NULL; | |
520 | } | |
521 | irq_map[0].host = host; | |
522 | } | |
523 | ||
524 | list_add(&host->link, &irq_hosts); | |
525 | spin_unlock_irqrestore(&irq_big_lock, flags); | |
526 | ||
527 | /* Additional setups per revmap type */ | |
528 | switch(revmap_type) { | |
529 | case IRQ_HOST_MAP_LEGACY: | |
530 | /* 0 is always the invalid number for legacy */ | |
531 | host->inval_irq = 0; | |
532 | /* setup us as the host for all legacy interrupts */ | |
533 | for (i = 1; i < NUM_ISA_INTERRUPTS; i++) { | |
7866291d | 534 | irq_map[i].hwirq = i; |
0ebfff14 BH |
535 | smp_wmb(); |
536 | irq_map[i].host = host; | |
537 | smp_wmb(); | |
538 | ||
6e99e458 | 539 | /* Clear norequest flags */ |
6cff46f4 | 540 | irq_to_desc(i)->status &= ~IRQ_NOREQUEST; |
0ebfff14 BH |
541 | |
542 | /* Legacy flags are left to default at this point, | |
543 | * one can then use irq_create_mapping() to | |
c03983ac | 544 | * explicitly change them |
0ebfff14 | 545 | */ |
6e99e458 | 546 | ops->map(host, i, i); |
0ebfff14 BH |
547 | } |
548 | break; | |
549 | case IRQ_HOST_MAP_LINEAR: | |
550 | rmap = (unsigned int *)(host + 1); | |
551 | for (i = 0; i < revmap_arg; i++) | |
f5921697 | 552 | rmap[i] = NO_IRQ; |
0ebfff14 BH |
553 | host->revmap_data.linear.size = revmap_arg; |
554 | smp_wmb(); | |
555 | host->revmap_data.linear.revmap = rmap; | |
556 | break; | |
557 | default: | |
558 | break; | |
559 | } | |
560 | ||
561 | pr_debug("irq: Allocated host of type %d @0x%p\n", revmap_type, host); | |
562 | ||
563 | return host; | |
1da177e4 LT |
564 | } |
565 | ||
0ebfff14 | 566 | struct irq_host *irq_find_host(struct device_node *node) |
1da177e4 | 567 | { |
0ebfff14 BH |
568 | struct irq_host *h, *found = NULL; |
569 | unsigned long flags; | |
570 | ||
571 | /* We might want to match the legacy controller last since | |
572 | * it might potentially be set to match all interrupts in | |
573 | * the absence of a device node. This isn't a problem so far | |
574 | * yet though... | |
575 | */ | |
576 | spin_lock_irqsave(&irq_big_lock, flags); | |
577 | list_for_each_entry(h, &irq_hosts, link) | |
68158006 | 578 | if (h->ops->match(h, node)) { |
0ebfff14 BH |
579 | found = h; |
580 | break; | |
581 | } | |
582 | spin_unlock_irqrestore(&irq_big_lock, flags); | |
583 | return found; | |
584 | } | |
585 | EXPORT_SYMBOL_GPL(irq_find_host); | |
586 | ||
587 | void irq_set_default_host(struct irq_host *host) | |
588 | { | |
589 | pr_debug("irq: Default host set to @0x%p\n", host); | |
1da177e4 | 590 | |
0ebfff14 BH |
591 | irq_default_host = host; |
592 | } | |
1da177e4 | 593 | |
0ebfff14 BH |
594 | void irq_set_virq_count(unsigned int count) |
595 | { | |
596 | pr_debug("irq: Trying to set virq count to %d\n", count); | |
fef1c772 | 597 | |
0ebfff14 BH |
598 | BUG_ON(count < NUM_ISA_INTERRUPTS); |
599 | if (count < NR_IRQS) | |
600 | irq_virq_count = count; | |
601 | } | |
602 | ||
6fde40f3 ME |
603 | static int irq_setup_virq(struct irq_host *host, unsigned int virq, |
604 | irq_hw_number_t hwirq) | |
605 | { | |
606 | /* Clear IRQ_NOREQUEST flag */ | |
6cff46f4 | 607 | irq_to_desc(virq)->status &= ~IRQ_NOREQUEST; |
6fde40f3 ME |
608 | |
609 | /* map it */ | |
610 | smp_wmb(); | |
611 | irq_map[virq].hwirq = hwirq; | |
612 | smp_mb(); | |
613 | ||
614 | if (host->ops->map(host, virq, hwirq)) { | |
615 | pr_debug("irq: -> mapping failed, freeing\n"); | |
616 | irq_free_virt(virq, 1); | |
617 | return -1; | |
618 | } | |
619 | ||
620 | return 0; | |
621 | } | |
8ec8f2e8 | 622 | |
ee51de56 ME |
623 | unsigned int irq_create_direct_mapping(struct irq_host *host) |
624 | { | |
625 | unsigned int virq; | |
626 | ||
627 | if (host == NULL) | |
628 | host = irq_default_host; | |
629 | ||
630 | BUG_ON(host == NULL); | |
631 | WARN_ON(host->revmap_type != IRQ_HOST_MAP_NOMAP); | |
632 | ||
633 | virq = irq_alloc_virt(host, 1, 0); | |
634 | if (virq == NO_IRQ) { | |
635 | pr_debug("irq: create_direct virq allocation failed\n"); | |
636 | return NO_IRQ; | |
637 | } | |
638 | ||
639 | pr_debug("irq: create_direct obtained virq %d\n", virq); | |
640 | ||
641 | if (irq_setup_virq(host, virq, virq)) | |
642 | return NO_IRQ; | |
643 | ||
644 | return virq; | |
645 | } | |
646 | ||
0ebfff14 | 647 | unsigned int irq_create_mapping(struct irq_host *host, |
6e99e458 | 648 | irq_hw_number_t hwirq) |
0ebfff14 BH |
649 | { |
650 | unsigned int virq, hint; | |
651 | ||
6e99e458 | 652 | pr_debug("irq: irq_create_mapping(0x%p, 0x%lx)\n", host, hwirq); |
0ebfff14 BH |
653 | |
654 | /* Look for default host if nececssary */ | |
655 | if (host == NULL) | |
656 | host = irq_default_host; | |
657 | if (host == NULL) { | |
658 | printk(KERN_WARNING "irq_create_mapping called for" | |
659 | " NULL host, hwirq=%lx\n", hwirq); | |
660 | WARN_ON(1); | |
661 | return NO_IRQ; | |
1da177e4 | 662 | } |
0ebfff14 | 663 | pr_debug("irq: -> using host @%p\n", host); |
1da177e4 | 664 | |
0ebfff14 BH |
665 | /* Check if mapping already exist, if it does, call |
666 | * host->ops->map() to update the flags | |
667 | */ | |
668 | virq = irq_find_mapping(host, hwirq); | |
f5921697 | 669 | if (virq != NO_IRQ) { |
acc900ef IK |
670 | if (host->ops->remap) |
671 | host->ops->remap(host, virq, hwirq); | |
0ebfff14 | 672 | pr_debug("irq: -> existing mapping on virq %d\n", virq); |
0ebfff14 | 673 | return virq; |
1da177e4 LT |
674 | } |
675 | ||
0ebfff14 BH |
676 | /* Get a virtual interrupt number */ |
677 | if (host->revmap_type == IRQ_HOST_MAP_LEGACY) { | |
678 | /* Handle legacy */ | |
679 | virq = (unsigned int)hwirq; | |
680 | if (virq == 0 || virq >= NUM_ISA_INTERRUPTS) | |
681 | return NO_IRQ; | |
682 | return virq; | |
683 | } else { | |
684 | /* Allocate a virtual interrupt number */ | |
685 | hint = hwirq % irq_virq_count; | |
686 | virq = irq_alloc_virt(host, 1, hint); | |
687 | if (virq == NO_IRQ) { | |
688 | pr_debug("irq: -> virq allocation failed\n"); | |
689 | return NO_IRQ; | |
690 | } | |
691 | } | |
0ebfff14 | 692 | |
6fde40f3 | 693 | if (irq_setup_virq(host, virq, hwirq)) |
0ebfff14 | 694 | return NO_IRQ; |
6fde40f3 | 695 | |
c7d07fdd ME |
696 | printk(KERN_DEBUG "irq: irq %lu on host %s mapped to virtual irq %u\n", |
697 | hwirq, host->of_node ? host->of_node->full_name : "null", virq); | |
698 | ||
1da177e4 | 699 | return virq; |
0ebfff14 BH |
700 | } |
701 | EXPORT_SYMBOL_GPL(irq_create_mapping); | |
702 | ||
f3d2ab41 AV |
703 | unsigned int irq_create_of_mapping(struct device_node *controller, |
704 | u32 *intspec, unsigned int intsize) | |
0ebfff14 BH |
705 | { |
706 | struct irq_host *host; | |
707 | irq_hw_number_t hwirq; | |
6e99e458 BH |
708 | unsigned int type = IRQ_TYPE_NONE; |
709 | unsigned int virq; | |
1da177e4 | 710 | |
0ebfff14 BH |
711 | if (controller == NULL) |
712 | host = irq_default_host; | |
713 | else | |
714 | host = irq_find_host(controller); | |
6e99e458 BH |
715 | if (host == NULL) { |
716 | printk(KERN_WARNING "irq: no irq host found for %s !\n", | |
717 | controller->full_name); | |
0ebfff14 | 718 | return NO_IRQ; |
6e99e458 | 719 | } |
0ebfff14 BH |
720 | |
721 | /* If host has no translation, then we assume interrupt line */ | |
722 | if (host->ops->xlate == NULL) | |
723 | hwirq = intspec[0]; | |
724 | else { | |
725 | if (host->ops->xlate(host, controller, intspec, intsize, | |
6e99e458 | 726 | &hwirq, &type)) |
0ebfff14 | 727 | return NO_IRQ; |
1da177e4 | 728 | } |
0ebfff14 | 729 | |
6e99e458 BH |
730 | /* Create mapping */ |
731 | virq = irq_create_mapping(host, hwirq); | |
732 | if (virq == NO_IRQ) | |
733 | return virq; | |
734 | ||
735 | /* Set type if specified and different than the current one */ | |
736 | if (type != IRQ_TYPE_NONE && | |
6cff46f4 | 737 | type != (irq_to_desc(virq)->status & IRQF_TRIGGER_MASK)) |
6e99e458 BH |
738 | set_irq_type(virq, type); |
739 | return virq; | |
1da177e4 | 740 | } |
0ebfff14 | 741 | EXPORT_SYMBOL_GPL(irq_create_of_mapping); |
1da177e4 | 742 | |
0ebfff14 | 743 | unsigned int irq_of_parse_and_map(struct device_node *dev, int index) |
1da177e4 | 744 | { |
0ebfff14 | 745 | struct of_irq oirq; |
1da177e4 | 746 | |
0ebfff14 BH |
747 | if (of_irq_map_one(dev, index, &oirq)) |
748 | return NO_IRQ; | |
1da177e4 | 749 | |
0ebfff14 BH |
750 | return irq_create_of_mapping(oirq.controller, oirq.specifier, |
751 | oirq.size); | |
752 | } | |
753 | EXPORT_SYMBOL_GPL(irq_of_parse_and_map); | |
1da177e4 | 754 | |
0ebfff14 BH |
755 | void irq_dispose_mapping(unsigned int virq) |
756 | { | |
5414c6be | 757 | struct irq_host *host; |
0ebfff14 | 758 | irq_hw_number_t hwirq; |
1da177e4 | 759 | |
5414c6be ME |
760 | if (virq == NO_IRQ) |
761 | return; | |
762 | ||
763 | host = irq_map[virq].host; | |
0ebfff14 BH |
764 | WARN_ON (host == NULL); |
765 | if (host == NULL) | |
766 | return; | |
1da177e4 | 767 | |
0ebfff14 BH |
768 | /* Never unmap legacy interrupts */ |
769 | if (host->revmap_type == IRQ_HOST_MAP_LEGACY) | |
770 | return; | |
1da177e4 | 771 | |
0ebfff14 BH |
772 | /* remove chip and handler */ |
773 | set_irq_chip_and_handler(virq, NULL, NULL); | |
774 | ||
775 | /* Make sure it's completed */ | |
776 | synchronize_irq(virq); | |
777 | ||
778 | /* Tell the PIC about it */ | |
779 | if (host->ops->unmap) | |
780 | host->ops->unmap(host, virq); | |
781 | smp_mb(); | |
782 | ||
783 | /* Clear reverse map */ | |
784 | hwirq = irq_map[virq].hwirq; | |
785 | switch(host->revmap_type) { | |
786 | case IRQ_HOST_MAP_LINEAR: | |
787 | if (hwirq < host->revmap_data.linear.size) | |
f5921697 | 788 | host->revmap_data.linear.revmap[hwirq] = NO_IRQ; |
0ebfff14 BH |
789 | break; |
790 | case IRQ_HOST_MAP_TREE: | |
967e012e SD |
791 | /* |
792 | * Check if radix tree allocated yet, if not then nothing to | |
793 | * remove. | |
794 | */ | |
795 | smp_rmb(); | |
796 | if (revmap_trees_allocated < 1) | |
0ebfff14 | 797 | break; |
150c6c8f | 798 | mutex_lock(&revmap_trees_mutex); |
0ebfff14 | 799 | radix_tree_delete(&host->revmap_data.tree, hwirq); |
150c6c8f | 800 | mutex_unlock(&revmap_trees_mutex); |
0ebfff14 BH |
801 | break; |
802 | } | |
1da177e4 | 803 | |
0ebfff14 BH |
804 | /* Destroy map */ |
805 | smp_mb(); | |
806 | irq_map[virq].hwirq = host->inval_irq; | |
1da177e4 | 807 | |
0ebfff14 | 808 | /* Set some flags */ |
6cff46f4 | 809 | irq_to_desc(virq)->status |= IRQ_NOREQUEST; |
1da177e4 | 810 | |
0ebfff14 BH |
811 | /* Free it */ |
812 | irq_free_virt(virq, 1); | |
1da177e4 | 813 | } |
0ebfff14 | 814 | EXPORT_SYMBOL_GPL(irq_dispose_mapping); |
1da177e4 | 815 | |
0ebfff14 BH |
816 | unsigned int irq_find_mapping(struct irq_host *host, |
817 | irq_hw_number_t hwirq) | |
818 | { | |
819 | unsigned int i; | |
820 | unsigned int hint = hwirq % irq_virq_count; | |
821 | ||
822 | /* Look for default host if nececssary */ | |
823 | if (host == NULL) | |
824 | host = irq_default_host; | |
825 | if (host == NULL) | |
826 | return NO_IRQ; | |
827 | ||
828 | /* legacy -> bail early */ | |
829 | if (host->revmap_type == IRQ_HOST_MAP_LEGACY) | |
830 | return hwirq; | |
831 | ||
832 | /* Slow path does a linear search of the map */ | |
833 | if (hint < NUM_ISA_INTERRUPTS) | |
834 | hint = NUM_ISA_INTERRUPTS; | |
835 | i = hint; | |
836 | do { | |
837 | if (irq_map[i].host == host && | |
838 | irq_map[i].hwirq == hwirq) | |
839 | return i; | |
840 | i++; | |
841 | if (i >= irq_virq_count) | |
842 | i = NUM_ISA_INTERRUPTS; | |
843 | } while(i != hint); | |
844 | return NO_IRQ; | |
845 | } | |
846 | EXPORT_SYMBOL_GPL(irq_find_mapping); | |
1da177e4 | 847 | |
0ebfff14 | 848 | |
967e012e SD |
849 | unsigned int irq_radix_revmap_lookup(struct irq_host *host, |
850 | irq_hw_number_t hwirq) | |
1da177e4 | 851 | { |
0ebfff14 BH |
852 | struct irq_map_entry *ptr; |
853 | unsigned int virq; | |
1da177e4 | 854 | |
0ebfff14 | 855 | WARN_ON(host->revmap_type != IRQ_HOST_MAP_TREE); |
1da177e4 | 856 | |
967e012e SD |
857 | /* |
858 | * Check if the radix tree exists and has bee initialized. | |
859 | * If not, we fallback to slow mode | |
0ebfff14 | 860 | */ |
967e012e | 861 | if (revmap_trees_allocated < 2) |
0ebfff14 BH |
862 | return irq_find_mapping(host, hwirq); |
863 | ||
0ebfff14 | 864 | /* Now try to resolve */ |
150c6c8f SD |
865 | /* |
866 | * No rcu_read_lock(ing) needed, the ptr returned can't go under us | |
867 | * as it's referencing an entry in the static irq_map table. | |
868 | */ | |
967e012e | 869 | ptr = radix_tree_lookup(&host->revmap_data.tree, hwirq); |
8ec8f2e8 | 870 | |
967e012e SD |
871 | /* |
872 | * If found in radix tree, then fine. | |
873 | * Else fallback to linear lookup - this should not happen in practice | |
874 | * as it means that we failed to insert the node in the radix tree. | |
875 | */ | |
876 | if (ptr) | |
0ebfff14 | 877 | virq = ptr - irq_map; |
967e012e SD |
878 | else |
879 | virq = irq_find_mapping(host, hwirq); | |
880 | ||
881 | return virq; | |
882 | } | |
883 | ||
884 | void irq_radix_revmap_insert(struct irq_host *host, unsigned int virq, | |
885 | irq_hw_number_t hwirq) | |
886 | { | |
967e012e SD |
887 | |
888 | WARN_ON(host->revmap_type != IRQ_HOST_MAP_TREE); | |
889 | ||
890 | /* | |
891 | * Check if the radix tree exists yet. | |
892 | * If not, then the irq will be inserted into the tree when it gets | |
893 | * initialized. | |
894 | */ | |
895 | smp_rmb(); | |
896 | if (revmap_trees_allocated < 1) | |
897 | return; | |
0ebfff14 | 898 | |
8ec8f2e8 | 899 | if (virq != NO_IRQ) { |
150c6c8f | 900 | mutex_lock(&revmap_trees_mutex); |
967e012e SD |
901 | radix_tree_insert(&host->revmap_data.tree, hwirq, |
902 | &irq_map[virq]); | |
150c6c8f | 903 | mutex_unlock(&revmap_trees_mutex); |
8ec8f2e8 | 904 | } |
1da177e4 LT |
905 | } |
906 | ||
0ebfff14 BH |
907 | unsigned int irq_linear_revmap(struct irq_host *host, |
908 | irq_hw_number_t hwirq) | |
c6622f63 | 909 | { |
0ebfff14 | 910 | unsigned int *revmap; |
c6622f63 | 911 | |
0ebfff14 BH |
912 | WARN_ON(host->revmap_type != IRQ_HOST_MAP_LINEAR); |
913 | ||
914 | /* Check revmap bounds */ | |
915 | if (unlikely(hwirq >= host->revmap_data.linear.size)) | |
916 | return irq_find_mapping(host, hwirq); | |
917 | ||
918 | /* Check if revmap was allocated */ | |
919 | revmap = host->revmap_data.linear.revmap; | |
920 | if (unlikely(revmap == NULL)) | |
921 | return irq_find_mapping(host, hwirq); | |
922 | ||
923 | /* Fill up revmap with slow path if no mapping found */ | |
924 | if (unlikely(revmap[hwirq] == NO_IRQ)) | |
925 | revmap[hwirq] = irq_find_mapping(host, hwirq); | |
926 | ||
927 | return revmap[hwirq]; | |
c6622f63 PM |
928 | } |
929 | ||
0ebfff14 BH |
930 | unsigned int irq_alloc_virt(struct irq_host *host, |
931 | unsigned int count, | |
932 | unsigned int hint) | |
933 | { | |
934 | unsigned long flags; | |
935 | unsigned int i, j, found = NO_IRQ; | |
c6622f63 | 936 | |
0ebfff14 BH |
937 | if (count == 0 || count > (irq_virq_count - NUM_ISA_INTERRUPTS)) |
938 | return NO_IRQ; | |
939 | ||
940 | spin_lock_irqsave(&irq_big_lock, flags); | |
941 | ||
942 | /* Use hint for 1 interrupt if any */ | |
943 | if (count == 1 && hint >= NUM_ISA_INTERRUPTS && | |
944 | hint < irq_virq_count && irq_map[hint].host == NULL) { | |
945 | found = hint; | |
946 | goto hint_found; | |
947 | } | |
948 | ||
949 | /* Look for count consecutive numbers in the allocatable | |
950 | * (non-legacy) space | |
951 | */ | |
e1251465 ME |
952 | for (i = NUM_ISA_INTERRUPTS, j = 0; i < irq_virq_count; i++) { |
953 | if (irq_map[i].host != NULL) | |
954 | j = 0; | |
955 | else | |
956 | j++; | |
957 | ||
958 | if (j == count) { | |
959 | found = i - count + 1; | |
960 | break; | |
961 | } | |
0ebfff14 BH |
962 | } |
963 | if (found == NO_IRQ) { | |
964 | spin_unlock_irqrestore(&irq_big_lock, flags); | |
965 | return NO_IRQ; | |
966 | } | |
967 | hint_found: | |
968 | for (i = found; i < (found + count); i++) { | |
969 | irq_map[i].hwirq = host->inval_irq; | |
970 | smp_wmb(); | |
971 | irq_map[i].host = host; | |
972 | } | |
973 | spin_unlock_irqrestore(&irq_big_lock, flags); | |
974 | return found; | |
975 | } | |
976 | ||
977 | void irq_free_virt(unsigned int virq, unsigned int count) | |
1da177e4 LT |
978 | { |
979 | unsigned long flags; | |
0ebfff14 | 980 | unsigned int i; |
1da177e4 | 981 | |
0ebfff14 BH |
982 | WARN_ON (virq < NUM_ISA_INTERRUPTS); |
983 | WARN_ON (count == 0 || (virq + count) > irq_virq_count); | |
1da177e4 | 984 | |
0ebfff14 BH |
985 | spin_lock_irqsave(&irq_big_lock, flags); |
986 | for (i = virq; i < (virq + count); i++) { | |
987 | struct irq_host *host; | |
1da177e4 | 988 | |
0ebfff14 BH |
989 | if (i < NUM_ISA_INTERRUPTS || |
990 | (virq + count) > irq_virq_count) | |
991 | continue; | |
1da177e4 | 992 | |
0ebfff14 BH |
993 | host = irq_map[i].host; |
994 | irq_map[i].hwirq = host->inval_irq; | |
995 | smp_wmb(); | |
996 | irq_map[i].host = NULL; | |
997 | } | |
998 | spin_unlock_irqrestore(&irq_big_lock, flags); | |
1da177e4 | 999 | } |
0ebfff14 BH |
1000 | |
1001 | void irq_early_init(void) | |
1002 | { | |
1003 | unsigned int i; | |
1004 | ||
1005 | for (i = 0; i < NR_IRQS; i++) | |
6cff46f4 | 1006 | irq_to_desc(i)->status |= IRQ_NOREQUEST; |
0ebfff14 BH |
1007 | } |
1008 | ||
1009 | /* We need to create the radix trees late */ | |
1010 | static int irq_late_init(void) | |
1011 | { | |
1012 | struct irq_host *h; | |
967e012e | 1013 | unsigned int i; |
0ebfff14 | 1014 | |
967e012e SD |
1015 | /* |
1016 | * No mutual exclusion with respect to accessors of the tree is needed | |
1017 | * here as the synchronization is done via the state variable | |
1018 | * revmap_trees_allocated. | |
1019 | */ | |
0ebfff14 BH |
1020 | list_for_each_entry(h, &irq_hosts, link) { |
1021 | if (h->revmap_type == IRQ_HOST_MAP_TREE) | |
967e012e SD |
1022 | INIT_RADIX_TREE(&h->revmap_data.tree, GFP_KERNEL); |
1023 | } | |
1024 | ||
1025 | /* | |
1026 | * Make sure the radix trees inits are visible before setting | |
1027 | * the flag | |
1028 | */ | |
1029 | smp_wmb(); | |
1030 | revmap_trees_allocated = 1; | |
1031 | ||
1032 | /* | |
1033 | * Insert the reverse mapping for those interrupts already present | |
1034 | * in irq_map[]. | |
1035 | */ | |
150c6c8f | 1036 | mutex_lock(&revmap_trees_mutex); |
967e012e SD |
1037 | for (i = 0; i < irq_virq_count; i++) { |
1038 | if (irq_map[i].host && | |
1039 | (irq_map[i].host->revmap_type == IRQ_HOST_MAP_TREE)) | |
1040 | radix_tree_insert(&irq_map[i].host->revmap_data.tree, | |
1041 | irq_map[i].hwirq, &irq_map[i]); | |
0ebfff14 | 1042 | } |
150c6c8f | 1043 | mutex_unlock(&revmap_trees_mutex); |
0ebfff14 | 1044 | |
967e012e SD |
1045 | /* |
1046 | * Make sure the radix trees insertions are visible before setting | |
1047 | * the flag | |
1048 | */ | |
1049 | smp_wmb(); | |
1050 | revmap_trees_allocated = 2; | |
1051 | ||
0ebfff14 BH |
1052 | return 0; |
1053 | } | |
1054 | arch_initcall(irq_late_init); | |
1055 | ||
60b332e7 ME |
1056 | #ifdef CONFIG_VIRQ_DEBUG |
1057 | static int virq_debug_show(struct seq_file *m, void *private) | |
1058 | { | |
1059 | unsigned long flags; | |
97f7d6bc | 1060 | struct irq_desc *desc; |
60b332e7 ME |
1061 | const char *p; |
1062 | char none[] = "none"; | |
1063 | int i; | |
1064 | ||
1065 | seq_printf(m, "%-5s %-7s %-15s %s\n", "virq", "hwirq", | |
1066 | "chip name", "host name"); | |
1067 | ||
76f1d94f | 1068 | for (i = 1; i < nr_irqs; i++) { |
6cff46f4 | 1069 | desc = irq_to_desc(i); |
76f1d94f ME |
1070 | if (!desc) |
1071 | continue; | |
1072 | ||
60b332e7 ME |
1073 | spin_lock_irqsave(&desc->lock, flags); |
1074 | ||
1075 | if (desc->action && desc->action->handler) { | |
1076 | seq_printf(m, "%5d ", i); | |
1077 | seq_printf(m, "0x%05lx ", virq_to_hw(i)); | |
1078 | ||
1079 | if (desc->chip && desc->chip->typename) | |
1080 | p = desc->chip->typename; | |
1081 | else | |
1082 | p = none; | |
1083 | seq_printf(m, "%-15s ", p); | |
1084 | ||
1085 | if (irq_map[i].host && irq_map[i].host->of_node) | |
1086 | p = irq_map[i].host->of_node->full_name; | |
1087 | else | |
1088 | p = none; | |
1089 | seq_printf(m, "%s\n", p); | |
1090 | } | |
1091 | ||
1092 | spin_unlock_irqrestore(&desc->lock, flags); | |
1093 | } | |
1094 | ||
1095 | return 0; | |
1096 | } | |
1097 | ||
1098 | static int virq_debug_open(struct inode *inode, struct file *file) | |
1099 | { | |
1100 | return single_open(file, virq_debug_show, inode->i_private); | |
1101 | } | |
1102 | ||
1103 | static const struct file_operations virq_debug_fops = { | |
1104 | .open = virq_debug_open, | |
1105 | .read = seq_read, | |
1106 | .llseek = seq_lseek, | |
1107 | .release = single_release, | |
1108 | }; | |
1109 | ||
1110 | static int __init irq_debugfs_init(void) | |
1111 | { | |
1112 | if (debugfs_create_file("virq_mapping", S_IRUGO, powerpc_debugfs_root, | |
476ff8a0 | 1113 | NULL, &virq_debug_fops) == NULL) |
60b332e7 ME |
1114 | return -ENOMEM; |
1115 | ||
1116 | return 0; | |
1117 | } | |
1118 | __initcall(irq_debugfs_init); | |
1119 | #endif /* CONFIG_VIRQ_DEBUG */ | |
1120 | ||
c6622f63 | 1121 | #ifdef CONFIG_PPC64 |
1da177e4 LT |
1122 | static int __init setup_noirqdistrib(char *str) |
1123 | { | |
1124 | distribute_irqs = 0; | |
1125 | return 1; | |
1126 | } | |
1127 | ||
1128 | __setup("noirqdistrib", setup_noirqdistrib); | |
756e7104 | 1129 | #endif /* CONFIG_PPC64 */ |