[POWERPC] iSeries: fix slb.c for combined build
[GitHub/mt8127/android_kernel_alcatel_ttab.git] / arch / powerpc / kernel / irq.c
CommitLineData
1da177e4 1/*
1da177e4
LT
2 * Derived from arch/i386/kernel/irq.c
3 * Copyright (C) 1992 Linus Torvalds
4 * Adapted from arch/i386 by Gary Thomas
5 * Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org)
756e7104
SR
6 * Updated and modified by Cort Dougan <cort@fsmlabs.com>
7 * Copyright (C) 1996-2001 Cort Dougan
1da177e4
LT
8 * Adapted for Power Macintosh by Paul Mackerras
9 * Copyright (C) 1996 Paul Mackerras (paulus@cs.anu.edu.au)
10 * Amiga/APUS changes by Jesper Skov (jskov@cygnus.co.uk).
756e7104 11 *
1da177e4
LT
12 * This program is free software; you can redistribute it and/or
13 * modify it under the terms of the GNU General Public License
14 * as published by the Free Software Foundation; either version
15 * 2 of the License, or (at your option) any later version.
16 *
17 * This file contains the code used by various IRQ handling routines:
18 * asking for different IRQ's should be done through these routines
19 * instead of just grabbing them. Thus setups with different IRQ numbers
20 * shouldn't result in any weird surprises, and installing new handlers
21 * should be easier.
756e7104
SR
22 *
23 * The MPC8xx has an interrupt mask in the SIU. If a bit is set, the
24 * interrupt is _enabled_. As expected, IRQ0 is bit 0 in the 32-bit
25 * mask register (of which only 16 are defined), hence the weird shifting
26 * and complement of the cached_irq_mask. I want to be able to stuff
27 * this right into the SIU SMASK register.
28 * Many of the prep/chrp functions are conditional compiled on CONFIG_8xx
29 * to reduce code space and undefined function references.
1da177e4
LT
30 */
31
0ebfff14
BH
32#undef DEBUG
33
1da177e4
LT
34#include <linux/module.h>
35#include <linux/threads.h>
36#include <linux/kernel_stat.h>
37#include <linux/signal.h>
38#include <linux/sched.h>
756e7104 39#include <linux/ptrace.h>
1da177e4
LT
40#include <linux/ioport.h>
41#include <linux/interrupt.h>
42#include <linux/timex.h>
1da177e4
LT
43#include <linux/init.h>
44#include <linux/slab.h>
1da177e4
LT
45#include <linux/delay.h>
46#include <linux/irq.h>
756e7104
SR
47#include <linux/seq_file.h>
48#include <linux/cpumask.h>
1da177e4
LT
49#include <linux/profile.h>
50#include <linux/bitops.h>
0ebfff14
BH
51#include <linux/list.h>
52#include <linux/radix-tree.h>
53#include <linux/mutex.h>
54#include <linux/bootmem.h>
45934c47 55#include <linux/pci.h>
1da177e4
LT
56
57#include <asm/uaccess.h>
58#include <asm/system.h>
59#include <asm/io.h>
60#include <asm/pgtable.h>
61#include <asm/irq.h>
62#include <asm/cache.h>
63#include <asm/prom.h>
64#include <asm/ptrace.h>
1da177e4 65#include <asm/machdep.h>
0ebfff14 66#include <asm/udbg.h>
d04c56f7 67#ifdef CONFIG_PPC64
1da177e4 68#include <asm/paca.h>
d04c56f7 69#include <asm/firmware.h>
756e7104 70#endif
1da177e4 71
868accb7 72int __irq_offset_value;
756e7104
SR
73static int ppc_spurious_interrupts;
74
756e7104 75#ifdef CONFIG_PPC32
b9e5b4e6
BH
76EXPORT_SYMBOL(__irq_offset_value);
77atomic_t ppc_n_lost_interrupts;
756e7104 78
b9e5b4e6
BH
79#ifndef CONFIG_PPC_MERGE
80#define NR_MASK_WORDS ((NR_IRQS + 31) / 32)
756e7104 81unsigned long ppc_cached_irq_mask[NR_MASK_WORDS];
b9e5b4e6 82#endif
756e7104
SR
83
84#ifdef CONFIG_TAU_INT
85extern int tau_initialized;
86extern int tau_interrupts(int);
87#endif
b9e5b4e6 88#endif /* CONFIG_PPC32 */
756e7104
SR
89
90#if defined(CONFIG_SMP) && !defined(CONFIG_PPC_MERGE)
91extern atomic_t ipi_recv;
92extern atomic_t ipi_sent;
93#endif
756e7104
SR
94
95#ifdef CONFIG_PPC64
1da177e4
LT
96EXPORT_SYMBOL(irq_desc);
97
98int distribute_irqs = 1;
d04c56f7
PM
99
100void local_irq_restore(unsigned long en)
101{
102 get_paca()->soft_enabled = en;
103 if (!en)
104 return;
105
106 if (firmware_has_feature(FW_FEATURE_ISERIES)) {
107 if (get_paca()->lppaca_ptr->int_dword.any_int)
108 iseries_handle_interrupts();
109 return;
110 }
111
112 if (get_paca()->hard_enabled)
113 return;
114 /* need to hard-enable interrupts here */
115 get_paca()->hard_enabled = en;
116 if ((int)mfspr(SPRN_DEC) < 0)
117 mtspr(SPRN_DEC, 1);
118 hard_irq_enable();
119}
756e7104 120#endif /* CONFIG_PPC64 */
1da177e4
LT
121
122int show_interrupts(struct seq_file *p, void *v)
123{
756e7104
SR
124 int i = *(loff_t *)v, j;
125 struct irqaction *action;
1da177e4
LT
126 irq_desc_t *desc;
127 unsigned long flags;
128
129 if (i == 0) {
756e7104
SR
130 seq_puts(p, " ");
131 for_each_online_cpu(j)
132 seq_printf(p, "CPU%d ", j);
1da177e4
LT
133 seq_putc(p, '\n');
134 }
135
136 if (i < NR_IRQS) {
137 desc = get_irq_desc(i);
138 spin_lock_irqsave(&desc->lock, flags);
139 action = desc->action;
140 if (!action || !action->handler)
141 goto skip;
142 seq_printf(p, "%3d: ", i);
143#ifdef CONFIG_SMP
756e7104
SR
144 for_each_online_cpu(j)
145 seq_printf(p, "%10u ", kstat_cpu(j).irqs[i]);
1da177e4
LT
146#else
147 seq_printf(p, "%10u ", kstat_irqs(i));
148#endif /* CONFIG_SMP */
d1bef4ed
IM
149 if (desc->chip)
150 seq_printf(p, " %s ", desc->chip->typename);
1da177e4 151 else
756e7104 152 seq_puts(p, " None ");
1da177e4 153 seq_printf(p, "%s", (desc->status & IRQ_LEVEL) ? "Level " : "Edge ");
756e7104
SR
154 seq_printf(p, " %s", action->name);
155 for (action = action->next; action; action = action->next)
1da177e4
LT
156 seq_printf(p, ", %s", action->name);
157 seq_putc(p, '\n');
158skip:
159 spin_unlock_irqrestore(&desc->lock, flags);
756e7104
SR
160 } else if (i == NR_IRQS) {
161#ifdef CONFIG_PPC32
162#ifdef CONFIG_TAU_INT
163 if (tau_initialized){
164 seq_puts(p, "TAU: ");
394e3902
AM
165 for_each_online_cpu(j)
166 seq_printf(p, "%10u ", tau_interrupts(j));
756e7104
SR
167 seq_puts(p, " PowerPC Thermal Assist (cpu temp)\n");
168 }
169#endif
170#if defined(CONFIG_SMP) && !defined(CONFIG_PPC_MERGE)
171 /* should this be per processor send/receive? */
172 seq_printf(p, "IPI (recv/sent): %10u/%u\n",
173 atomic_read(&ipi_recv), atomic_read(&ipi_sent));
174#endif
175#endif /* CONFIG_PPC32 */
1da177e4 176 seq_printf(p, "BAD: %10u\n", ppc_spurious_interrupts);
756e7104 177 }
1da177e4
LT
178 return 0;
179}
180
181#ifdef CONFIG_HOTPLUG_CPU
182void fixup_irqs(cpumask_t map)
183{
184 unsigned int irq;
185 static int warned;
186
187 for_each_irq(irq) {
188 cpumask_t mask;
189
190 if (irq_desc[irq].status & IRQ_PER_CPU)
191 continue;
192
a53da52f 193 cpus_and(mask, irq_desc[irq].affinity, map);
1da177e4
LT
194 if (any_online_cpu(mask) == NR_CPUS) {
195 printk("Breaking affinity for irq %i\n", irq);
196 mask = map;
197 }
d1bef4ed
IM
198 if (irq_desc[irq].chip->set_affinity)
199 irq_desc[irq].chip->set_affinity(irq, mask);
1da177e4
LT
200 else if (irq_desc[irq].action && !(warned++))
201 printk("Cannot set affinity for irq %i\n", irq);
202 }
203
204 local_irq_enable();
205 mdelay(1);
206 local_irq_disable();
207}
208#endif
209
1da177e4
LT
210void do_IRQ(struct pt_regs *regs)
211{
7d12e780 212 struct pt_regs *old_regs = set_irq_regs(regs);
0ebfff14 213 unsigned int irq;
b709c083
SR
214#ifdef CONFIG_IRQSTACKS
215 struct thread_info *curtp, *irqtp;
216#endif
1da177e4 217
756e7104 218 irq_enter();
1da177e4
LT
219
220#ifdef CONFIG_DEBUG_STACKOVERFLOW
221 /* Debugging check for stack overflow: is there less than 2KB free? */
222 {
223 long sp;
224
225 sp = __get_SP() & (THREAD_SIZE-1);
226
227 if (unlikely(sp < (sizeof(struct thread_info) + 2048))) {
228 printk("do_IRQ: stack overflow: %ld\n",
229 sp - sizeof(struct thread_info));
230 dump_stack();
231 }
232 }
233#endif
234
756e7104
SR
235 /*
236 * Every platform is required to implement ppc_md.get_irq.
237 * This function will either return an irq number or -1 to
238 * indicate there are no more pending.
239 * The value -2 is for buggy hardware and means that this IRQ
240 * has already been handled. -- Tom
241 */
35a84c2f 242 irq = ppc_md.get_irq();
1da177e4 243
0ebfff14 244 if (irq != NO_IRQ && irq != NO_IRQ_IGNORE) {
b709c083
SR
245#ifdef CONFIG_IRQSTACKS
246 /* Switch to the irq stack to handle this */
247 curtp = current_thread_info();
248 irqtp = hardirq_ctx[smp_processor_id()];
249 if (curtp != irqtp) {
b9e5b4e6
BH
250 struct irq_desc *desc = irq_desc + irq;
251 void *handler = desc->handle_irq;
252 if (handler == NULL)
253 handler = &__do_IRQ;
b709c083
SR
254 irqtp->task = curtp->task;
255 irqtp->flags = 0;
7d12e780 256 call_handle_irq(irq, desc, irqtp, handler);
b709c083
SR
257 irqtp->task = NULL;
258 if (irqtp->flags)
259 set_bits(irqtp->flags, &curtp->flags);
260 } else
261#endif
7d12e780 262 generic_handle_irq(irq);
0ebfff14 263 } else if (irq != NO_IRQ_IGNORE)
e199500c
SR
264 /* That's not SMP safe ... but who cares ? */
265 ppc_spurious_interrupts++;
266
756e7104 267 irq_exit();
7d12e780 268 set_irq_regs(old_regs);
756e7104 269
e199500c 270#ifdef CONFIG_PPC_ISERIES
b06a3183
SR
271 if (firmware_has_feature(FW_FEATURE_ISERIES) &&
272 get_lppaca()->int_dword.fields.decr_int) {
3356bb9f
DG
273 get_lppaca()->int_dword.fields.decr_int = 0;
274 /* Signal a fake decrementer interrupt */
275 timer_interrupt(regs);
e199500c
SR
276 }
277#endif
278}
1da177e4
LT
279
280void __init init_IRQ(void)
281{
1da177e4 282 ppc_md.init_IRQ();
756e7104 283#ifdef CONFIG_PPC64
1da177e4 284 irq_ctx_init();
756e7104 285#endif
1da177e4
LT
286}
287
1da177e4 288
1da177e4 289#ifdef CONFIG_IRQSTACKS
22722051
AM
290struct thread_info *softirq_ctx[NR_CPUS] __read_mostly;
291struct thread_info *hardirq_ctx[NR_CPUS] __read_mostly;
1da177e4
LT
292
293void irq_ctx_init(void)
294{
295 struct thread_info *tp;
296 int i;
297
0e551954 298 for_each_possible_cpu(i) {
1da177e4
LT
299 memset((void *)softirq_ctx[i], 0, THREAD_SIZE);
300 tp = softirq_ctx[i];
301 tp->cpu = i;
302 tp->preempt_count = SOFTIRQ_OFFSET;
303
304 memset((void *)hardirq_ctx[i], 0, THREAD_SIZE);
305 tp = hardirq_ctx[i];
306 tp->cpu = i;
307 tp->preempt_count = HARDIRQ_OFFSET;
308 }
309}
310
c6622f63
PM
311static inline void do_softirq_onstack(void)
312{
313 struct thread_info *curtp, *irqtp;
314
315 curtp = current_thread_info();
316 irqtp = softirq_ctx[smp_processor_id()];
317 irqtp->task = curtp->task;
318 call_do_softirq(irqtp);
319 irqtp->task = NULL;
320}
1da177e4 321
c6622f63
PM
322#else
323#define do_softirq_onstack() __do_softirq()
324#endif /* CONFIG_IRQSTACKS */
325
1da177e4
LT
326void do_softirq(void)
327{
328 unsigned long flags;
1da177e4
LT
329
330 if (in_interrupt())
1da177e4
LT
331 return;
332
1da177e4 333 local_irq_save(flags);
1da177e4 334
912b2539 335 if (local_softirq_pending())
c6622f63 336 do_softirq_onstack();
1da177e4
LT
337
338 local_irq_restore(flags);
1da177e4 339}
1da177e4
LT
340EXPORT_SYMBOL(do_softirq);
341
1da177e4 342
1da177e4 343/*
0ebfff14 344 * IRQ controller and virtual interrupts
1da177e4
LT
345 */
346
0ebfff14 347#ifdef CONFIG_PPC_MERGE
1da177e4 348
0ebfff14
BH
349static LIST_HEAD(irq_hosts);
350static spinlock_t irq_big_lock = SPIN_LOCK_UNLOCKED;
8ec8f2e8
BH
351static DEFINE_PER_CPU(unsigned int, irq_radix_reader);
352static unsigned int irq_radix_writer;
0ebfff14
BH
353struct irq_map_entry irq_map[NR_IRQS];
354static unsigned int irq_virq_count = NR_IRQS;
355static struct irq_host *irq_default_host;
1da177e4 356
0ebfff14
BH
357struct irq_host *irq_alloc_host(unsigned int revmap_type,
358 unsigned int revmap_arg,
359 struct irq_host_ops *ops,
360 irq_hw_number_t inval_irq)
1da177e4 361{
0ebfff14
BH
362 struct irq_host *host;
363 unsigned int size = sizeof(struct irq_host);
364 unsigned int i;
365 unsigned int *rmap;
366 unsigned long flags;
367
368 /* Allocate structure and revmap table if using linear mapping */
369 if (revmap_type == IRQ_HOST_MAP_LINEAR)
370 size += revmap_arg * sizeof(unsigned int);
371 if (mem_init_done)
372 host = kzalloc(size, GFP_KERNEL);
373 else {
374 host = alloc_bootmem(size);
375 if (host)
376 memset(host, 0, size);
377 }
378 if (host == NULL)
379 return NULL;
7d01c880 380
0ebfff14
BH
381 /* Fill structure */
382 host->revmap_type = revmap_type;
383 host->inval_irq = inval_irq;
384 host->ops = ops;
7d01c880 385
0ebfff14
BH
386 spin_lock_irqsave(&irq_big_lock, flags);
387
388 /* If it's a legacy controller, check for duplicates and
389 * mark it as allocated (we use irq 0 host pointer for that
390 */
391 if (revmap_type == IRQ_HOST_MAP_LEGACY) {
392 if (irq_map[0].host != NULL) {
393 spin_unlock_irqrestore(&irq_big_lock, flags);
394 /* If we are early boot, we can't free the structure,
395 * too bad...
396 * this will be fixed once slab is made available early
397 * instead of the current cruft
398 */
399 if (mem_init_done)
400 kfree(host);
401 return NULL;
402 }
403 irq_map[0].host = host;
404 }
405
406 list_add(&host->link, &irq_hosts);
407 spin_unlock_irqrestore(&irq_big_lock, flags);
408
409 /* Additional setups per revmap type */
410 switch(revmap_type) {
411 case IRQ_HOST_MAP_LEGACY:
412 /* 0 is always the invalid number for legacy */
413 host->inval_irq = 0;
414 /* setup us as the host for all legacy interrupts */
415 for (i = 1; i < NUM_ISA_INTERRUPTS; i++) {
416 irq_map[i].hwirq = 0;
417 smp_wmb();
418 irq_map[i].host = host;
419 smp_wmb();
420
6e99e458
BH
421 /* Clear norequest flags */
422 get_irq_desc(i)->status &= ~IRQ_NOREQUEST;
0ebfff14
BH
423
424 /* Legacy flags are left to default at this point,
425 * one can then use irq_create_mapping() to
426 * explicitely change them
427 */
6e99e458 428 ops->map(host, i, i);
0ebfff14
BH
429 }
430 break;
431 case IRQ_HOST_MAP_LINEAR:
432 rmap = (unsigned int *)(host + 1);
433 for (i = 0; i < revmap_arg; i++)
434 rmap[i] = IRQ_NONE;
435 host->revmap_data.linear.size = revmap_arg;
436 smp_wmb();
437 host->revmap_data.linear.revmap = rmap;
438 break;
439 default:
440 break;
441 }
442
443 pr_debug("irq: Allocated host of type %d @0x%p\n", revmap_type, host);
444
445 return host;
1da177e4
LT
446}
447
0ebfff14 448struct irq_host *irq_find_host(struct device_node *node)
1da177e4 449{
0ebfff14
BH
450 struct irq_host *h, *found = NULL;
451 unsigned long flags;
452
453 /* We might want to match the legacy controller last since
454 * it might potentially be set to match all interrupts in
455 * the absence of a device node. This isn't a problem so far
456 * yet though...
457 */
458 spin_lock_irqsave(&irq_big_lock, flags);
459 list_for_each_entry(h, &irq_hosts, link)
460 if (h->ops->match == NULL || h->ops->match(h, node)) {
461 found = h;
462 break;
463 }
464 spin_unlock_irqrestore(&irq_big_lock, flags);
465 return found;
466}
467EXPORT_SYMBOL_GPL(irq_find_host);
468
469void irq_set_default_host(struct irq_host *host)
470{
471 pr_debug("irq: Default host set to @0x%p\n", host);
1da177e4 472
0ebfff14
BH
473 irq_default_host = host;
474}
1da177e4 475
0ebfff14
BH
476void irq_set_virq_count(unsigned int count)
477{
478 pr_debug("irq: Trying to set virq count to %d\n", count);
fef1c772 479
0ebfff14
BH
480 BUG_ON(count < NUM_ISA_INTERRUPTS);
481 if (count < NR_IRQS)
482 irq_virq_count = count;
483}
484
8ec8f2e8
BH
485/* radix tree not lockless safe ! we use a brlock-type mecanism
486 * for now, until we can use a lockless radix tree
487 */
488static void irq_radix_wrlock(unsigned long *flags)
489{
490 unsigned int cpu, ok;
491
492 spin_lock_irqsave(&irq_big_lock, *flags);
493 irq_radix_writer = 1;
494 smp_mb();
495 do {
496 barrier();
497 ok = 1;
498 for_each_possible_cpu(cpu) {
499 if (per_cpu(irq_radix_reader, cpu)) {
500 ok = 0;
501 break;
502 }
503 }
504 if (!ok)
505 cpu_relax();
506 } while(!ok);
507}
508
509static void irq_radix_wrunlock(unsigned long flags)
510{
511 smp_wmb();
512 irq_radix_writer = 0;
513 spin_unlock_irqrestore(&irq_big_lock, flags);
514}
515
516static void irq_radix_rdlock(unsigned long *flags)
517{
518 local_irq_save(*flags);
519 __get_cpu_var(irq_radix_reader) = 1;
520 smp_mb();
521 if (likely(irq_radix_writer == 0))
522 return;
523 __get_cpu_var(irq_radix_reader) = 0;
524 smp_wmb();
525 spin_lock(&irq_big_lock);
526 __get_cpu_var(irq_radix_reader) = 1;
527 spin_unlock(&irq_big_lock);
528}
529
530static void irq_radix_rdunlock(unsigned long flags)
531{
532 __get_cpu_var(irq_radix_reader) = 0;
533 local_irq_restore(flags);
534}
535
536
0ebfff14 537unsigned int irq_create_mapping(struct irq_host *host,
6e99e458 538 irq_hw_number_t hwirq)
0ebfff14
BH
539{
540 unsigned int virq, hint;
541
6e99e458 542 pr_debug("irq: irq_create_mapping(0x%p, 0x%lx)\n", host, hwirq);
0ebfff14
BH
543
544 /* Look for default host if nececssary */
545 if (host == NULL)
546 host = irq_default_host;
547 if (host == NULL) {
548 printk(KERN_WARNING "irq_create_mapping called for"
549 " NULL host, hwirq=%lx\n", hwirq);
550 WARN_ON(1);
551 return NO_IRQ;
1da177e4 552 }
0ebfff14 553 pr_debug("irq: -> using host @%p\n", host);
1da177e4 554
0ebfff14
BH
555 /* Check if mapping already exist, if it does, call
556 * host->ops->map() to update the flags
557 */
558 virq = irq_find_mapping(host, hwirq);
559 if (virq != IRQ_NONE) {
560 pr_debug("irq: -> existing mapping on virq %d\n", virq);
0ebfff14 561 return virq;
1da177e4
LT
562 }
563
0ebfff14
BH
564 /* Get a virtual interrupt number */
565 if (host->revmap_type == IRQ_HOST_MAP_LEGACY) {
566 /* Handle legacy */
567 virq = (unsigned int)hwirq;
568 if (virq == 0 || virq >= NUM_ISA_INTERRUPTS)
569 return NO_IRQ;
570 return virq;
571 } else {
572 /* Allocate a virtual interrupt number */
573 hint = hwirq % irq_virq_count;
574 virq = irq_alloc_virt(host, 1, hint);
575 if (virq == NO_IRQ) {
576 pr_debug("irq: -> virq allocation failed\n");
577 return NO_IRQ;
578 }
579 }
580 pr_debug("irq: -> obtained virq %d\n", virq);
581
6e99e458
BH
582 /* Clear IRQ_NOREQUEST flag */
583 get_irq_desc(virq)->status &= ~IRQ_NOREQUEST;
0ebfff14
BH
584
585 /* map it */
6e99e458
BH
586 smp_wmb();
587 irq_map[virq].hwirq = hwirq;
588 smp_mb();
589 if (host->ops->map(host, virq, hwirq)) {
0ebfff14
BH
590 pr_debug("irq: -> mapping failed, freeing\n");
591 irq_free_virt(virq, 1);
592 return NO_IRQ;
593 }
1da177e4 594 return virq;
0ebfff14
BH
595}
596EXPORT_SYMBOL_GPL(irq_create_mapping);
597
f3d2ab41
AV
598unsigned int irq_create_of_mapping(struct device_node *controller,
599 u32 *intspec, unsigned int intsize)
0ebfff14
BH
600{
601 struct irq_host *host;
602 irq_hw_number_t hwirq;
6e99e458
BH
603 unsigned int type = IRQ_TYPE_NONE;
604 unsigned int virq;
1da177e4 605
0ebfff14
BH
606 if (controller == NULL)
607 host = irq_default_host;
608 else
609 host = irq_find_host(controller);
6e99e458
BH
610 if (host == NULL) {
611 printk(KERN_WARNING "irq: no irq host found for %s !\n",
612 controller->full_name);
0ebfff14 613 return NO_IRQ;
6e99e458 614 }
0ebfff14
BH
615
616 /* If host has no translation, then we assume interrupt line */
617 if (host->ops->xlate == NULL)
618 hwirq = intspec[0];
619 else {
620 if (host->ops->xlate(host, controller, intspec, intsize,
6e99e458 621 &hwirq, &type))
0ebfff14 622 return NO_IRQ;
1da177e4 623 }
0ebfff14 624
6e99e458
BH
625 /* Create mapping */
626 virq = irq_create_mapping(host, hwirq);
627 if (virq == NO_IRQ)
628 return virq;
629
630 /* Set type if specified and different than the current one */
631 if (type != IRQ_TYPE_NONE &&
632 type != (get_irq_desc(virq)->status & IRQF_TRIGGER_MASK))
633 set_irq_type(virq, type);
634 return virq;
1da177e4 635}
0ebfff14 636EXPORT_SYMBOL_GPL(irq_create_of_mapping);
1da177e4 637
0ebfff14 638unsigned int irq_of_parse_and_map(struct device_node *dev, int index)
1da177e4 639{
0ebfff14 640 struct of_irq oirq;
1da177e4 641
0ebfff14
BH
642 if (of_irq_map_one(dev, index, &oirq))
643 return NO_IRQ;
1da177e4 644
0ebfff14
BH
645 return irq_create_of_mapping(oirq.controller, oirq.specifier,
646 oirq.size);
647}
648EXPORT_SYMBOL_GPL(irq_of_parse_and_map);
1da177e4 649
0ebfff14
BH
650void irq_dispose_mapping(unsigned int virq)
651{
5414c6be 652 struct irq_host *host;
0ebfff14
BH
653 irq_hw_number_t hwirq;
654 unsigned long flags;
1da177e4 655
5414c6be
ME
656 if (virq == NO_IRQ)
657 return;
658
659 host = irq_map[virq].host;
0ebfff14
BH
660 WARN_ON (host == NULL);
661 if (host == NULL)
662 return;
1da177e4 663
0ebfff14
BH
664 /* Never unmap legacy interrupts */
665 if (host->revmap_type == IRQ_HOST_MAP_LEGACY)
666 return;
1da177e4 667
0ebfff14
BH
668 /* remove chip and handler */
669 set_irq_chip_and_handler(virq, NULL, NULL);
670
671 /* Make sure it's completed */
672 synchronize_irq(virq);
673
674 /* Tell the PIC about it */
675 if (host->ops->unmap)
676 host->ops->unmap(host, virq);
677 smp_mb();
678
679 /* Clear reverse map */
680 hwirq = irq_map[virq].hwirq;
681 switch(host->revmap_type) {
682 case IRQ_HOST_MAP_LINEAR:
683 if (hwirq < host->revmap_data.linear.size)
684 host->revmap_data.linear.revmap[hwirq] = IRQ_NONE;
685 break;
686 case IRQ_HOST_MAP_TREE:
687 /* Check if radix tree allocated yet */
688 if (host->revmap_data.tree.gfp_mask == 0)
689 break;
8ec8f2e8 690 irq_radix_wrlock(&flags);
0ebfff14 691 radix_tree_delete(&host->revmap_data.tree, hwirq);
8ec8f2e8 692 irq_radix_wrunlock(flags);
0ebfff14
BH
693 break;
694 }
1da177e4 695
0ebfff14
BH
696 /* Destroy map */
697 smp_mb();
698 irq_map[virq].hwirq = host->inval_irq;
1da177e4 699
0ebfff14
BH
700 /* Set some flags */
701 get_irq_desc(virq)->status |= IRQ_NOREQUEST;
1da177e4 702
0ebfff14
BH
703 /* Free it */
704 irq_free_virt(virq, 1);
1da177e4 705}
0ebfff14 706EXPORT_SYMBOL_GPL(irq_dispose_mapping);
1da177e4 707
0ebfff14
BH
708unsigned int irq_find_mapping(struct irq_host *host,
709 irq_hw_number_t hwirq)
710{
711 unsigned int i;
712 unsigned int hint = hwirq % irq_virq_count;
713
714 /* Look for default host if nececssary */
715 if (host == NULL)
716 host = irq_default_host;
717 if (host == NULL)
718 return NO_IRQ;
719
720 /* legacy -> bail early */
721 if (host->revmap_type == IRQ_HOST_MAP_LEGACY)
722 return hwirq;
723
724 /* Slow path does a linear search of the map */
725 if (hint < NUM_ISA_INTERRUPTS)
726 hint = NUM_ISA_INTERRUPTS;
727 i = hint;
728 do {
729 if (irq_map[i].host == host &&
730 irq_map[i].hwirq == hwirq)
731 return i;
732 i++;
733 if (i >= irq_virq_count)
734 i = NUM_ISA_INTERRUPTS;
735 } while(i != hint);
736 return NO_IRQ;
737}
738EXPORT_SYMBOL_GPL(irq_find_mapping);
1da177e4 739
0ebfff14
BH
740
741unsigned int irq_radix_revmap(struct irq_host *host,
742 irq_hw_number_t hwirq)
1da177e4 743{
0ebfff14
BH
744 struct radix_tree_root *tree;
745 struct irq_map_entry *ptr;
746 unsigned int virq;
747 unsigned long flags;
1da177e4 748
0ebfff14 749 WARN_ON(host->revmap_type != IRQ_HOST_MAP_TREE);
1da177e4 750
0ebfff14
BH
751 /* Check if the radix tree exist yet. We test the value of
752 * the gfp_mask for that. Sneaky but saves another int in the
753 * structure. If not, we fallback to slow mode
754 */
755 tree = &host->revmap_data.tree;
756 if (tree->gfp_mask == 0)
757 return irq_find_mapping(host, hwirq);
758
0ebfff14 759 /* Now try to resolve */
8ec8f2e8 760 irq_radix_rdlock(&flags);
0ebfff14 761 ptr = radix_tree_lookup(tree, hwirq);
8ec8f2e8
BH
762 irq_radix_rdunlock(flags);
763
0ebfff14
BH
764 /* Found it, return */
765 if (ptr) {
766 virq = ptr - irq_map;
8ec8f2e8 767 return virq;
1da177e4 768 }
0ebfff14
BH
769
770 /* If not there, try to insert it */
771 virq = irq_find_mapping(host, hwirq);
8ec8f2e8
BH
772 if (virq != NO_IRQ) {
773 irq_radix_wrlock(&flags);
e5c14ce1 774 radix_tree_insert(tree, hwirq, &irq_map[virq]);
8ec8f2e8
BH
775 irq_radix_wrunlock(flags);
776 }
0ebfff14 777 return virq;
1da177e4
LT
778}
779
0ebfff14
BH
780unsigned int irq_linear_revmap(struct irq_host *host,
781 irq_hw_number_t hwirq)
c6622f63 782{
0ebfff14 783 unsigned int *revmap;
c6622f63 784
0ebfff14
BH
785 WARN_ON(host->revmap_type != IRQ_HOST_MAP_LINEAR);
786
787 /* Check revmap bounds */
788 if (unlikely(hwirq >= host->revmap_data.linear.size))
789 return irq_find_mapping(host, hwirq);
790
791 /* Check if revmap was allocated */
792 revmap = host->revmap_data.linear.revmap;
793 if (unlikely(revmap == NULL))
794 return irq_find_mapping(host, hwirq);
795
796 /* Fill up revmap with slow path if no mapping found */
797 if (unlikely(revmap[hwirq] == NO_IRQ))
798 revmap[hwirq] = irq_find_mapping(host, hwirq);
799
800 return revmap[hwirq];
c6622f63
PM
801}
802
0ebfff14
BH
803unsigned int irq_alloc_virt(struct irq_host *host,
804 unsigned int count,
805 unsigned int hint)
806{
807 unsigned long flags;
808 unsigned int i, j, found = NO_IRQ;
c6622f63 809
0ebfff14
BH
810 if (count == 0 || count > (irq_virq_count - NUM_ISA_INTERRUPTS))
811 return NO_IRQ;
812
813 spin_lock_irqsave(&irq_big_lock, flags);
814
815 /* Use hint for 1 interrupt if any */
816 if (count == 1 && hint >= NUM_ISA_INTERRUPTS &&
817 hint < irq_virq_count && irq_map[hint].host == NULL) {
818 found = hint;
819 goto hint_found;
820 }
821
822 /* Look for count consecutive numbers in the allocatable
823 * (non-legacy) space
824 */
e1251465
ME
825 for (i = NUM_ISA_INTERRUPTS, j = 0; i < irq_virq_count; i++) {
826 if (irq_map[i].host != NULL)
827 j = 0;
828 else
829 j++;
830
831 if (j == count) {
832 found = i - count + 1;
833 break;
834 }
0ebfff14
BH
835 }
836 if (found == NO_IRQ) {
837 spin_unlock_irqrestore(&irq_big_lock, flags);
838 return NO_IRQ;
839 }
840 hint_found:
841 for (i = found; i < (found + count); i++) {
842 irq_map[i].hwirq = host->inval_irq;
843 smp_wmb();
844 irq_map[i].host = host;
845 }
846 spin_unlock_irqrestore(&irq_big_lock, flags);
847 return found;
848}
849
850void irq_free_virt(unsigned int virq, unsigned int count)
1da177e4
LT
851{
852 unsigned long flags;
0ebfff14 853 unsigned int i;
1da177e4 854
0ebfff14
BH
855 WARN_ON (virq < NUM_ISA_INTERRUPTS);
856 WARN_ON (count == 0 || (virq + count) > irq_virq_count);
1da177e4 857
0ebfff14
BH
858 spin_lock_irqsave(&irq_big_lock, flags);
859 for (i = virq; i < (virq + count); i++) {
860 struct irq_host *host;
1da177e4 861
0ebfff14
BH
862 if (i < NUM_ISA_INTERRUPTS ||
863 (virq + count) > irq_virq_count)
864 continue;
1da177e4 865
0ebfff14
BH
866 host = irq_map[i].host;
867 irq_map[i].hwirq = host->inval_irq;
868 smp_wmb();
869 irq_map[i].host = NULL;
870 }
871 spin_unlock_irqrestore(&irq_big_lock, flags);
1da177e4 872}
0ebfff14
BH
873
874void irq_early_init(void)
875{
876 unsigned int i;
877
878 for (i = 0; i < NR_IRQS; i++)
879 get_irq_desc(i)->status |= IRQ_NOREQUEST;
880}
881
882/* We need to create the radix trees late */
883static int irq_late_init(void)
884{
885 struct irq_host *h;
886 unsigned long flags;
887
8ec8f2e8 888 irq_radix_wrlock(&flags);
0ebfff14
BH
889 list_for_each_entry(h, &irq_hosts, link) {
890 if (h->revmap_type == IRQ_HOST_MAP_TREE)
891 INIT_RADIX_TREE(&h->revmap_data.tree, GFP_ATOMIC);
892 }
8ec8f2e8 893 irq_radix_wrunlock(flags);
0ebfff14
BH
894
895 return 0;
896}
897arch_initcall(irq_late_init);
898
899#endif /* CONFIG_PPC_MERGE */
1da177e4 900
204face4
JM
901#ifdef CONFIG_PCI_MSI
902int pci_enable_msi(struct pci_dev * pdev)
903{
904 if (ppc_md.enable_msi)
905 return ppc_md.enable_msi(pdev);
906 else
907 return -1;
908}
45934c47 909EXPORT_SYMBOL(pci_enable_msi);
204face4
JM
910
911void pci_disable_msi(struct pci_dev * pdev)
912{
913 if (ppc_md.disable_msi)
914 ppc_md.disable_msi(pdev);
915}
45934c47 916EXPORT_SYMBOL(pci_disable_msi);
204face4
JM
917
918void pci_scan_msi_device(struct pci_dev *dev) {}
919int pci_enable_msix(struct pci_dev* dev, struct msix_entry *entries, int nvec) {return -1;}
920void pci_disable_msix(struct pci_dev *dev) {}
921void msi_remove_pci_irq_vectors(struct pci_dev *dev) {}
922void disable_msi_mode(struct pci_dev *dev, int pos, int type) {}
923void pci_no_msi(void) {}
45934c47
JM
924EXPORT_SYMBOL(pci_enable_msix);
925EXPORT_SYMBOL(pci_disable_msix);
204face4
JM
926
927#endif
928
c6622f63 929#ifdef CONFIG_PPC64
1da177e4
LT
930static int __init setup_noirqdistrib(char *str)
931{
932 distribute_irqs = 0;
933 return 1;
934}
935
936__setup("noirqdistrib", setup_noirqdistrib);
756e7104 937#endif /* CONFIG_PPC64 */