[PATCH] aoa: tas: add missing bass/treble controls
[GitHub/mt8127/android_kernel_alcatel_ttab.git] / arch / powerpc / kernel / irq.c
CommitLineData
1da177e4 1/*
1da177e4
LT
2 * Derived from arch/i386/kernel/irq.c
3 * Copyright (C) 1992 Linus Torvalds
4 * Adapted from arch/i386 by Gary Thomas
5 * Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org)
756e7104
SR
6 * Updated and modified by Cort Dougan <cort@fsmlabs.com>
7 * Copyright (C) 1996-2001 Cort Dougan
1da177e4
LT
8 * Adapted for Power Macintosh by Paul Mackerras
9 * Copyright (C) 1996 Paul Mackerras (paulus@cs.anu.edu.au)
10 * Amiga/APUS changes by Jesper Skov (jskov@cygnus.co.uk).
756e7104 11 *
1da177e4
LT
12 * This program is free software; you can redistribute it and/or
13 * modify it under the terms of the GNU General Public License
14 * as published by the Free Software Foundation; either version
15 * 2 of the License, or (at your option) any later version.
16 *
17 * This file contains the code used by various IRQ handling routines:
18 * asking for different IRQ's should be done through these routines
19 * instead of just grabbing them. Thus setups with different IRQ numbers
20 * shouldn't result in any weird surprises, and installing new handlers
21 * should be easier.
756e7104
SR
22 *
23 * The MPC8xx has an interrupt mask in the SIU. If a bit is set, the
24 * interrupt is _enabled_. As expected, IRQ0 is bit 0 in the 32-bit
25 * mask register (of which only 16 are defined), hence the weird shifting
26 * and complement of the cached_irq_mask. I want to be able to stuff
27 * this right into the SIU SMASK register.
28 * Many of the prep/chrp functions are conditional compiled on CONFIG_8xx
29 * to reduce code space and undefined function references.
1da177e4
LT
30 */
31
0ebfff14
BH
32#undef DEBUG
33
1da177e4
LT
34#include <linux/module.h>
35#include <linux/threads.h>
36#include <linux/kernel_stat.h>
37#include <linux/signal.h>
38#include <linux/sched.h>
756e7104 39#include <linux/ptrace.h>
1da177e4
LT
40#include <linux/ioport.h>
41#include <linux/interrupt.h>
42#include <linux/timex.h>
1da177e4
LT
43#include <linux/init.h>
44#include <linux/slab.h>
1da177e4
LT
45#include <linux/delay.h>
46#include <linux/irq.h>
756e7104
SR
47#include <linux/seq_file.h>
48#include <linux/cpumask.h>
1da177e4
LT
49#include <linux/profile.h>
50#include <linux/bitops.h>
0ebfff14
BH
51#include <linux/list.h>
52#include <linux/radix-tree.h>
53#include <linux/mutex.h>
54#include <linux/bootmem.h>
1da177e4
LT
55
56#include <asm/uaccess.h>
57#include <asm/system.h>
58#include <asm/io.h>
59#include <asm/pgtable.h>
60#include <asm/irq.h>
61#include <asm/cache.h>
62#include <asm/prom.h>
63#include <asm/ptrace.h>
1da177e4 64#include <asm/machdep.h>
0ebfff14 65#include <asm/udbg.h>
a50b56d2 66#ifdef CONFIG_PPC_ISERIES
1da177e4 67#include <asm/paca.h>
756e7104 68#endif
1da177e4 69
868accb7 70int __irq_offset_value;
756e7104
SR
71static int ppc_spurious_interrupts;
72
756e7104 73#ifdef CONFIG_PPC32
b9e5b4e6
BH
74EXPORT_SYMBOL(__irq_offset_value);
75atomic_t ppc_n_lost_interrupts;
756e7104 76
b9e5b4e6
BH
77#ifndef CONFIG_PPC_MERGE
78#define NR_MASK_WORDS ((NR_IRQS + 31) / 32)
756e7104 79unsigned long ppc_cached_irq_mask[NR_MASK_WORDS];
b9e5b4e6 80#endif
756e7104
SR
81
82#ifdef CONFIG_TAU_INT
83extern int tau_initialized;
84extern int tau_interrupts(int);
85#endif
b9e5b4e6 86#endif /* CONFIG_PPC32 */
756e7104
SR
87
88#if defined(CONFIG_SMP) && !defined(CONFIG_PPC_MERGE)
89extern atomic_t ipi_recv;
90extern atomic_t ipi_sent;
91#endif
756e7104
SR
92
93#ifdef CONFIG_PPC64
1da177e4
LT
94EXPORT_SYMBOL(irq_desc);
95
96int distribute_irqs = 1;
756e7104 97#endif /* CONFIG_PPC64 */
1da177e4
LT
98
99int show_interrupts(struct seq_file *p, void *v)
100{
756e7104
SR
101 int i = *(loff_t *)v, j;
102 struct irqaction *action;
1da177e4
LT
103 irq_desc_t *desc;
104 unsigned long flags;
105
106 if (i == 0) {
756e7104
SR
107 seq_puts(p, " ");
108 for_each_online_cpu(j)
109 seq_printf(p, "CPU%d ", j);
1da177e4
LT
110 seq_putc(p, '\n');
111 }
112
113 if (i < NR_IRQS) {
114 desc = get_irq_desc(i);
115 spin_lock_irqsave(&desc->lock, flags);
116 action = desc->action;
117 if (!action || !action->handler)
118 goto skip;
119 seq_printf(p, "%3d: ", i);
120#ifdef CONFIG_SMP
756e7104
SR
121 for_each_online_cpu(j)
122 seq_printf(p, "%10u ", kstat_cpu(j).irqs[i]);
1da177e4
LT
123#else
124 seq_printf(p, "%10u ", kstat_irqs(i));
125#endif /* CONFIG_SMP */
d1bef4ed
IM
126 if (desc->chip)
127 seq_printf(p, " %s ", desc->chip->typename);
1da177e4 128 else
756e7104 129 seq_puts(p, " None ");
1da177e4 130 seq_printf(p, "%s", (desc->status & IRQ_LEVEL) ? "Level " : "Edge ");
756e7104
SR
131 seq_printf(p, " %s", action->name);
132 for (action = action->next; action; action = action->next)
1da177e4
LT
133 seq_printf(p, ", %s", action->name);
134 seq_putc(p, '\n');
135skip:
136 spin_unlock_irqrestore(&desc->lock, flags);
756e7104
SR
137 } else if (i == NR_IRQS) {
138#ifdef CONFIG_PPC32
139#ifdef CONFIG_TAU_INT
140 if (tau_initialized){
141 seq_puts(p, "TAU: ");
394e3902
AM
142 for_each_online_cpu(j)
143 seq_printf(p, "%10u ", tau_interrupts(j));
756e7104
SR
144 seq_puts(p, " PowerPC Thermal Assist (cpu temp)\n");
145 }
146#endif
147#if defined(CONFIG_SMP) && !defined(CONFIG_PPC_MERGE)
148 /* should this be per processor send/receive? */
149 seq_printf(p, "IPI (recv/sent): %10u/%u\n",
150 atomic_read(&ipi_recv), atomic_read(&ipi_sent));
151#endif
152#endif /* CONFIG_PPC32 */
1da177e4 153 seq_printf(p, "BAD: %10u\n", ppc_spurious_interrupts);
756e7104 154 }
1da177e4
LT
155 return 0;
156}
157
158#ifdef CONFIG_HOTPLUG_CPU
159void fixup_irqs(cpumask_t map)
160{
161 unsigned int irq;
162 static int warned;
163
164 for_each_irq(irq) {
165 cpumask_t mask;
166
167 if (irq_desc[irq].status & IRQ_PER_CPU)
168 continue;
169
a53da52f 170 cpus_and(mask, irq_desc[irq].affinity, map);
1da177e4
LT
171 if (any_online_cpu(mask) == NR_CPUS) {
172 printk("Breaking affinity for irq %i\n", irq);
173 mask = map;
174 }
d1bef4ed
IM
175 if (irq_desc[irq].chip->set_affinity)
176 irq_desc[irq].chip->set_affinity(irq, mask);
1da177e4
LT
177 else if (irq_desc[irq].action && !(warned++))
178 printk("Cannot set affinity for irq %i\n", irq);
179 }
180
181 local_irq_enable();
182 mdelay(1);
183 local_irq_disable();
184}
185#endif
186
1da177e4
LT
187void do_IRQ(struct pt_regs *regs)
188{
0ebfff14 189 unsigned int irq;
b709c083
SR
190#ifdef CONFIG_IRQSTACKS
191 struct thread_info *curtp, *irqtp;
192#endif
1da177e4 193
756e7104 194 irq_enter();
1da177e4
LT
195
196#ifdef CONFIG_DEBUG_STACKOVERFLOW
197 /* Debugging check for stack overflow: is there less than 2KB free? */
198 {
199 long sp;
200
201 sp = __get_SP() & (THREAD_SIZE-1);
202
203 if (unlikely(sp < (sizeof(struct thread_info) + 2048))) {
204 printk("do_IRQ: stack overflow: %ld\n",
205 sp - sizeof(struct thread_info));
206 dump_stack();
207 }
208 }
209#endif
210
756e7104
SR
211 /*
212 * Every platform is required to implement ppc_md.get_irq.
213 * This function will either return an irq number or -1 to
214 * indicate there are no more pending.
215 * The value -2 is for buggy hardware and means that this IRQ
216 * has already been handled. -- Tom
217 */
1da177e4
LT
218 irq = ppc_md.get_irq(regs);
219
0ebfff14 220 if (irq != NO_IRQ && irq != NO_IRQ_IGNORE) {
b709c083
SR
221#ifdef CONFIG_IRQSTACKS
222 /* Switch to the irq stack to handle this */
223 curtp = current_thread_info();
224 irqtp = hardirq_ctx[smp_processor_id()];
225 if (curtp != irqtp) {
b9e5b4e6
BH
226 struct irq_desc *desc = irq_desc + irq;
227 void *handler = desc->handle_irq;
228 if (handler == NULL)
229 handler = &__do_IRQ;
b709c083
SR
230 irqtp->task = curtp->task;
231 irqtp->flags = 0;
b9e5b4e6 232 call_handle_irq(irq, desc, regs, irqtp, handler);
b709c083
SR
233 irqtp->task = NULL;
234 if (irqtp->flags)
235 set_bits(irqtp->flags, &curtp->flags);
236 } else
237#endif
b9e5b4e6 238 generic_handle_irq(irq, regs);
0ebfff14 239 } else if (irq != NO_IRQ_IGNORE)
e199500c
SR
240 /* That's not SMP safe ... but who cares ? */
241 ppc_spurious_interrupts++;
242
756e7104 243 irq_exit();
756e7104 244
e199500c 245#ifdef CONFIG_PPC_ISERIES
3356bb9f
DG
246 if (get_lppaca()->int_dword.fields.decr_int) {
247 get_lppaca()->int_dword.fields.decr_int = 0;
248 /* Signal a fake decrementer interrupt */
249 timer_interrupt(regs);
e199500c
SR
250 }
251#endif
252}
1da177e4
LT
253
254void __init init_IRQ(void)
255{
1da177e4 256 ppc_md.init_IRQ();
756e7104 257#ifdef CONFIG_PPC64
1da177e4 258 irq_ctx_init();
756e7104 259#endif
1da177e4
LT
260}
261
1da177e4 262
1da177e4 263#ifdef CONFIG_IRQSTACKS
22722051
AM
264struct thread_info *softirq_ctx[NR_CPUS] __read_mostly;
265struct thread_info *hardirq_ctx[NR_CPUS] __read_mostly;
1da177e4
LT
266
267void irq_ctx_init(void)
268{
269 struct thread_info *tp;
270 int i;
271
0e551954 272 for_each_possible_cpu(i) {
1da177e4
LT
273 memset((void *)softirq_ctx[i], 0, THREAD_SIZE);
274 tp = softirq_ctx[i];
275 tp->cpu = i;
276 tp->preempt_count = SOFTIRQ_OFFSET;
277
278 memset((void *)hardirq_ctx[i], 0, THREAD_SIZE);
279 tp = hardirq_ctx[i];
280 tp->cpu = i;
281 tp->preempt_count = HARDIRQ_OFFSET;
282 }
283}
284
c6622f63
PM
285static inline void do_softirq_onstack(void)
286{
287 struct thread_info *curtp, *irqtp;
288
289 curtp = current_thread_info();
290 irqtp = softirq_ctx[smp_processor_id()];
291 irqtp->task = curtp->task;
292 call_do_softirq(irqtp);
293 irqtp->task = NULL;
294}
1da177e4 295
c6622f63
PM
296#else
297#define do_softirq_onstack() __do_softirq()
298#endif /* CONFIG_IRQSTACKS */
299
1da177e4
LT
300void do_softirq(void)
301{
302 unsigned long flags;
1da177e4
LT
303
304 if (in_interrupt())
1da177e4
LT
305 return;
306
1da177e4 307 local_irq_save(flags);
1da177e4 308
912b2539 309 if (local_softirq_pending())
c6622f63 310 do_softirq_onstack();
1da177e4
LT
311
312 local_irq_restore(flags);
1da177e4 313}
1da177e4
LT
314EXPORT_SYMBOL(do_softirq);
315
1da177e4 316
1da177e4 317/*
0ebfff14 318 * IRQ controller and virtual interrupts
1da177e4
LT
319 */
320
0ebfff14 321#ifdef CONFIG_PPC_MERGE
1da177e4 322
0ebfff14
BH
323static LIST_HEAD(irq_hosts);
324static spinlock_t irq_big_lock = SPIN_LOCK_UNLOCKED;
7d01c880 325
0ebfff14
BH
326struct irq_map_entry irq_map[NR_IRQS];
327static unsigned int irq_virq_count = NR_IRQS;
328static struct irq_host *irq_default_host;
1da177e4 329
0ebfff14
BH
330struct irq_host *irq_alloc_host(unsigned int revmap_type,
331 unsigned int revmap_arg,
332 struct irq_host_ops *ops,
333 irq_hw_number_t inval_irq)
1da177e4 334{
0ebfff14
BH
335 struct irq_host *host;
336 unsigned int size = sizeof(struct irq_host);
337 unsigned int i;
338 unsigned int *rmap;
339 unsigned long flags;
340
341 /* Allocate structure and revmap table if using linear mapping */
342 if (revmap_type == IRQ_HOST_MAP_LINEAR)
343 size += revmap_arg * sizeof(unsigned int);
344 if (mem_init_done)
345 host = kzalloc(size, GFP_KERNEL);
346 else {
347 host = alloc_bootmem(size);
348 if (host)
349 memset(host, 0, size);
350 }
351 if (host == NULL)
352 return NULL;
7d01c880 353
0ebfff14
BH
354 /* Fill structure */
355 host->revmap_type = revmap_type;
356 host->inval_irq = inval_irq;
357 host->ops = ops;
7d01c880 358
0ebfff14
BH
359 spin_lock_irqsave(&irq_big_lock, flags);
360
361 /* If it's a legacy controller, check for duplicates and
362 * mark it as allocated (we use irq 0 host pointer for that
363 */
364 if (revmap_type == IRQ_HOST_MAP_LEGACY) {
365 if (irq_map[0].host != NULL) {
366 spin_unlock_irqrestore(&irq_big_lock, flags);
367 /* If we are early boot, we can't free the structure,
368 * too bad...
369 * this will be fixed once slab is made available early
370 * instead of the current cruft
371 */
372 if (mem_init_done)
373 kfree(host);
374 return NULL;
375 }
376 irq_map[0].host = host;
377 }
378
379 list_add(&host->link, &irq_hosts);
380 spin_unlock_irqrestore(&irq_big_lock, flags);
381
382 /* Additional setups per revmap type */
383 switch(revmap_type) {
384 case IRQ_HOST_MAP_LEGACY:
385 /* 0 is always the invalid number for legacy */
386 host->inval_irq = 0;
387 /* setup us as the host for all legacy interrupts */
388 for (i = 1; i < NUM_ISA_INTERRUPTS; i++) {
389 irq_map[i].hwirq = 0;
390 smp_wmb();
391 irq_map[i].host = host;
392 smp_wmb();
393
394 /* Clear some flags */
395 get_irq_desc(i)->status
396 &= ~(IRQ_NOREQUEST | IRQ_LEVEL);
397
398 /* Legacy flags are left to default at this point,
399 * one can then use irq_create_mapping() to
400 * explicitely change them
401 */
402 ops->map(host, i, i, 0);
403 }
404 break;
405 case IRQ_HOST_MAP_LINEAR:
406 rmap = (unsigned int *)(host + 1);
407 for (i = 0; i < revmap_arg; i++)
408 rmap[i] = IRQ_NONE;
409 host->revmap_data.linear.size = revmap_arg;
410 smp_wmb();
411 host->revmap_data.linear.revmap = rmap;
412 break;
413 default:
414 break;
415 }
416
417 pr_debug("irq: Allocated host of type %d @0x%p\n", revmap_type, host);
418
419 return host;
1da177e4
LT
420}
421
0ebfff14 422struct irq_host *irq_find_host(struct device_node *node)
1da177e4 423{
0ebfff14
BH
424 struct irq_host *h, *found = NULL;
425 unsigned long flags;
426
427 /* We might want to match the legacy controller last since
428 * it might potentially be set to match all interrupts in
429 * the absence of a device node. This isn't a problem so far
430 * yet though...
431 */
432 spin_lock_irqsave(&irq_big_lock, flags);
433 list_for_each_entry(h, &irq_hosts, link)
434 if (h->ops->match == NULL || h->ops->match(h, node)) {
435 found = h;
436 break;
437 }
438 spin_unlock_irqrestore(&irq_big_lock, flags);
439 return found;
440}
441EXPORT_SYMBOL_GPL(irq_find_host);
442
443void irq_set_default_host(struct irq_host *host)
444{
445 pr_debug("irq: Default host set to @0x%p\n", host);
1da177e4 446
0ebfff14
BH
447 irq_default_host = host;
448}
1da177e4 449
0ebfff14
BH
450void irq_set_virq_count(unsigned int count)
451{
452 pr_debug("irq: Trying to set virq count to %d\n", count);
fef1c772 453
0ebfff14
BH
454 BUG_ON(count < NUM_ISA_INTERRUPTS);
455 if (count < NR_IRQS)
456 irq_virq_count = count;
457}
458
459unsigned int irq_create_mapping(struct irq_host *host,
460 irq_hw_number_t hwirq,
461 unsigned int flags)
462{
463 unsigned int virq, hint;
464
465 pr_debug("irq: irq_create_mapping(0x%p, 0x%lx, 0x%x)\n",
466 host, hwirq, flags);
467
468 /* Look for default host if nececssary */
469 if (host == NULL)
470 host = irq_default_host;
471 if (host == NULL) {
472 printk(KERN_WARNING "irq_create_mapping called for"
473 " NULL host, hwirq=%lx\n", hwirq);
474 WARN_ON(1);
475 return NO_IRQ;
1da177e4 476 }
0ebfff14 477 pr_debug("irq: -> using host @%p\n", host);
1da177e4 478
0ebfff14
BH
479 /* Check if mapping already exist, if it does, call
480 * host->ops->map() to update the flags
481 */
482 virq = irq_find_mapping(host, hwirq);
483 if (virq != IRQ_NONE) {
484 pr_debug("irq: -> existing mapping on virq %d\n", virq);
485 host->ops->map(host, virq, hwirq, flags);
486 return virq;
1da177e4
LT
487 }
488
0ebfff14
BH
489 /* Get a virtual interrupt number */
490 if (host->revmap_type == IRQ_HOST_MAP_LEGACY) {
491 /* Handle legacy */
492 virq = (unsigned int)hwirq;
493 if (virq == 0 || virq >= NUM_ISA_INTERRUPTS)
494 return NO_IRQ;
495 return virq;
496 } else {
497 /* Allocate a virtual interrupt number */
498 hint = hwirq % irq_virq_count;
499 virq = irq_alloc_virt(host, 1, hint);
500 if (virq == NO_IRQ) {
501 pr_debug("irq: -> virq allocation failed\n");
502 return NO_IRQ;
503 }
504 }
505 pr_debug("irq: -> obtained virq %d\n", virq);
506
507 /* Clear some flags */
508 get_irq_desc(virq)->status &= ~(IRQ_NOREQUEST | IRQ_LEVEL);
509
510 /* map it */
511 if (host->ops->map(host, virq, hwirq, flags)) {
512 pr_debug("irq: -> mapping failed, freeing\n");
513 irq_free_virt(virq, 1);
514 return NO_IRQ;
515 }
516 smp_wmb();
517 irq_map[virq].hwirq = hwirq;
518 smp_mb();
1da177e4 519 return virq;
0ebfff14
BH
520}
521EXPORT_SYMBOL_GPL(irq_create_mapping);
522
523extern unsigned int irq_create_of_mapping(struct device_node *controller,
524 u32 *intspec, unsigned int intsize)
525{
526 struct irq_host *host;
527 irq_hw_number_t hwirq;
528 unsigned int flags = IRQ_TYPE_NONE;
1da177e4 529
0ebfff14
BH
530 if (controller == NULL)
531 host = irq_default_host;
532 else
533 host = irq_find_host(controller);
534 if (host == NULL)
535 return NO_IRQ;
536
537 /* If host has no translation, then we assume interrupt line */
538 if (host->ops->xlate == NULL)
539 hwirq = intspec[0];
540 else {
541 if (host->ops->xlate(host, controller, intspec, intsize,
542 &hwirq, &flags))
543 return NO_IRQ;
1da177e4 544 }
0ebfff14
BH
545
546 return irq_create_mapping(host, hwirq, flags);
1da177e4 547}
0ebfff14 548EXPORT_SYMBOL_GPL(irq_create_of_mapping);
1da177e4 549
0ebfff14 550unsigned int irq_of_parse_and_map(struct device_node *dev, int index)
1da177e4 551{
0ebfff14 552 struct of_irq oirq;
1da177e4 553
0ebfff14
BH
554 if (of_irq_map_one(dev, index, &oirq))
555 return NO_IRQ;
1da177e4 556
0ebfff14
BH
557 return irq_create_of_mapping(oirq.controller, oirq.specifier,
558 oirq.size);
559}
560EXPORT_SYMBOL_GPL(irq_of_parse_and_map);
1da177e4 561
0ebfff14
BH
562void irq_dispose_mapping(unsigned int virq)
563{
564 struct irq_host *host = irq_map[virq].host;
565 irq_hw_number_t hwirq;
566 unsigned long flags;
1da177e4 567
0ebfff14
BH
568 WARN_ON (host == NULL);
569 if (host == NULL)
570 return;
1da177e4 571
0ebfff14
BH
572 /* Never unmap legacy interrupts */
573 if (host->revmap_type == IRQ_HOST_MAP_LEGACY)
574 return;
1da177e4 575
0ebfff14
BH
576 /* remove chip and handler */
577 set_irq_chip_and_handler(virq, NULL, NULL);
578
579 /* Make sure it's completed */
580 synchronize_irq(virq);
581
582 /* Tell the PIC about it */
583 if (host->ops->unmap)
584 host->ops->unmap(host, virq);
585 smp_mb();
586
587 /* Clear reverse map */
588 hwirq = irq_map[virq].hwirq;
589 switch(host->revmap_type) {
590 case IRQ_HOST_MAP_LINEAR:
591 if (hwirq < host->revmap_data.linear.size)
592 host->revmap_data.linear.revmap[hwirq] = IRQ_NONE;
593 break;
594 case IRQ_HOST_MAP_TREE:
595 /* Check if radix tree allocated yet */
596 if (host->revmap_data.tree.gfp_mask == 0)
597 break;
598 /* XXX radix tree not safe ! remove lock whem it becomes safe
599 * and use some RCU sync to make sure everything is ok before we
600 * can re-use that map entry
601 */
602 spin_lock_irqsave(&irq_big_lock, flags);
603 radix_tree_delete(&host->revmap_data.tree, hwirq);
604 spin_unlock_irqrestore(&irq_big_lock, flags);
605 break;
606 }
1da177e4 607
0ebfff14
BH
608 /* Destroy map */
609 smp_mb();
610 irq_map[virq].hwirq = host->inval_irq;
1da177e4 611
0ebfff14
BH
612 /* Set some flags */
613 get_irq_desc(virq)->status |= IRQ_NOREQUEST;
1da177e4 614
0ebfff14
BH
615 /* Free it */
616 irq_free_virt(virq, 1);
1da177e4 617}
0ebfff14 618EXPORT_SYMBOL_GPL(irq_dispose_mapping);
1da177e4 619
0ebfff14
BH
620unsigned int irq_find_mapping(struct irq_host *host,
621 irq_hw_number_t hwirq)
622{
623 unsigned int i;
624 unsigned int hint = hwirq % irq_virq_count;
625
626 /* Look for default host if nececssary */
627 if (host == NULL)
628 host = irq_default_host;
629 if (host == NULL)
630 return NO_IRQ;
631
632 /* legacy -> bail early */
633 if (host->revmap_type == IRQ_HOST_MAP_LEGACY)
634 return hwirq;
635
636 /* Slow path does a linear search of the map */
637 if (hint < NUM_ISA_INTERRUPTS)
638 hint = NUM_ISA_INTERRUPTS;
639 i = hint;
640 do {
641 if (irq_map[i].host == host &&
642 irq_map[i].hwirq == hwirq)
643 return i;
644 i++;
645 if (i >= irq_virq_count)
646 i = NUM_ISA_INTERRUPTS;
647 } while(i != hint);
648 return NO_IRQ;
649}
650EXPORT_SYMBOL_GPL(irq_find_mapping);
1da177e4 651
0ebfff14
BH
652
653unsigned int irq_radix_revmap(struct irq_host *host,
654 irq_hw_number_t hwirq)
1da177e4 655{
0ebfff14
BH
656 struct radix_tree_root *tree;
657 struct irq_map_entry *ptr;
658 unsigned int virq;
659 unsigned long flags;
1da177e4 660
0ebfff14 661 WARN_ON(host->revmap_type != IRQ_HOST_MAP_TREE);
1da177e4 662
0ebfff14
BH
663 /* Check if the radix tree exist yet. We test the value of
664 * the gfp_mask for that. Sneaky but saves another int in the
665 * structure. If not, we fallback to slow mode
666 */
667 tree = &host->revmap_data.tree;
668 if (tree->gfp_mask == 0)
669 return irq_find_mapping(host, hwirq);
670
671 /* XXX Current radix trees are NOT SMP safe !!! Remove that lock
672 * when that is fixed (when Nick's patch gets in
673 */
674 spin_lock_irqsave(&irq_big_lock, flags);
675
676 /* Now try to resolve */
677 ptr = radix_tree_lookup(tree, hwirq);
678 /* Found it, return */
679 if (ptr) {
680 virq = ptr - irq_map;
681 goto bail;
1da177e4 682 }
0ebfff14
BH
683
684 /* If not there, try to insert it */
685 virq = irq_find_mapping(host, hwirq);
686 if (virq != NO_IRQ)
687 radix_tree_insert(tree, virq, &irq_map[virq]);
688 bail:
689 spin_unlock_irqrestore(&irq_big_lock, flags);
690 return virq;
1da177e4
LT
691}
692
0ebfff14
BH
693unsigned int irq_linear_revmap(struct irq_host *host,
694 irq_hw_number_t hwirq)
c6622f63 695{
0ebfff14 696 unsigned int *revmap;
c6622f63 697
0ebfff14
BH
698 WARN_ON(host->revmap_type != IRQ_HOST_MAP_LINEAR);
699
700 /* Check revmap bounds */
701 if (unlikely(hwirq >= host->revmap_data.linear.size))
702 return irq_find_mapping(host, hwirq);
703
704 /* Check if revmap was allocated */
705 revmap = host->revmap_data.linear.revmap;
706 if (unlikely(revmap == NULL))
707 return irq_find_mapping(host, hwirq);
708
709 /* Fill up revmap with slow path if no mapping found */
710 if (unlikely(revmap[hwirq] == NO_IRQ))
711 revmap[hwirq] = irq_find_mapping(host, hwirq);
712
713 return revmap[hwirq];
c6622f63
PM
714}
715
0ebfff14
BH
716unsigned int irq_alloc_virt(struct irq_host *host,
717 unsigned int count,
718 unsigned int hint)
719{
720 unsigned long flags;
721 unsigned int i, j, found = NO_IRQ;
722 unsigned int limit = irq_virq_count - count;
c6622f63 723
0ebfff14
BH
724 if (count == 0 || count > (irq_virq_count - NUM_ISA_INTERRUPTS))
725 return NO_IRQ;
726
727 spin_lock_irqsave(&irq_big_lock, flags);
728
729 /* Use hint for 1 interrupt if any */
730 if (count == 1 && hint >= NUM_ISA_INTERRUPTS &&
731 hint < irq_virq_count && irq_map[hint].host == NULL) {
732 found = hint;
733 goto hint_found;
734 }
735
736 /* Look for count consecutive numbers in the allocatable
737 * (non-legacy) space
738 */
739 for (i = NUM_ISA_INTERRUPTS; i <= limit; ) {
740 for (j = i; j < (i + count); j++)
741 if (irq_map[j].host != NULL) {
742 i = j + 1;
743 continue;
744 }
745 found = i;
746 break;
747 }
748 if (found == NO_IRQ) {
749 spin_unlock_irqrestore(&irq_big_lock, flags);
750 return NO_IRQ;
751 }
752 hint_found:
753 for (i = found; i < (found + count); i++) {
754 irq_map[i].hwirq = host->inval_irq;
755 smp_wmb();
756 irq_map[i].host = host;
757 }
758 spin_unlock_irqrestore(&irq_big_lock, flags);
759 return found;
760}
761
762void irq_free_virt(unsigned int virq, unsigned int count)
1da177e4
LT
763{
764 unsigned long flags;
0ebfff14 765 unsigned int i;
1da177e4 766
0ebfff14
BH
767 WARN_ON (virq < NUM_ISA_INTERRUPTS);
768 WARN_ON (count == 0 || (virq + count) > irq_virq_count);
1da177e4 769
0ebfff14
BH
770 spin_lock_irqsave(&irq_big_lock, flags);
771 for (i = virq; i < (virq + count); i++) {
772 struct irq_host *host;
1da177e4 773
0ebfff14
BH
774 if (i < NUM_ISA_INTERRUPTS ||
775 (virq + count) > irq_virq_count)
776 continue;
1da177e4 777
0ebfff14
BH
778 host = irq_map[i].host;
779 irq_map[i].hwirq = host->inval_irq;
780 smp_wmb();
781 irq_map[i].host = NULL;
782 }
783 spin_unlock_irqrestore(&irq_big_lock, flags);
1da177e4 784}
0ebfff14
BH
785
786void irq_early_init(void)
787{
788 unsigned int i;
789
790 for (i = 0; i < NR_IRQS; i++)
791 get_irq_desc(i)->status |= IRQ_NOREQUEST;
792}
793
794/* We need to create the radix trees late */
795static int irq_late_init(void)
796{
797 struct irq_host *h;
798 unsigned long flags;
799
800 spin_lock_irqsave(&irq_big_lock, flags);
801 list_for_each_entry(h, &irq_hosts, link) {
802 if (h->revmap_type == IRQ_HOST_MAP_TREE)
803 INIT_RADIX_TREE(&h->revmap_data.tree, GFP_ATOMIC);
804 }
805 spin_unlock_irqrestore(&irq_big_lock, flags);
806
807 return 0;
808}
809arch_initcall(irq_late_init);
810
811#endif /* CONFIG_PPC_MERGE */
1da177e4 812
204face4
JM
813#ifdef CONFIG_PCI_MSI
814int pci_enable_msi(struct pci_dev * pdev)
815{
816 if (ppc_md.enable_msi)
817 return ppc_md.enable_msi(pdev);
818 else
819 return -1;
820}
821
822void pci_disable_msi(struct pci_dev * pdev)
823{
824 if (ppc_md.disable_msi)
825 ppc_md.disable_msi(pdev);
826}
827
828void pci_scan_msi_device(struct pci_dev *dev) {}
829int pci_enable_msix(struct pci_dev* dev, struct msix_entry *entries, int nvec) {return -1;}
830void pci_disable_msix(struct pci_dev *dev) {}
831void msi_remove_pci_irq_vectors(struct pci_dev *dev) {}
832void disable_msi_mode(struct pci_dev *dev, int pos, int type) {}
833void pci_no_msi(void) {}
834
835#endif
836
c6622f63 837#ifdef CONFIG_PPC64
1da177e4
LT
838static int __init setup_noirqdistrib(char *str)
839{
840 distribute_irqs = 0;
841 return 1;
842}
843
844__setup("noirqdistrib", setup_noirqdistrib);
756e7104 845#endif /* CONFIG_PPC64 */