Commit | Line | Data |
---|---|---|
1da177e4 | 1 | /* |
1da177e4 LT |
2 | * Derived from arch/i386/kernel/irq.c |
3 | * Copyright (C) 1992 Linus Torvalds | |
4 | * Adapted from arch/i386 by Gary Thomas | |
5 | * Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org) | |
756e7104 SR |
6 | * Updated and modified by Cort Dougan <cort@fsmlabs.com> |
7 | * Copyright (C) 1996-2001 Cort Dougan | |
1da177e4 LT |
8 | * Adapted for Power Macintosh by Paul Mackerras |
9 | * Copyright (C) 1996 Paul Mackerras (paulus@cs.anu.edu.au) | |
756e7104 | 10 | * |
1da177e4 LT |
11 | * This program is free software; you can redistribute it and/or |
12 | * modify it under the terms of the GNU General Public License | |
13 | * as published by the Free Software Foundation; either version | |
14 | * 2 of the License, or (at your option) any later version. | |
15 | * | |
16 | * This file contains the code used by various IRQ handling routines: | |
17 | * asking for different IRQ's should be done through these routines | |
18 | * instead of just grabbing them. Thus setups with different IRQ numbers | |
19 | * shouldn't result in any weird surprises, and installing new handlers | |
20 | * should be easier. | |
756e7104 SR |
21 | * |
22 | * The MPC8xx has an interrupt mask in the SIU. If a bit is set, the | |
23 | * interrupt is _enabled_. As expected, IRQ0 is bit 0 in the 32-bit | |
24 | * mask register (of which only 16 are defined), hence the weird shifting | |
25 | * and complement of the cached_irq_mask. I want to be able to stuff | |
26 | * this right into the SIU SMASK register. | |
27 | * Many of the prep/chrp functions are conditional compiled on CONFIG_8xx | |
28 | * to reduce code space and undefined function references. | |
1da177e4 LT |
29 | */ |
30 | ||
0ebfff14 BH |
31 | #undef DEBUG |
32 | ||
1da177e4 LT |
33 | #include <linux/module.h> |
34 | #include <linux/threads.h> | |
35 | #include <linux/kernel_stat.h> | |
36 | #include <linux/signal.h> | |
37 | #include <linux/sched.h> | |
756e7104 | 38 | #include <linux/ptrace.h> |
1da177e4 LT |
39 | #include <linux/ioport.h> |
40 | #include <linux/interrupt.h> | |
41 | #include <linux/timex.h> | |
1da177e4 LT |
42 | #include <linux/init.h> |
43 | #include <linux/slab.h> | |
1da177e4 LT |
44 | #include <linux/delay.h> |
45 | #include <linux/irq.h> | |
756e7104 SR |
46 | #include <linux/seq_file.h> |
47 | #include <linux/cpumask.h> | |
1da177e4 LT |
48 | #include <linux/profile.h> |
49 | #include <linux/bitops.h> | |
0ebfff14 BH |
50 | #include <linux/list.h> |
51 | #include <linux/radix-tree.h> | |
52 | #include <linux/mutex.h> | |
53 | #include <linux/bootmem.h> | |
45934c47 | 54 | #include <linux/pci.h> |
60b332e7 | 55 | #include <linux/debugfs.h> |
e3873444 GL |
56 | #include <linux/of.h> |
57 | #include <linux/of_irq.h> | |
1da177e4 LT |
58 | |
59 | #include <asm/uaccess.h> | |
60 | #include <asm/system.h> | |
61 | #include <asm/io.h> | |
62 | #include <asm/pgtable.h> | |
63 | #include <asm/irq.h> | |
64 | #include <asm/cache.h> | |
65 | #include <asm/prom.h> | |
66 | #include <asm/ptrace.h> | |
1da177e4 | 67 | #include <asm/machdep.h> |
0ebfff14 | 68 | #include <asm/udbg.h> |
89c81797 BH |
69 | #include <asm/dbell.h> |
70 | ||
d04c56f7 | 71 | #ifdef CONFIG_PPC64 |
1da177e4 | 72 | #include <asm/paca.h> |
d04c56f7 | 73 | #include <asm/firmware.h> |
0874dd40 | 74 | #include <asm/lv1call.h> |
756e7104 | 75 | #endif |
1bf4af16 AB |
76 | #define CREATE_TRACE_POINTS |
77 | #include <asm/trace.h> | |
1da177e4 | 78 | |
8c007bfd AB |
79 | DEFINE_PER_CPU_SHARED_ALIGNED(irq_cpustat_t, irq_stat); |
80 | EXPORT_PER_CPU_SYMBOL(irq_stat); | |
81 | ||
868accb7 | 82 | int __irq_offset_value; |
756e7104 | 83 | |
756e7104 | 84 | #ifdef CONFIG_PPC32 |
b9e5b4e6 BH |
85 | EXPORT_SYMBOL(__irq_offset_value); |
86 | atomic_t ppc_n_lost_interrupts; | |
756e7104 | 87 | |
756e7104 SR |
88 | #ifdef CONFIG_TAU_INT |
89 | extern int tau_initialized; | |
90 | extern int tau_interrupts(int); | |
91 | #endif | |
b9e5b4e6 | 92 | #endif /* CONFIG_PPC32 */ |
756e7104 | 93 | |
756e7104 | 94 | #ifdef CONFIG_PPC64 |
cd015707 ME |
95 | |
96 | #ifndef CONFIG_SPARSE_IRQ | |
1da177e4 | 97 | EXPORT_SYMBOL(irq_desc); |
cd015707 | 98 | #endif |
1da177e4 LT |
99 | |
100 | int distribute_irqs = 1; | |
d04c56f7 | 101 | |
4e491d14 | 102 | static inline notrace unsigned long get_hard_enabled(void) |
ef2b343e HD |
103 | { |
104 | unsigned long enabled; | |
105 | ||
106 | __asm__ __volatile__("lbz %0,%1(13)" | |
107 | : "=r" (enabled) : "i" (offsetof(struct paca_struct, hard_enabled))); | |
108 | ||
109 | return enabled; | |
110 | } | |
111 | ||
4e491d14 | 112 | static inline notrace void set_soft_enabled(unsigned long enable) |
ef2b343e HD |
113 | { |
114 | __asm__ __volatile__("stb %0,%1(13)" | |
115 | : : "r" (enable), "i" (offsetof(struct paca_struct, soft_enabled))); | |
116 | } | |
117 | ||
4e491d14 | 118 | notrace void raw_local_irq_restore(unsigned long en) |
d04c56f7 | 119 | { |
ef2b343e HD |
120 | /* |
121 | * get_paca()->soft_enabled = en; | |
122 | * Is it ever valid to use local_irq_restore(0) when soft_enabled is 1? | |
123 | * That was allowed before, and in such a case we do need to take care | |
124 | * that gcc will set soft_enabled directly via r13, not choose to use | |
125 | * an intermediate register, lest we're preempted to a different cpu. | |
126 | */ | |
127 | set_soft_enabled(en); | |
d04c56f7 PM |
128 | if (!en) |
129 | return; | |
130 | ||
94491685 | 131 | #ifdef CONFIG_PPC_STD_MMU_64 |
d04c56f7 | 132 | if (firmware_has_feature(FW_FEATURE_ISERIES)) { |
ef2b343e HD |
133 | /* |
134 | * Do we need to disable preemption here? Not really: in the | |
135 | * unlikely event that we're preempted to a different cpu in | |
136 | * between getting r13, loading its lppaca_ptr, and loading | |
137 | * its any_int, we might call iseries_handle_interrupts without | |
138 | * an interrupt pending on the new cpu, but that's no disaster, | |
139 | * is it? And the business of preempting us off the old cpu | |
140 | * would itself involve a local_irq_restore which handles the | |
141 | * interrupt to that cpu. | |
142 | * | |
143 | * But use "local_paca->lppaca_ptr" instead of "get_lppaca()" | |
144 | * to avoid any preemption checking added into get_paca(). | |
145 | */ | |
146 | if (local_paca->lppaca_ptr->int_dword.any_int) | |
d04c56f7 | 147 | iseries_handle_interrupts(); |
d04c56f7 | 148 | } |
94491685 | 149 | #endif /* CONFIG_PPC_STD_MMU_64 */ |
d04c56f7 | 150 | |
ef2b343e HD |
151 | /* |
152 | * if (get_paca()->hard_enabled) return; | |
153 | * But again we need to take care that gcc gets hard_enabled directly | |
154 | * via r13, not choose to use an intermediate register, lest we're | |
155 | * preempted to a different cpu in between the two instructions. | |
156 | */ | |
157 | if (get_hard_enabled()) | |
d04c56f7 | 158 | return; |
ef2b343e | 159 | |
89c81797 | 160 | #if defined(CONFIG_BOOKE) && defined(CONFIG_SMP) |
850f22d5 ME |
161 | /* Check for pending doorbell interrupts and resend to ourself */ |
162 | doorbell_check_self(); | |
89c81797 BH |
163 | #endif |
164 | ||
ef2b343e HD |
165 | /* |
166 | * Need to hard-enable interrupts here. Since currently disabled, | |
167 | * no need to take further asm precautions against preemption; but | |
168 | * use local_paca instead of get_paca() to avoid preemption checking. | |
169 | */ | |
170 | local_paca->hard_enabled = en; | |
e8775d4a BH |
171 | |
172 | #ifndef CONFIG_BOOKE | |
173 | /* On server, re-trigger the decrementer if it went negative since | |
174 | * some processors only trigger on edge transitions of the sign bit. | |
175 | * | |
176 | * BookE has a level sensitive decrementer (latches in TSR) so we | |
177 | * don't need that | |
178 | */ | |
d04c56f7 PM |
179 | if ((int)mfspr(SPRN_DEC) < 0) |
180 | mtspr(SPRN_DEC, 1); | |
e8775d4a | 181 | #endif /* CONFIG_BOOKE */ |
0874dd40 TS |
182 | |
183 | /* | |
184 | * Force the delivery of pending soft-disabled interrupts on PS3. | |
185 | * Any HV call will have this side effect. | |
186 | */ | |
187 | if (firmware_has_feature(FW_FEATURE_PS3_LV1)) { | |
188 | u64 tmp; | |
189 | lv1_get_version_info(&tmp); | |
190 | } | |
191 | ||
e1fa2e13 | 192 | __hard_irq_enable(); |
d04c56f7 | 193 | } |
945feb17 | 194 | EXPORT_SYMBOL(raw_local_irq_restore); |
756e7104 | 195 | #endif /* CONFIG_PPC64 */ |
1da177e4 | 196 | |
c86845ed AB |
197 | static int show_other_interrupts(struct seq_file *p, int prec) |
198 | { | |
199 | int j; | |
200 | ||
201 | #if defined(CONFIG_PPC32) && defined(CONFIG_TAU_INT) | |
202 | if (tau_initialized) { | |
203 | seq_printf(p, "%*s: ", prec, "TAU"); | |
204 | for_each_online_cpu(j) | |
205 | seq_printf(p, "%10u ", tau_interrupts(j)); | |
206 | seq_puts(p, " PowerPC Thermal Assist (cpu temp)\n"); | |
207 | } | |
208 | #endif /* CONFIG_PPC32 && CONFIG_TAU_INT */ | |
209 | ||
89713ed1 AB |
210 | seq_printf(p, "%*s: ", prec, "LOC"); |
211 | for_each_online_cpu(j) | |
212 | seq_printf(p, "%10u ", per_cpu(irq_stat, j).timer_irqs); | |
213 | seq_printf(p, " Local timer interrupts\n"); | |
214 | ||
17081102 AB |
215 | seq_printf(p, "%*s: ", prec, "SPU"); |
216 | for_each_online_cpu(j) | |
217 | seq_printf(p, "%10u ", per_cpu(irq_stat, j).spurious_irqs); | |
218 | seq_printf(p, " Spurious interrupts\n"); | |
219 | ||
89713ed1 AB |
220 | seq_printf(p, "%*s: ", prec, "CNT"); |
221 | for_each_online_cpu(j) | |
222 | seq_printf(p, "%10u ", per_cpu(irq_stat, j).pmu_irqs); | |
223 | seq_printf(p, " Performance monitoring interrupts\n"); | |
224 | ||
225 | seq_printf(p, "%*s: ", prec, "MCE"); | |
226 | for_each_online_cpu(j) | |
227 | seq_printf(p, "%10u ", per_cpu(irq_stat, j).mce_exceptions); | |
228 | seq_printf(p, " Machine check exceptions\n"); | |
229 | ||
c86845ed AB |
230 | return 0; |
231 | } | |
232 | ||
1da177e4 LT |
233 | int show_interrupts(struct seq_file *p, void *v) |
234 | { | |
c86845ed AB |
235 | unsigned long flags, any_count = 0; |
236 | int i = *(loff_t *) v, j, prec; | |
756e7104 | 237 | struct irqaction *action; |
97f7d6bc | 238 | struct irq_desc *desc; |
1da177e4 | 239 | |
c86845ed AB |
240 | if (i > nr_irqs) |
241 | return 0; | |
242 | ||
243 | for (prec = 3, j = 1000; prec < 10 && j <= nr_irqs; ++prec) | |
244 | j *= 10; | |
245 | ||
246 | if (i == nr_irqs) | |
247 | return show_other_interrupts(p, prec); | |
248 | ||
249 | /* print header */ | |
1da177e4 | 250 | if (i == 0) { |
c86845ed | 251 | seq_printf(p, "%*s", prec + 8, ""); |
756e7104 | 252 | for_each_online_cpu(j) |
c86845ed | 253 | seq_printf(p, "CPU%-8d", j); |
1da177e4 | 254 | seq_putc(p, '\n'); |
756e7104 | 255 | } |
750ab112 ME |
256 | |
257 | desc = irq_to_desc(i); | |
258 | if (!desc) | |
259 | return 0; | |
260 | ||
239007b8 | 261 | raw_spin_lock_irqsave(&desc->lock, flags); |
c86845ed AB |
262 | for_each_online_cpu(j) |
263 | any_count |= kstat_irqs_cpu(i, j); | |
750ab112 | 264 | action = desc->action; |
c86845ed AB |
265 | if (!action && !any_count) |
266 | goto out; | |
750ab112 | 267 | |
c86845ed | 268 | seq_printf(p, "%*d: ", prec, i); |
750ab112 ME |
269 | for_each_online_cpu(j) |
270 | seq_printf(p, "%10u ", kstat_irqs_cpu(i, j)); | |
750ab112 ME |
271 | |
272 | if (desc->chip) | |
c86845ed | 273 | seq_printf(p, " %-16s", desc->chip->name); |
750ab112 | 274 | else |
c86845ed AB |
275 | seq_printf(p, " %-16s", "None"); |
276 | seq_printf(p, " %-8s", (desc->status & IRQ_LEVEL) ? "Level" : "Edge"); | |
750ab112 | 277 | |
c86845ed AB |
278 | if (action) { |
279 | seq_printf(p, " %s", action->name); | |
280 | while ((action = action->next) != NULL) | |
281 | seq_printf(p, ", %s", action->name); | |
282 | } | |
750ab112 | 283 | |
750ab112 | 284 | seq_putc(p, '\n'); |
c86845ed | 285 | out: |
239007b8 | 286 | raw_spin_unlock_irqrestore(&desc->lock, flags); |
1da177e4 LT |
287 | return 0; |
288 | } | |
289 | ||
89713ed1 AB |
290 | /* |
291 | * /proc/stat helpers | |
292 | */ | |
293 | u64 arch_irq_stat_cpu(unsigned int cpu) | |
294 | { | |
295 | u64 sum = per_cpu(irq_stat, cpu).timer_irqs; | |
296 | ||
297 | sum += per_cpu(irq_stat, cpu).pmu_irqs; | |
298 | sum += per_cpu(irq_stat, cpu).mce_exceptions; | |
17081102 | 299 | sum += per_cpu(irq_stat, cpu).spurious_irqs; |
89713ed1 AB |
300 | |
301 | return sum; | |
302 | } | |
303 | ||
1da177e4 | 304 | #ifdef CONFIG_HOTPLUG_CPU |
b6decb70 | 305 | void fixup_irqs(const struct cpumask *map) |
1da177e4 | 306 | { |
6cff46f4 | 307 | struct irq_desc *desc; |
1da177e4 LT |
308 | unsigned int irq; |
309 | static int warned; | |
b6decb70 | 310 | cpumask_var_t mask; |
1da177e4 | 311 | |
b6decb70 | 312 | alloc_cpumask_var(&mask, GFP_KERNEL); |
1da177e4 | 313 | |
b6decb70 | 314 | for_each_irq(irq) { |
6cff46f4 | 315 | desc = irq_to_desc(irq); |
3cd85192 JB |
316 | if (!desc) |
317 | continue; | |
318 | ||
319 | if (desc->status & IRQ_PER_CPU) | |
1da177e4 LT |
320 | continue; |
321 | ||
b6decb70 AB |
322 | cpumask_and(mask, desc->affinity, map); |
323 | if (cpumask_any(mask) >= nr_cpu_ids) { | |
1da177e4 | 324 | printk("Breaking affinity for irq %i\n", irq); |
b6decb70 | 325 | cpumask_copy(mask, map); |
1da177e4 | 326 | } |
6cff46f4 | 327 | if (desc->chip->set_affinity) |
b6decb70 | 328 | desc->chip->set_affinity(irq, mask); |
6cff46f4 | 329 | else if (desc->action && !(warned++)) |
1da177e4 LT |
330 | printk("Cannot set affinity for irq %i\n", irq); |
331 | } | |
332 | ||
b6decb70 AB |
333 | free_cpumask_var(mask); |
334 | ||
1da177e4 LT |
335 | local_irq_enable(); |
336 | mdelay(1); | |
337 | local_irq_disable(); | |
338 | } | |
339 | #endif | |
340 | ||
f2694ba5 ME |
341 | static inline void handle_one_irq(unsigned int irq) |
342 | { | |
343 | struct thread_info *curtp, *irqtp; | |
344 | unsigned long saved_sp_limit; | |
345 | struct irq_desc *desc; | |
f2694ba5 ME |
346 | |
347 | /* Switch to the irq stack to handle this */ | |
348 | curtp = current_thread_info(); | |
349 | irqtp = hardirq_ctx[smp_processor_id()]; | |
350 | ||
351 | if (curtp == irqtp) { | |
352 | /* We're already on the irq stack, just handle it */ | |
353 | generic_handle_irq(irq); | |
354 | return; | |
355 | } | |
356 | ||
6cff46f4 | 357 | desc = irq_to_desc(irq); |
f2694ba5 ME |
358 | saved_sp_limit = current->thread.ksp_limit; |
359 | ||
f2694ba5 ME |
360 | irqtp->task = curtp->task; |
361 | irqtp->flags = 0; | |
362 | ||
363 | /* Copy the softirq bits in preempt_count so that the | |
364 | * softirq checks work in the hardirq context. */ | |
365 | irqtp->preempt_count = (irqtp->preempt_count & ~SOFTIRQ_MASK) | | |
366 | (curtp->preempt_count & SOFTIRQ_MASK); | |
367 | ||
368 | current->thread.ksp_limit = (unsigned long)irqtp + | |
369 | _ALIGN_UP(sizeof(struct thread_info), 16); | |
370 | ||
835363e6 | 371 | call_handle_irq(irq, desc, irqtp, desc->handle_irq); |
f2694ba5 ME |
372 | current->thread.ksp_limit = saved_sp_limit; |
373 | irqtp->task = NULL; | |
374 | ||
375 | /* Set any flag that may have been set on the | |
376 | * alternate stack | |
377 | */ | |
378 | if (irqtp->flags) | |
379 | set_bits(irqtp->flags, &curtp->flags); | |
380 | } | |
f2694ba5 | 381 | |
d7cb10d6 ME |
382 | static inline void check_stack_overflow(void) |
383 | { | |
384 | #ifdef CONFIG_DEBUG_STACKOVERFLOW | |
385 | long sp; | |
386 | ||
387 | sp = __get_SP() & (THREAD_SIZE-1); | |
388 | ||
389 | /* check for stack overflow: is there less than 2KB free? */ | |
390 | if (unlikely(sp < (sizeof(struct thread_info) + 2048))) { | |
391 | printk("do_IRQ: stack overflow: %ld\n", | |
392 | sp - sizeof(struct thread_info)); | |
393 | dump_stack(); | |
394 | } | |
395 | #endif | |
396 | } | |
397 | ||
1da177e4 LT |
398 | void do_IRQ(struct pt_regs *regs) |
399 | { | |
7d12e780 | 400 | struct pt_regs *old_regs = set_irq_regs(regs); |
0ebfff14 | 401 | unsigned int irq; |
1da177e4 | 402 | |
1bf4af16 AB |
403 | trace_irq_entry(regs); |
404 | ||
4b218e9b | 405 | irq_enter(); |
1da177e4 | 406 | |
d7cb10d6 | 407 | check_stack_overflow(); |
1da177e4 | 408 | |
35a84c2f | 409 | irq = ppc_md.get_irq(); |
1da177e4 | 410 | |
f2694ba5 ME |
411 | if (irq != NO_IRQ && irq != NO_IRQ_IGNORE) |
412 | handle_one_irq(irq); | |
413 | else if (irq != NO_IRQ_IGNORE) | |
17081102 | 414 | __get_cpu_var(irq_stat).spurious_irqs++; |
e199500c | 415 | |
4b218e9b | 416 | irq_exit(); |
7d12e780 | 417 | set_irq_regs(old_regs); |
756e7104 | 418 | |
e199500c | 419 | #ifdef CONFIG_PPC_ISERIES |
b06a3183 SR |
420 | if (firmware_has_feature(FW_FEATURE_ISERIES) && |
421 | get_lppaca()->int_dword.fields.decr_int) { | |
3356bb9f DG |
422 | get_lppaca()->int_dword.fields.decr_int = 0; |
423 | /* Signal a fake decrementer interrupt */ | |
424 | timer_interrupt(regs); | |
e199500c SR |
425 | } |
426 | #endif | |
1bf4af16 AB |
427 | |
428 | trace_irq_exit(regs); | |
e199500c | 429 | } |
1da177e4 LT |
430 | |
431 | void __init init_IRQ(void) | |
432 | { | |
70584578 SR |
433 | if (ppc_md.init_IRQ) |
434 | ppc_md.init_IRQ(); | |
bcf0b088 KG |
435 | |
436 | exc_lvl_ctx_init(); | |
437 | ||
1da177e4 LT |
438 | irq_ctx_init(); |
439 | } | |
440 | ||
bcf0b088 KG |
441 | #if defined(CONFIG_BOOKE) || defined(CONFIG_40x) |
442 | struct thread_info *critirq_ctx[NR_CPUS] __read_mostly; | |
443 | struct thread_info *dbgirq_ctx[NR_CPUS] __read_mostly; | |
444 | struct thread_info *mcheckirq_ctx[NR_CPUS] __read_mostly; | |
445 | ||
446 | void exc_lvl_ctx_init(void) | |
447 | { | |
448 | struct thread_info *tp; | |
449 | int i; | |
450 | ||
451 | for_each_possible_cpu(i) { | |
452 | memset((void *)critirq_ctx[i], 0, THREAD_SIZE); | |
453 | tp = critirq_ctx[i]; | |
454 | tp->cpu = i; | |
455 | tp->preempt_count = 0; | |
456 | ||
457 | #ifdef CONFIG_BOOKE | |
458 | memset((void *)dbgirq_ctx[i], 0, THREAD_SIZE); | |
459 | tp = dbgirq_ctx[i]; | |
460 | tp->cpu = i; | |
461 | tp->preempt_count = 0; | |
462 | ||
463 | memset((void *)mcheckirq_ctx[i], 0, THREAD_SIZE); | |
464 | tp = mcheckirq_ctx[i]; | |
465 | tp->cpu = i; | |
466 | tp->preempt_count = HARDIRQ_OFFSET; | |
467 | #endif | |
468 | } | |
469 | } | |
470 | #endif | |
1da177e4 | 471 | |
22722051 AM |
472 | struct thread_info *softirq_ctx[NR_CPUS] __read_mostly; |
473 | struct thread_info *hardirq_ctx[NR_CPUS] __read_mostly; | |
1da177e4 LT |
474 | |
475 | void irq_ctx_init(void) | |
476 | { | |
477 | struct thread_info *tp; | |
478 | int i; | |
479 | ||
0e551954 | 480 | for_each_possible_cpu(i) { |
1da177e4 LT |
481 | memset((void *)softirq_ctx[i], 0, THREAD_SIZE); |
482 | tp = softirq_ctx[i]; | |
483 | tp->cpu = i; | |
e6768a4f | 484 | tp->preempt_count = 0; |
1da177e4 LT |
485 | |
486 | memset((void *)hardirq_ctx[i], 0, THREAD_SIZE); | |
487 | tp = hardirq_ctx[i]; | |
488 | tp->cpu = i; | |
489 | tp->preempt_count = HARDIRQ_OFFSET; | |
490 | } | |
491 | } | |
492 | ||
c6622f63 PM |
493 | static inline void do_softirq_onstack(void) |
494 | { | |
495 | struct thread_info *curtp, *irqtp; | |
85218827 | 496 | unsigned long saved_sp_limit = current->thread.ksp_limit; |
c6622f63 PM |
497 | |
498 | curtp = current_thread_info(); | |
499 | irqtp = softirq_ctx[smp_processor_id()]; | |
500 | irqtp->task = curtp->task; | |
85218827 KG |
501 | current->thread.ksp_limit = (unsigned long)irqtp + |
502 | _ALIGN_UP(sizeof(struct thread_info), 16); | |
c6622f63 | 503 | call_do_softirq(irqtp); |
85218827 | 504 | current->thread.ksp_limit = saved_sp_limit; |
c6622f63 PM |
505 | irqtp->task = NULL; |
506 | } | |
1da177e4 | 507 | |
1da177e4 LT |
508 | void do_softirq(void) |
509 | { | |
510 | unsigned long flags; | |
1da177e4 LT |
511 | |
512 | if (in_interrupt()) | |
1da177e4 LT |
513 | return; |
514 | ||
1da177e4 | 515 | local_irq_save(flags); |
1da177e4 | 516 | |
912b2539 | 517 | if (local_softirq_pending()) |
c6622f63 | 518 | do_softirq_onstack(); |
1da177e4 LT |
519 | |
520 | local_irq_restore(flags); | |
1da177e4 | 521 | } |
1da177e4 | 522 | |
1da177e4 | 523 | |
1da177e4 | 524 | /* |
0ebfff14 | 525 | * IRQ controller and virtual interrupts |
1da177e4 LT |
526 | */ |
527 | ||
0ebfff14 | 528 | static LIST_HEAD(irq_hosts); |
f95e085b | 529 | static DEFINE_RAW_SPINLOCK(irq_big_lock); |
967e012e | 530 | static unsigned int revmap_trees_allocated; |
150c6c8f | 531 | static DEFINE_MUTEX(revmap_trees_mutex); |
0ebfff14 BH |
532 | struct irq_map_entry irq_map[NR_IRQS]; |
533 | static unsigned int irq_virq_count = NR_IRQS; | |
534 | static struct irq_host *irq_default_host; | |
1da177e4 | 535 | |
35923f12 OJ |
536 | irq_hw_number_t virq_to_hw(unsigned int virq) |
537 | { | |
538 | return irq_map[virq].hwirq; | |
539 | } | |
540 | EXPORT_SYMBOL_GPL(virq_to_hw); | |
541 | ||
68158006 ME |
542 | static int default_irq_host_match(struct irq_host *h, struct device_node *np) |
543 | { | |
544 | return h->of_node != NULL && h->of_node == np; | |
545 | } | |
546 | ||
5669c3cf | 547 | struct irq_host *irq_alloc_host(struct device_node *of_node, |
52964f87 ME |
548 | unsigned int revmap_type, |
549 | unsigned int revmap_arg, | |
550 | struct irq_host_ops *ops, | |
551 | irq_hw_number_t inval_irq) | |
1da177e4 | 552 | { |
0ebfff14 BH |
553 | struct irq_host *host; |
554 | unsigned int size = sizeof(struct irq_host); | |
555 | unsigned int i; | |
556 | unsigned int *rmap; | |
557 | unsigned long flags; | |
558 | ||
559 | /* Allocate structure and revmap table if using linear mapping */ | |
560 | if (revmap_type == IRQ_HOST_MAP_LINEAR) | |
561 | size += revmap_arg * sizeof(unsigned int); | |
5669c3cf | 562 | host = zalloc_maybe_bootmem(size, GFP_KERNEL); |
0ebfff14 BH |
563 | if (host == NULL) |
564 | return NULL; | |
7d01c880 | 565 | |
0ebfff14 BH |
566 | /* Fill structure */ |
567 | host->revmap_type = revmap_type; | |
568 | host->inval_irq = inval_irq; | |
569 | host->ops = ops; | |
19fc65b5 | 570 | host->of_node = of_node_get(of_node); |
7d01c880 | 571 | |
68158006 ME |
572 | if (host->ops->match == NULL) |
573 | host->ops->match = default_irq_host_match; | |
7d01c880 | 574 | |
f95e085b | 575 | raw_spin_lock_irqsave(&irq_big_lock, flags); |
0ebfff14 BH |
576 | |
577 | /* If it's a legacy controller, check for duplicates and | |
578 | * mark it as allocated (we use irq 0 host pointer for that | |
579 | */ | |
580 | if (revmap_type == IRQ_HOST_MAP_LEGACY) { | |
581 | if (irq_map[0].host != NULL) { | |
f95e085b | 582 | raw_spin_unlock_irqrestore(&irq_big_lock, flags); |
0ebfff14 BH |
583 | /* If we are early boot, we can't free the structure, |
584 | * too bad... | |
585 | * this will be fixed once slab is made available early | |
586 | * instead of the current cruft | |
587 | */ | |
588 | if (mem_init_done) | |
589 | kfree(host); | |
590 | return NULL; | |
591 | } | |
592 | irq_map[0].host = host; | |
593 | } | |
594 | ||
595 | list_add(&host->link, &irq_hosts); | |
f95e085b | 596 | raw_spin_unlock_irqrestore(&irq_big_lock, flags); |
0ebfff14 BH |
597 | |
598 | /* Additional setups per revmap type */ | |
599 | switch(revmap_type) { | |
600 | case IRQ_HOST_MAP_LEGACY: | |
601 | /* 0 is always the invalid number for legacy */ | |
602 | host->inval_irq = 0; | |
603 | /* setup us as the host for all legacy interrupts */ | |
604 | for (i = 1; i < NUM_ISA_INTERRUPTS; i++) { | |
7866291d | 605 | irq_map[i].hwirq = i; |
0ebfff14 BH |
606 | smp_wmb(); |
607 | irq_map[i].host = host; | |
608 | smp_wmb(); | |
609 | ||
6e99e458 | 610 | /* Clear norequest flags */ |
6cff46f4 | 611 | irq_to_desc(i)->status &= ~IRQ_NOREQUEST; |
0ebfff14 BH |
612 | |
613 | /* Legacy flags are left to default at this point, | |
614 | * one can then use irq_create_mapping() to | |
c03983ac | 615 | * explicitly change them |
0ebfff14 | 616 | */ |
6e99e458 | 617 | ops->map(host, i, i); |
0ebfff14 BH |
618 | } |
619 | break; | |
620 | case IRQ_HOST_MAP_LINEAR: | |
621 | rmap = (unsigned int *)(host + 1); | |
622 | for (i = 0; i < revmap_arg; i++) | |
f5921697 | 623 | rmap[i] = NO_IRQ; |
0ebfff14 BH |
624 | host->revmap_data.linear.size = revmap_arg; |
625 | smp_wmb(); | |
626 | host->revmap_data.linear.revmap = rmap; | |
627 | break; | |
628 | default: | |
629 | break; | |
630 | } | |
631 | ||
632 | pr_debug("irq: Allocated host of type %d @0x%p\n", revmap_type, host); | |
633 | ||
634 | return host; | |
1da177e4 LT |
635 | } |
636 | ||
0ebfff14 | 637 | struct irq_host *irq_find_host(struct device_node *node) |
1da177e4 | 638 | { |
0ebfff14 BH |
639 | struct irq_host *h, *found = NULL; |
640 | unsigned long flags; | |
641 | ||
642 | /* We might want to match the legacy controller last since | |
643 | * it might potentially be set to match all interrupts in | |
644 | * the absence of a device node. This isn't a problem so far | |
645 | * yet though... | |
646 | */ | |
f95e085b | 647 | raw_spin_lock_irqsave(&irq_big_lock, flags); |
0ebfff14 | 648 | list_for_each_entry(h, &irq_hosts, link) |
68158006 | 649 | if (h->ops->match(h, node)) { |
0ebfff14 BH |
650 | found = h; |
651 | break; | |
652 | } | |
f95e085b | 653 | raw_spin_unlock_irqrestore(&irq_big_lock, flags); |
0ebfff14 BH |
654 | return found; |
655 | } | |
656 | EXPORT_SYMBOL_GPL(irq_find_host); | |
657 | ||
658 | void irq_set_default_host(struct irq_host *host) | |
659 | { | |
660 | pr_debug("irq: Default host set to @0x%p\n", host); | |
1da177e4 | 661 | |
0ebfff14 BH |
662 | irq_default_host = host; |
663 | } | |
1da177e4 | 664 | |
0ebfff14 BH |
665 | void irq_set_virq_count(unsigned int count) |
666 | { | |
667 | pr_debug("irq: Trying to set virq count to %d\n", count); | |
fef1c772 | 668 | |
0ebfff14 BH |
669 | BUG_ON(count < NUM_ISA_INTERRUPTS); |
670 | if (count < NR_IRQS) | |
671 | irq_virq_count = count; | |
672 | } | |
673 | ||
6fde40f3 ME |
674 | static int irq_setup_virq(struct irq_host *host, unsigned int virq, |
675 | irq_hw_number_t hwirq) | |
676 | { | |
cd015707 ME |
677 | struct irq_desc *desc; |
678 | ||
679 | desc = irq_to_desc_alloc_node(virq, 0); | |
680 | if (!desc) { | |
681 | pr_debug("irq: -> allocating desc failed\n"); | |
682 | goto error; | |
683 | } | |
684 | ||
6fde40f3 | 685 | /* Clear IRQ_NOREQUEST flag */ |
cd015707 | 686 | desc->status &= ~IRQ_NOREQUEST; |
6fde40f3 ME |
687 | |
688 | /* map it */ | |
689 | smp_wmb(); | |
690 | irq_map[virq].hwirq = hwirq; | |
691 | smp_mb(); | |
692 | ||
693 | if (host->ops->map(host, virq, hwirq)) { | |
694 | pr_debug("irq: -> mapping failed, freeing\n"); | |
cd015707 | 695 | goto error; |
6fde40f3 ME |
696 | } |
697 | ||
698 | return 0; | |
cd015707 ME |
699 | |
700 | error: | |
701 | irq_free_virt(virq, 1); | |
702 | return -1; | |
6fde40f3 | 703 | } |
8ec8f2e8 | 704 | |
ee51de56 ME |
705 | unsigned int irq_create_direct_mapping(struct irq_host *host) |
706 | { | |
707 | unsigned int virq; | |
708 | ||
709 | if (host == NULL) | |
710 | host = irq_default_host; | |
711 | ||
712 | BUG_ON(host == NULL); | |
713 | WARN_ON(host->revmap_type != IRQ_HOST_MAP_NOMAP); | |
714 | ||
715 | virq = irq_alloc_virt(host, 1, 0); | |
716 | if (virq == NO_IRQ) { | |
717 | pr_debug("irq: create_direct virq allocation failed\n"); | |
718 | return NO_IRQ; | |
719 | } | |
720 | ||
721 | pr_debug("irq: create_direct obtained virq %d\n", virq); | |
722 | ||
723 | if (irq_setup_virq(host, virq, virq)) | |
724 | return NO_IRQ; | |
725 | ||
726 | return virq; | |
727 | } | |
728 | ||
0ebfff14 | 729 | unsigned int irq_create_mapping(struct irq_host *host, |
6e99e458 | 730 | irq_hw_number_t hwirq) |
0ebfff14 BH |
731 | { |
732 | unsigned int virq, hint; | |
733 | ||
6e99e458 | 734 | pr_debug("irq: irq_create_mapping(0x%p, 0x%lx)\n", host, hwirq); |
0ebfff14 BH |
735 | |
736 | /* Look for default host if nececssary */ | |
737 | if (host == NULL) | |
738 | host = irq_default_host; | |
739 | if (host == NULL) { | |
740 | printk(KERN_WARNING "irq_create_mapping called for" | |
741 | " NULL host, hwirq=%lx\n", hwirq); | |
742 | WARN_ON(1); | |
743 | return NO_IRQ; | |
1da177e4 | 744 | } |
0ebfff14 | 745 | pr_debug("irq: -> using host @%p\n", host); |
1da177e4 | 746 | |
0ebfff14 BH |
747 | /* Check if mapping already exist, if it does, call |
748 | * host->ops->map() to update the flags | |
749 | */ | |
750 | virq = irq_find_mapping(host, hwirq); | |
f5921697 | 751 | if (virq != NO_IRQ) { |
acc900ef IK |
752 | if (host->ops->remap) |
753 | host->ops->remap(host, virq, hwirq); | |
0ebfff14 | 754 | pr_debug("irq: -> existing mapping on virq %d\n", virq); |
0ebfff14 | 755 | return virq; |
1da177e4 LT |
756 | } |
757 | ||
0ebfff14 BH |
758 | /* Get a virtual interrupt number */ |
759 | if (host->revmap_type == IRQ_HOST_MAP_LEGACY) { | |
760 | /* Handle legacy */ | |
761 | virq = (unsigned int)hwirq; | |
762 | if (virq == 0 || virq >= NUM_ISA_INTERRUPTS) | |
763 | return NO_IRQ; | |
764 | return virq; | |
765 | } else { | |
766 | /* Allocate a virtual interrupt number */ | |
767 | hint = hwirq % irq_virq_count; | |
768 | virq = irq_alloc_virt(host, 1, hint); | |
769 | if (virq == NO_IRQ) { | |
770 | pr_debug("irq: -> virq allocation failed\n"); | |
771 | return NO_IRQ; | |
772 | } | |
773 | } | |
0ebfff14 | 774 | |
6fde40f3 | 775 | if (irq_setup_virq(host, virq, hwirq)) |
0ebfff14 | 776 | return NO_IRQ; |
6fde40f3 | 777 | |
c7d07fdd ME |
778 | printk(KERN_DEBUG "irq: irq %lu on host %s mapped to virtual irq %u\n", |
779 | hwirq, host->of_node ? host->of_node->full_name : "null", virq); | |
780 | ||
1da177e4 | 781 | return virq; |
0ebfff14 BH |
782 | } |
783 | EXPORT_SYMBOL_GPL(irq_create_mapping); | |
784 | ||
f3d2ab41 | 785 | unsigned int irq_create_of_mapping(struct device_node *controller, |
40d50cf7 | 786 | const u32 *intspec, unsigned int intsize) |
0ebfff14 BH |
787 | { |
788 | struct irq_host *host; | |
789 | irq_hw_number_t hwirq; | |
6e99e458 BH |
790 | unsigned int type = IRQ_TYPE_NONE; |
791 | unsigned int virq; | |
1da177e4 | 792 | |
0ebfff14 BH |
793 | if (controller == NULL) |
794 | host = irq_default_host; | |
795 | else | |
796 | host = irq_find_host(controller); | |
6e99e458 BH |
797 | if (host == NULL) { |
798 | printk(KERN_WARNING "irq: no irq host found for %s !\n", | |
799 | controller->full_name); | |
0ebfff14 | 800 | return NO_IRQ; |
6e99e458 | 801 | } |
0ebfff14 BH |
802 | |
803 | /* If host has no translation, then we assume interrupt line */ | |
804 | if (host->ops->xlate == NULL) | |
805 | hwirq = intspec[0]; | |
806 | else { | |
807 | if (host->ops->xlate(host, controller, intspec, intsize, | |
6e99e458 | 808 | &hwirq, &type)) |
0ebfff14 | 809 | return NO_IRQ; |
1da177e4 | 810 | } |
0ebfff14 | 811 | |
6e99e458 BH |
812 | /* Create mapping */ |
813 | virq = irq_create_mapping(host, hwirq); | |
814 | if (virq == NO_IRQ) | |
815 | return virq; | |
816 | ||
817 | /* Set type if specified and different than the current one */ | |
818 | if (type != IRQ_TYPE_NONE && | |
6cff46f4 | 819 | type != (irq_to_desc(virq)->status & IRQF_TRIGGER_MASK)) |
6e99e458 BH |
820 | set_irq_type(virq, type); |
821 | return virq; | |
1da177e4 | 822 | } |
0ebfff14 | 823 | EXPORT_SYMBOL_GPL(irq_create_of_mapping); |
1da177e4 | 824 | |
0ebfff14 BH |
825 | void irq_dispose_mapping(unsigned int virq) |
826 | { | |
5414c6be | 827 | struct irq_host *host; |
0ebfff14 | 828 | irq_hw_number_t hwirq; |
1da177e4 | 829 | |
5414c6be ME |
830 | if (virq == NO_IRQ) |
831 | return; | |
832 | ||
833 | host = irq_map[virq].host; | |
0ebfff14 BH |
834 | WARN_ON (host == NULL); |
835 | if (host == NULL) | |
836 | return; | |
1da177e4 | 837 | |
0ebfff14 BH |
838 | /* Never unmap legacy interrupts */ |
839 | if (host->revmap_type == IRQ_HOST_MAP_LEGACY) | |
840 | return; | |
1da177e4 | 841 | |
0ebfff14 BH |
842 | /* remove chip and handler */ |
843 | set_irq_chip_and_handler(virq, NULL, NULL); | |
844 | ||
845 | /* Make sure it's completed */ | |
846 | synchronize_irq(virq); | |
847 | ||
848 | /* Tell the PIC about it */ | |
849 | if (host->ops->unmap) | |
850 | host->ops->unmap(host, virq); | |
851 | smp_mb(); | |
852 | ||
853 | /* Clear reverse map */ | |
854 | hwirq = irq_map[virq].hwirq; | |
855 | switch(host->revmap_type) { | |
856 | case IRQ_HOST_MAP_LINEAR: | |
857 | if (hwirq < host->revmap_data.linear.size) | |
f5921697 | 858 | host->revmap_data.linear.revmap[hwirq] = NO_IRQ; |
0ebfff14 BH |
859 | break; |
860 | case IRQ_HOST_MAP_TREE: | |
967e012e SD |
861 | /* |
862 | * Check if radix tree allocated yet, if not then nothing to | |
863 | * remove. | |
864 | */ | |
865 | smp_rmb(); | |
866 | if (revmap_trees_allocated < 1) | |
0ebfff14 | 867 | break; |
150c6c8f | 868 | mutex_lock(&revmap_trees_mutex); |
0ebfff14 | 869 | radix_tree_delete(&host->revmap_data.tree, hwirq); |
150c6c8f | 870 | mutex_unlock(&revmap_trees_mutex); |
0ebfff14 BH |
871 | break; |
872 | } | |
1da177e4 | 873 | |
0ebfff14 BH |
874 | /* Destroy map */ |
875 | smp_mb(); | |
876 | irq_map[virq].hwirq = host->inval_irq; | |
1da177e4 | 877 | |
0ebfff14 | 878 | /* Set some flags */ |
6cff46f4 | 879 | irq_to_desc(virq)->status |= IRQ_NOREQUEST; |
1da177e4 | 880 | |
0ebfff14 BH |
881 | /* Free it */ |
882 | irq_free_virt(virq, 1); | |
1da177e4 | 883 | } |
0ebfff14 | 884 | EXPORT_SYMBOL_GPL(irq_dispose_mapping); |
1da177e4 | 885 | |
0ebfff14 BH |
886 | unsigned int irq_find_mapping(struct irq_host *host, |
887 | irq_hw_number_t hwirq) | |
888 | { | |
889 | unsigned int i; | |
890 | unsigned int hint = hwirq % irq_virq_count; | |
891 | ||
892 | /* Look for default host if nececssary */ | |
893 | if (host == NULL) | |
894 | host = irq_default_host; | |
895 | if (host == NULL) | |
896 | return NO_IRQ; | |
897 | ||
898 | /* legacy -> bail early */ | |
899 | if (host->revmap_type == IRQ_HOST_MAP_LEGACY) | |
900 | return hwirq; | |
901 | ||
902 | /* Slow path does a linear search of the map */ | |
903 | if (hint < NUM_ISA_INTERRUPTS) | |
904 | hint = NUM_ISA_INTERRUPTS; | |
905 | i = hint; | |
906 | do { | |
907 | if (irq_map[i].host == host && | |
908 | irq_map[i].hwirq == hwirq) | |
909 | return i; | |
910 | i++; | |
911 | if (i >= irq_virq_count) | |
912 | i = NUM_ISA_INTERRUPTS; | |
913 | } while(i != hint); | |
914 | return NO_IRQ; | |
915 | } | |
916 | EXPORT_SYMBOL_GPL(irq_find_mapping); | |
1da177e4 | 917 | |
0ebfff14 | 918 | |
967e012e SD |
919 | unsigned int irq_radix_revmap_lookup(struct irq_host *host, |
920 | irq_hw_number_t hwirq) | |
1da177e4 | 921 | { |
0ebfff14 BH |
922 | struct irq_map_entry *ptr; |
923 | unsigned int virq; | |
1da177e4 | 924 | |
0ebfff14 | 925 | WARN_ON(host->revmap_type != IRQ_HOST_MAP_TREE); |
1da177e4 | 926 | |
967e012e SD |
927 | /* |
928 | * Check if the radix tree exists and has bee initialized. | |
929 | * If not, we fallback to slow mode | |
0ebfff14 | 930 | */ |
967e012e | 931 | if (revmap_trees_allocated < 2) |
0ebfff14 BH |
932 | return irq_find_mapping(host, hwirq); |
933 | ||
0ebfff14 | 934 | /* Now try to resolve */ |
150c6c8f SD |
935 | /* |
936 | * No rcu_read_lock(ing) needed, the ptr returned can't go under us | |
937 | * as it's referencing an entry in the static irq_map table. | |
938 | */ | |
967e012e | 939 | ptr = radix_tree_lookup(&host->revmap_data.tree, hwirq); |
8ec8f2e8 | 940 | |
967e012e SD |
941 | /* |
942 | * If found in radix tree, then fine. | |
943 | * Else fallback to linear lookup - this should not happen in practice | |
944 | * as it means that we failed to insert the node in the radix tree. | |
945 | */ | |
946 | if (ptr) | |
0ebfff14 | 947 | virq = ptr - irq_map; |
967e012e SD |
948 | else |
949 | virq = irq_find_mapping(host, hwirq); | |
950 | ||
951 | return virq; | |
952 | } | |
953 | ||
954 | void irq_radix_revmap_insert(struct irq_host *host, unsigned int virq, | |
955 | irq_hw_number_t hwirq) | |
956 | { | |
967e012e SD |
957 | |
958 | WARN_ON(host->revmap_type != IRQ_HOST_MAP_TREE); | |
959 | ||
960 | /* | |
961 | * Check if the radix tree exists yet. | |
962 | * If not, then the irq will be inserted into the tree when it gets | |
963 | * initialized. | |
964 | */ | |
965 | smp_rmb(); | |
966 | if (revmap_trees_allocated < 1) | |
967 | return; | |
0ebfff14 | 968 | |
8ec8f2e8 | 969 | if (virq != NO_IRQ) { |
150c6c8f | 970 | mutex_lock(&revmap_trees_mutex); |
967e012e SD |
971 | radix_tree_insert(&host->revmap_data.tree, hwirq, |
972 | &irq_map[virq]); | |
150c6c8f | 973 | mutex_unlock(&revmap_trees_mutex); |
8ec8f2e8 | 974 | } |
1da177e4 LT |
975 | } |
976 | ||
0ebfff14 BH |
977 | unsigned int irq_linear_revmap(struct irq_host *host, |
978 | irq_hw_number_t hwirq) | |
c6622f63 | 979 | { |
0ebfff14 | 980 | unsigned int *revmap; |
c6622f63 | 981 | |
0ebfff14 BH |
982 | WARN_ON(host->revmap_type != IRQ_HOST_MAP_LINEAR); |
983 | ||
984 | /* Check revmap bounds */ | |
985 | if (unlikely(hwirq >= host->revmap_data.linear.size)) | |
986 | return irq_find_mapping(host, hwirq); | |
987 | ||
988 | /* Check if revmap was allocated */ | |
989 | revmap = host->revmap_data.linear.revmap; | |
990 | if (unlikely(revmap == NULL)) | |
991 | return irq_find_mapping(host, hwirq); | |
992 | ||
993 | /* Fill up revmap with slow path if no mapping found */ | |
994 | if (unlikely(revmap[hwirq] == NO_IRQ)) | |
995 | revmap[hwirq] = irq_find_mapping(host, hwirq); | |
996 | ||
997 | return revmap[hwirq]; | |
c6622f63 PM |
998 | } |
999 | ||
0ebfff14 BH |
1000 | unsigned int irq_alloc_virt(struct irq_host *host, |
1001 | unsigned int count, | |
1002 | unsigned int hint) | |
1003 | { | |
1004 | unsigned long flags; | |
1005 | unsigned int i, j, found = NO_IRQ; | |
c6622f63 | 1006 | |
0ebfff14 BH |
1007 | if (count == 0 || count > (irq_virq_count - NUM_ISA_INTERRUPTS)) |
1008 | return NO_IRQ; | |
1009 | ||
f95e085b | 1010 | raw_spin_lock_irqsave(&irq_big_lock, flags); |
0ebfff14 BH |
1011 | |
1012 | /* Use hint for 1 interrupt if any */ | |
1013 | if (count == 1 && hint >= NUM_ISA_INTERRUPTS && | |
1014 | hint < irq_virq_count && irq_map[hint].host == NULL) { | |
1015 | found = hint; | |
1016 | goto hint_found; | |
1017 | } | |
1018 | ||
1019 | /* Look for count consecutive numbers in the allocatable | |
1020 | * (non-legacy) space | |
1021 | */ | |
e1251465 ME |
1022 | for (i = NUM_ISA_INTERRUPTS, j = 0; i < irq_virq_count; i++) { |
1023 | if (irq_map[i].host != NULL) | |
1024 | j = 0; | |
1025 | else | |
1026 | j++; | |
1027 | ||
1028 | if (j == count) { | |
1029 | found = i - count + 1; | |
1030 | break; | |
1031 | } | |
0ebfff14 BH |
1032 | } |
1033 | if (found == NO_IRQ) { | |
f95e085b | 1034 | raw_spin_unlock_irqrestore(&irq_big_lock, flags); |
0ebfff14 BH |
1035 | return NO_IRQ; |
1036 | } | |
1037 | hint_found: | |
1038 | for (i = found; i < (found + count); i++) { | |
1039 | irq_map[i].hwirq = host->inval_irq; | |
1040 | smp_wmb(); | |
1041 | irq_map[i].host = host; | |
1042 | } | |
f95e085b | 1043 | raw_spin_unlock_irqrestore(&irq_big_lock, flags); |
0ebfff14 BH |
1044 | return found; |
1045 | } | |
1046 | ||
1047 | void irq_free_virt(unsigned int virq, unsigned int count) | |
1da177e4 LT |
1048 | { |
1049 | unsigned long flags; | |
0ebfff14 | 1050 | unsigned int i; |
1da177e4 | 1051 | |
0ebfff14 BH |
1052 | WARN_ON (virq < NUM_ISA_INTERRUPTS); |
1053 | WARN_ON (count == 0 || (virq + count) > irq_virq_count); | |
1da177e4 | 1054 | |
f95e085b | 1055 | raw_spin_lock_irqsave(&irq_big_lock, flags); |
0ebfff14 BH |
1056 | for (i = virq; i < (virq + count); i++) { |
1057 | struct irq_host *host; | |
1da177e4 | 1058 | |
0ebfff14 BH |
1059 | if (i < NUM_ISA_INTERRUPTS || |
1060 | (virq + count) > irq_virq_count) | |
1061 | continue; | |
1da177e4 | 1062 | |
0ebfff14 BH |
1063 | host = irq_map[i].host; |
1064 | irq_map[i].hwirq = host->inval_irq; | |
1065 | smp_wmb(); | |
1066 | irq_map[i].host = NULL; | |
1067 | } | |
f95e085b | 1068 | raw_spin_unlock_irqrestore(&irq_big_lock, flags); |
1da177e4 | 1069 | } |
0ebfff14 | 1070 | |
cd015707 | 1071 | int arch_early_irq_init(void) |
0ebfff14 | 1072 | { |
cd015707 ME |
1073 | struct irq_desc *desc; |
1074 | int i; | |
0ebfff14 | 1075 | |
cd015707 ME |
1076 | for (i = 0; i < NR_IRQS; i++) { |
1077 | desc = irq_to_desc(i); | |
1078 | if (desc) | |
1079 | desc->status |= IRQ_NOREQUEST; | |
1080 | } | |
1081 | ||
1082 | return 0; | |
1083 | } | |
1084 | ||
1085 | int arch_init_chip_data(struct irq_desc *desc, int node) | |
1086 | { | |
1087 | desc->status |= IRQ_NOREQUEST; | |
1088 | return 0; | |
0ebfff14 BH |
1089 | } |
1090 | ||
1091 | /* We need to create the radix trees late */ | |
1092 | static int irq_late_init(void) | |
1093 | { | |
1094 | struct irq_host *h; | |
967e012e | 1095 | unsigned int i; |
0ebfff14 | 1096 | |
967e012e SD |
1097 | /* |
1098 | * No mutual exclusion with respect to accessors of the tree is needed | |
1099 | * here as the synchronization is done via the state variable | |
1100 | * revmap_trees_allocated. | |
1101 | */ | |
0ebfff14 BH |
1102 | list_for_each_entry(h, &irq_hosts, link) { |
1103 | if (h->revmap_type == IRQ_HOST_MAP_TREE) | |
967e012e SD |
1104 | INIT_RADIX_TREE(&h->revmap_data.tree, GFP_KERNEL); |
1105 | } | |
1106 | ||
1107 | /* | |
1108 | * Make sure the radix trees inits are visible before setting | |
1109 | * the flag | |
1110 | */ | |
1111 | smp_wmb(); | |
1112 | revmap_trees_allocated = 1; | |
1113 | ||
1114 | /* | |
1115 | * Insert the reverse mapping for those interrupts already present | |
1116 | * in irq_map[]. | |
1117 | */ | |
150c6c8f | 1118 | mutex_lock(&revmap_trees_mutex); |
967e012e SD |
1119 | for (i = 0; i < irq_virq_count; i++) { |
1120 | if (irq_map[i].host && | |
1121 | (irq_map[i].host->revmap_type == IRQ_HOST_MAP_TREE)) | |
1122 | radix_tree_insert(&irq_map[i].host->revmap_data.tree, | |
1123 | irq_map[i].hwirq, &irq_map[i]); | |
0ebfff14 | 1124 | } |
150c6c8f | 1125 | mutex_unlock(&revmap_trees_mutex); |
0ebfff14 | 1126 | |
967e012e SD |
1127 | /* |
1128 | * Make sure the radix trees insertions are visible before setting | |
1129 | * the flag | |
1130 | */ | |
1131 | smp_wmb(); | |
1132 | revmap_trees_allocated = 2; | |
1133 | ||
0ebfff14 BH |
1134 | return 0; |
1135 | } | |
1136 | arch_initcall(irq_late_init); | |
1137 | ||
60b332e7 ME |
1138 | #ifdef CONFIG_VIRQ_DEBUG |
1139 | static int virq_debug_show(struct seq_file *m, void *private) | |
1140 | { | |
1141 | unsigned long flags; | |
97f7d6bc | 1142 | struct irq_desc *desc; |
60b332e7 ME |
1143 | const char *p; |
1144 | char none[] = "none"; | |
1145 | int i; | |
1146 | ||
1147 | seq_printf(m, "%-5s %-7s %-15s %s\n", "virq", "hwirq", | |
1148 | "chip name", "host name"); | |
1149 | ||
76f1d94f | 1150 | for (i = 1; i < nr_irqs; i++) { |
6cff46f4 | 1151 | desc = irq_to_desc(i); |
76f1d94f ME |
1152 | if (!desc) |
1153 | continue; | |
1154 | ||
239007b8 | 1155 | raw_spin_lock_irqsave(&desc->lock, flags); |
60b332e7 ME |
1156 | |
1157 | if (desc->action && desc->action->handler) { | |
1158 | seq_printf(m, "%5d ", i); | |
1159 | seq_printf(m, "0x%05lx ", virq_to_hw(i)); | |
1160 | ||
b27df672 TG |
1161 | if (desc->chip && desc->chip->name) |
1162 | p = desc->chip->name; | |
60b332e7 ME |
1163 | else |
1164 | p = none; | |
1165 | seq_printf(m, "%-15s ", p); | |
1166 | ||
1167 | if (irq_map[i].host && irq_map[i].host->of_node) | |
1168 | p = irq_map[i].host->of_node->full_name; | |
1169 | else | |
1170 | p = none; | |
1171 | seq_printf(m, "%s\n", p); | |
1172 | } | |
1173 | ||
239007b8 | 1174 | raw_spin_unlock_irqrestore(&desc->lock, flags); |
60b332e7 ME |
1175 | } |
1176 | ||
1177 | return 0; | |
1178 | } | |
1179 | ||
1180 | static int virq_debug_open(struct inode *inode, struct file *file) | |
1181 | { | |
1182 | return single_open(file, virq_debug_show, inode->i_private); | |
1183 | } | |
1184 | ||
1185 | static const struct file_operations virq_debug_fops = { | |
1186 | .open = virq_debug_open, | |
1187 | .read = seq_read, | |
1188 | .llseek = seq_lseek, | |
1189 | .release = single_release, | |
1190 | }; | |
1191 | ||
1192 | static int __init irq_debugfs_init(void) | |
1193 | { | |
1194 | if (debugfs_create_file("virq_mapping", S_IRUGO, powerpc_debugfs_root, | |
476ff8a0 | 1195 | NULL, &virq_debug_fops) == NULL) |
60b332e7 ME |
1196 | return -ENOMEM; |
1197 | ||
1198 | return 0; | |
1199 | } | |
1200 | __initcall(irq_debugfs_init); | |
1201 | #endif /* CONFIG_VIRQ_DEBUG */ | |
1202 | ||
c6622f63 | 1203 | #ifdef CONFIG_PPC64 |
1da177e4 LT |
1204 | static int __init setup_noirqdistrib(char *str) |
1205 | { | |
1206 | distribute_irqs = 0; | |
1207 | return 1; | |
1208 | } | |
1209 | ||
1210 | __setup("noirqdistrib", setup_noirqdistrib); | |
756e7104 | 1211 | #endif /* CONFIG_PPC64 */ |