[GitHub/mt8127/android_kernel_alcatel_ttab.git] / arch / powerpc / boot / dts / taishan.dts

/*
 * Device Tree Source for IBM/AMCC Taishan
 *
 * Copyright 2007 IBM Corp.
 * Hugh Blemings <hugh@au.ibm.com> based off code by
 * Josh Boyer <jwboyer@linux.vnet.ibm.com>, David Gibson <dwg@au1.ibm.com>
 *
 * This file is licensed under the terms of the GNU General Public
 * License version 2.  This program is licensed "as is" without
 * any warranty of any kind, whether express or implied.
 */

/ {
	#address-cells = <2>;
	#size-cells = <1>;
	model = "amcc,taishan";
	compatible = "amcc,taishan";
	dcr-parent = <&/cpus/cpu@0>;

	aliases {
		ethernet0 = &EMAC2;
		ethernet1 = &EMAC3;
		serial0 = &UART0;
		serial1 = &UART1;
	};

	cpus {
		#address-cells = <1>;
		#size-cells = <0>;

		cpu@0 {
			device_type = "cpu";
			model = "PowerPC,440GX";
			reg = <0>;
			clock-frequency = <2FAF0800>; // 800MHz
			timebase-frequency = <0>; // Filled in by zImage
			i-cache-line-size = <32>;
			d-cache-line-size = <32>;
			i-cache-size = <8000>; /* 32 kB */
			d-cache-size = <8000>; /* 32 kB */
			dcr-controller;
			dcr-access-method = "native";
		};
	};

	memory {
		device_type = "memory";
		reg = <0 0 0>; // Filled in by zImage
	};


	UICB0: interrupt-controller-base {
		compatible = "ibm,uic-440gx", "ibm,uic";
		interrupt-controller;
		cell-index = <3>;
		dcr-reg = <200 009>;
		#address-cells = <0>;
		#size-cells = <0>;
		#interrupt-cells = <2>;
	};


	UIC0: interrupt-controller0 {
		compatible = "ibm,uic-440gx", "ibm,uic";
		interrupt-controller;
		cell-index = <0>;
		dcr-reg = <0c0 009>;
		#address-cells = <0>;
		#size-cells = <0>;
		#interrupt-cells = <2>;
		interrupts = <01 4 00 4>; /* cascade - first non-critical */
		interrupt-parent = <&UICB0>;

	};

	UIC1: interrupt-controller1 {
		compatible = "ibm,uic-440gx", "ibm,uic";
		interrupt-controller;
		cell-index = <1>;
		dcr-reg = <0d0 009>;
		#address-cells = <0>;
		#size-cells = <0>;
		#interrupt-cells = <2>;
		interrupts = <03 4 02 4>; /* cascade */
		interrupt-parent = <&UICB0>;
	};

	UIC2: interrupt-controller2 {
		compatible = "ibm,uic-440gx", "ibm,uic";
		interrupt-controller;
		cell-index = <2>; /* was 1 */
		dcr-reg = <210 009>;
		#address-cells = <0>;
		#size-cells = <0>;
		#interrupt-cells = <2>;
		interrupts = <05 4 04 4>; /* cascade */
		interrupt-parent = <&UICB0>;
	};


	CPC0: cpc {
		compatible = "ibm,cpc-440gp";
		dcr-reg = <0b0 003 0e0 010>;
		// FIXME: anything else?
	};

	plb {
		compatible = "ibm,plb-440gx", "ibm,plb4";
		#address-cells = <2>;
		#size-cells = <1>;
		ranges;
		clock-frequency = <9896800>; // 160MHz

		SDRAM0: memory-controller {
			compatible = "ibm,sdram-440gp";
			dcr-reg = <010 2>;
			// FIXME: anything else?
		};

		SRAM0: sram {
			compatible = "ibm,sram-440gp";
			dcr-reg = <020 8 00a 1>;
		};

		DMA0: dma {
			// FIXME: ???
			compatible = "ibm,dma-440gp";
			dcr-reg = <100 027>;
		};

		MAL0: mcmal {
			compatible = "ibm,mcmal-440gx", "ibm,mcmal2";
			dcr-reg = <180 62>;
			num-tx-chans = <4>;
			num-rx-chans = <4>;
			interrupt-parent = <&MAL0>;
			interrupts = <0 1 2 3 4>;
			#interrupt-cells = <1>;
			#address-cells = <0>;
			#size-cells = <0>;
			interrupt-map = </*TXEOB*/ 0 &UIC0 a 4
					 /*RXEOB*/ 1 &UIC0 b 4
					 /*SERR*/  2 &UIC1 0 4
					 /*TXDE*/  3 &UIC1 1 4
					 /*RXDE*/  4 &UIC1 2 4>;
			interrupt-map-mask = <ffffffff>;
		};

		POB0: opb {
			compatible = "ibm,opb-440gx", "ibm,opb";
			#address-cells = <1>;
			#size-cells = <1>;
			/* Wish there was a nicer way of specifying a full 32-bit
			   range */
			ranges = <00000000 1 00000000 80000000
				  80000000 1 80000000 80000000>;
			dcr-reg = <090 00b>;
			interrupt-parent = <&UIC1>;
			interrupts = <7 4>;
			clock-frequency = <4C4B400>; // 80MHz


			EBC0: ebc {
				compatible = "ibm,ebc-440gx", "ibm,ebc";
				dcr-reg = <012 2>;
				#address-cells = <2>;
				#size-cells = <1>;
				clock-frequency = <4C4B400>; // 80MHz

				/* ranges property is supplied by zImage
				 * based on firmware's configuration of the
				 * EBC bridge */

				interrupts = <5 4>;
				interrupt-parent = <&UIC1>;

				/* TODO: Add other EBC devices */
			};


			UART0: serial@40000200 {
				device_type = "serial";
				compatible = "ns16550";
				reg = <40000200 8>;
				virtual-reg = <e0000200>;
 				clock-frequency = <A8C000>;
				current-speed = <1C200>; /* 115200 */
				interrupt-parent = <&UIC0>;
				interrupts = <0 4>;
			};

			UART1: serial@40000300 {
				device_type = "serial";
				compatible = "ns16550";
				reg = <40000300 8>;
				virtual-reg = <e0000300>;
				clock-frequency = <A8C000>;
				current-speed = <1C200>; /* 115200 */
				interrupt-parent = <&UIC0>;
				interrupts = <1 4>;
			};

			IIC0: i2c@40000400 {
				/* FIXME */
				compatible = "ibm,iic-440gp", "ibm,iic";
				reg = <40000400 14>;
				interrupt-parent = <&UIC0>;
				interrupts = <2 4>;
			};
			IIC1: i2c@40000500 {
				/* FIXME */
				compatible = "ibm,iic-440gp", "ibm,iic";
				reg = <40000500 14>;
				interrupt-parent = <&UIC0>;
				interrupts = <3 4>;
			};

			GPIO0: gpio@40000700 {
				/* FIXME */
				compatible = "ibm,gpio-440gp";
				reg = <40000700 20>;
			};

			ZMII0: emac-zmii@40000780 {
				compatible = "ibm,zmii-440gx", "ibm,zmii";
				reg = <40000780 c>;
			};

			RGMII0: emac-rgmii@40000790 {
				compatible = "ibm,rgmii";
				reg = <40000790 8>;
			};


			EMAC0: ethernet@40000800 {
				unused = <1>;
				linux,network-index = <2>;
				device_type = "network";
				compatible = "ibm,emac-440gx", "ibm,emac4";
				interrupt-parent = <&UIC1>;
				interrupts = <1c 4 1d 4>;
				reg = <40000800 70>;
				local-mac-address = [000000000000]; // Filled in by zImage
				mal-device = <&MAL0>;
				mal-tx-channel = <0>;
				mal-rx-channel = <0>;
				cell-index = <0>;
				max-frame-size = <5dc>;
				rx-fifo-size = <1000>;
				tx-fifo-size = <800>;
				phy-mode = "rmii";
				phy-map = <00000001>;
				zmii-device = <&ZMII0>;
				zmii-channel = <0>;
			};
		 	EMAC1: ethernet@40000900 {
				unused = <1>;
				linux,network-index = <3>;
				device_type = "network";
				compatible = "ibm,emac-440gx", "ibm,emac4";
				interrupt-parent = <&UIC1>;
				interrupts = <1e 4 1f 4>;
				reg = <40000900 70>;
				local-mac-address = [000000000000]; // Filled in by zImage
				mal-device = <&MAL0>;
				mal-tx-channel = <1>;
				mal-rx-channel = <1>;
				cell-index = <1>;
				max-frame-size = <5dc>;
				rx-fifo-size = <1000>;
				tx-fifo-size = <800>;
				phy-mode = "rmii";
				phy-map = <00000001>;
 				zmii-device = <&ZMII0>;
				zmii-channel = <1>;
			};

		 	EMAC2: ethernet@40000c00 {
				linux,network-index = <0>;
				device_type = "network";
				compatible = "ibm,emac-440gx", "ibm,emac4";
				interrupt-parent = <&UIC2>;
				interrupts = <0 4 1 4>;
				reg = <40000c00 70>;
				local-mac-address = [000000000000]; // Filled in by zImage
				mal-device = <&MAL0>;
				mal-tx-channel = <2>;
				mal-rx-channel = <2>;
				cell-index = <2>;
				max-frame-size = <5dc>;
				rx-fifo-size = <1000>;
				tx-fifo-size = <800>;
				phy-mode = "rgmii";
				phy-map = <00000001>;
				rgmii-device = <&RGMII0>;
				rgmii-channel = <0>;
 				zmii-device = <&ZMII0>;
				zmii-channel = <2>;
			};

		 	EMAC3: ethernet@40000e00 {
				linux,network-index = <1>;
				device_type = "network";
				compatible = "ibm,emac-440gx", "ibm,emac4";
				interrupt-parent = <&UIC2>;
				interrupts = <2 4 3 4>;
				reg = <40000e00 70>;
				local-mac-address = [000000000000]; // Filled in by zImage
				mal-device = <&MAL0>;
				mal-tx-channel = <3>;
				mal-rx-channel = <3>;
				cell-index = <3>;
				max-frame-size = <5dc>;
				rx-fifo-size = <1000>;
				tx-fifo-size = <800>;
				phy-mode = "rgmii";
				phy-map = <00000003>;
				rgmii-device = <&RGMII0>;
				rgmii-channel = <1>;
 				zmii-device = <&ZMII0>;
				zmii-channel = <3>;
			};


			GPT0: gpt@40000a00 {
				/* FIXME */
				reg = <40000a00 d4>;
				interrupt-parent = <&UIC0>;
				interrupts = <12 4 13 4 14 4 15 4 16 4>;
			};

		};

		PCIX0: pci@20ec00000 {
			device_type = "pci";
			#interrupt-cells = <1>;
			#size-cells = <2>;
			#address-cells = <3>;
			compatible = "ibm,plb440gp-pcix", "ibm,plb-pcix";
			primary;
			large-inbound-windows;
			enable-msi-hole;
			reg = <2 0ec00000   8	/* Config space access */
			       0 0 0		/* no IACK cycles */
			       2 0ed00000   4   /* Special cycles */
			       2 0ec80000 100	/* Internal registers */
			       2 0ec80100  fc>;	/* Internal messaging registers */

			/* Outbound ranges, one memory and one IO,
			 * later cannot be changed
			 */
			ranges = <02000000 0 80000000 00000003 80000000 0 80000000
				  01000000 0 00000000 00000002 08000000 0 00010000>;

			/* Inbound 2GB range starting at 0 */
			dma-ranges = <42000000 0 0 0 0 0 80000000>;

			interrupt-map-mask = <f800 0 0 7>;
			interrupt-map = <
				/* IDSEL 1 */
				0800 0 0 1 &UIC0 17 8
				0800 0 0 2 &UIC0 18 8
				0800 0 0 3 &UIC0 19 8
				0800 0 0 4 &UIC0 1a 8

				/* IDSEL 2 */
				1000 0 0 1 &UIC0 18 8
				1000 0 0 2 &UIC0 19 8
				1000 0 0 3 &UIC0 1a 8
				1000 0 0 4 &UIC0 17 8
			>;
		};
	};

	chosen {
		linux,stdout-path = "/plb/opb/serial@40000300";
	};
};
Commit	Line	Data
6bbc5476 HB	1	/*
	2	* Device Tree Source for IBM/AMCC Taishan
	3	*
	4	* Copyright 2007 IBM Corp.
	5	* Hugh Blemings <hugh@au.ibm.com> based off code by
	6	* Josh Boyer <jwboyer@linux.vnet.ibm.com>, David Gibson <dwg@au1.ibm.com>
	7	*
	8	* This file is licensed under the terms of the GNU General Public
	9	* License version 2. This program is licensed "as is" without
	10	* any warranty of any kind, whether express or implied.
	11	*/
	12
	13	/ {
	14	#address-cells = <2>;
	15	#size-cells = <1>;
	16	model = "amcc,taishan";
	17	compatible = "amcc,taishan";
72fda114	18	dcr-parent = <&/cpus/cpu@0>;
6bbc5476	19
8aaed98c SR	20	aliases {
	21	ethernet0 = &EMAC2;
	22	ethernet1 = &EMAC3;
	23	serial0 = &UART0;
	24	serial1 = &UART1;
	25	};
	26
6bbc5476 HB	27	cpus {
	28	#address-cells = <1>;
	29	#size-cells = <0>;
	30
72fda114	31	cpu@0 {
6bbc5476	32	device_type = "cpu";
72fda114	33	model = "PowerPC,440GX";
6bbc5476 HB	34	reg = <0>;
	35	clock-frequency = <2FAF0800>; // 800MHz
	36	timebase-frequency = <0>; // Filled in by zImage
	37	i-cache-line-size = <32>;
	38	d-cache-line-size = <32>;
	39	i-cache-size = <8000>; /* 32 kB */
	40	d-cache-size = <8000>; /* 32 kB */
	41	dcr-controller;
	42	dcr-access-method = "native";
	43	};
	44	};
	45
	46	memory {
	47	device_type = "memory";
	48	reg = <0 0 0>; // Filled in by zImage
	49	};
	50
	51
	52	UICB0: interrupt-controller-base {
	53	compatible = "ibm,uic-440gx", "ibm,uic";
	54	interrupt-controller;
	55	cell-index = <3>;
	56	dcr-reg = <200 009>;
	57	#address-cells = <0>;
	58	#size-cells = <0>;
	59	#interrupt-cells = <2>;
	60	};
	61
	62
	63	UIC0: interrupt-controller0 {
	64	compatible = "ibm,uic-440gx", "ibm,uic";
	65	interrupt-controller;
	66	cell-index = <0>;
	67	dcr-reg = <0c0 009>;
	68	#address-cells = <0>;
	69	#size-cells = <0>;
	70	#interrupt-cells = <2>;
	71	interrupts = <01 4 00 4>; /* cascade - first non-critical */
	72	interrupt-parent = <&UICB0>;
	73
	74	};
	75
	76	UIC1: interrupt-controller1 {
	77	compatible = "ibm,uic-440gx", "ibm,uic";
	78	interrupt-controller;
	79	cell-index = <1>;
	80	dcr-reg = <0d0 009>;
	81	#address-cells = <0>;
	82	#size-cells = <0>;
	83	#interrupt-cells = <2>;
	84	interrupts = <03 4 02 4>; /* cascade */
	85	interrupt-parent = <&UICB0>;
	86	};
	87
	88	UIC2: interrupt-controller2 {
	89	compatible = "ibm,uic-440gx", "ibm,uic";
	90	interrupt-controller;
	91	cell-index = <2>; /* was 1 */
	92	dcr-reg = <210 009>;
	93	#address-cells = <0>;
	94	#size-cells = <0>;
	95	#interrupt-cells = <2>;
	96	interrupts = <05 4 04 4>; /* cascade */
	97	interrupt-parent = <&UICB0>;
98	};
99
100
101	CPC0: cpc {
102	compatible = "ibm,cpc-440gp";
103	dcr-reg = <0b0 003 0e0 010>;
104	// FIXME: anything else?
105	};
106
107	plb {
108	compatible = "ibm,plb-440gx", "ibm,plb4";
109	#address-cells = <2>;
110	#size-cells = <1>;
111	ranges;
112	clock-frequency = <9896800>; // 160MHz
113
114	SDRAM0: memory-controller {
115	compatible = "ibm,sdram-440gp";
116	dcr-reg = <010 2>;
117	// FIXME: anything else?
118	};
119
120	SRAM0: sram {
121	compatible = "ibm,sram-440gp";
122	dcr-reg = <020 8 00a 1>;
123	};
124
125	DMA0: dma {
126	// FIXME: ???
127	compatible = "ibm,dma-440gp";
128	dcr-reg = <100 027>;
129	};
130
131	MAL0: mcmal {
132	compatible = "ibm,mcmal-440gx", "ibm,mcmal2";
133	dcr-reg = <180 62>;
134	num-tx-chans = <4>;
135	num-rx-chans = <4>;
136	interrupt-parent = <&MAL0>;
137	interrupts = <0 1 2 3 4>;
138	#interrupt-cells = <1>;
139	#address-cells = <0>;
140	#size-cells = <0>;
141	interrupt-map = </TXEOB/ 0 &UIC0 a 4
142	/RXEOB/ 1 &UIC0 b 4
143	/SERR/ 2 &UIC1 0 4
144	/TXDE/ 3 &UIC1 1 4
145	/RXDE/ 4 &UIC1 2 4>;
146	interrupt-map-mask = <ffffffff>;
147	};
148
149	POB0: opb {
150	compatible = "ibm,opb-440gx", "ibm,opb";
151	#address-cells = <1>;
152	#size-cells = <1>;
153	/* Wish there was a nicer way of specifying a full 32-bit
154	range */
155	ranges = <00000000 1 00000000 80000000
156	80000000 1 80000000 80000000>;
157	dcr-reg = <090 00b>;
158	interrupt-parent = <&UIC1>;
159	interrupts = <7 4>;
160	clock-frequency = <4C4B400>; // 80MHz
161
162
163	EBC0: ebc {
164	compatible = "ibm,ebc-440gx", "ibm,ebc";
165	dcr-reg = <012 2>;
166	#address-cells = <2>;
167	#size-cells = <1>;
168	clock-frequency = <4C4B400>; // 80MHz
169
170	/* ranges property is supplied by zImage
171	* based on firmware's configuration of the
172	* EBC bridge */
173
174	interrupts = <5 4>;
175	interrupt-parent = <&UIC1>;
176
177	/* TODO: Add other EBC devices */
178	};
179
180
181
182	UART0: serial@40000200 {
183	device_type = "serial";
184	compatible = "ns16550";
185	reg = <40000200 8>;
186	virtual-reg = <e0000200>;
187	clock-frequency = <A8C000>;
188	current-speed = <1C200>; /* 115200 */
189	interrupt-parent = <&UIC0>;
190	interrupts = <0 4>;
191	};
192
193	UART1: serial@40000300 {
194	device_type = "serial";
195	compatible = "ns16550";
196	reg = <40000300 8>;
197	virtual-reg = <e0000300>;
198	clock-frequency = <A8C000>;
199	current-speed = <1C200>; /* 115200 */
200	interrupt-parent = <&UIC0>;
201	interrupts = <1 4>;
202	};
203
204	IIC0: i2c@40000400 {
205	/* FIXME */
6bbc5476 HB	206	compatible = "ibm,iic-440gp", "ibm,iic";
	207	reg = <40000400 14>;
	208	interrupt-parent = <&UIC0>;
	209	interrupts = <2 4>;
	210	};
	211	IIC1: i2c@40000500 {
	212	/* FIXME */
6bbc5476 HB	213	compatible = "ibm,iic-440gp", "ibm,iic";
	214	reg = <40000500 14>;
	215	interrupt-parent = <&UIC0>;
	216	interrupts = <3 4>;
	217	};
	218
	219	GPIO0: gpio@40000700 {
	220	/* FIXME */
	221	compatible = "ibm,gpio-440gp";
	222	reg = <40000700 20>;
	223	};
	224
	225	ZMII0: emac-zmii@40000780 {
6bbc5476 HB	226	compatible = "ibm,zmii-440gx", "ibm,zmii";
	227	reg = <40000780 c>;
	228	};
	229
	230	RGMII0: emac-rgmii@40000790 {
6bbc5476 HB	231	compatible = "ibm,rgmii";
	232	reg = <40000790 8>;
	233	};
	234
	235
	236	EMAC0: ethernet@40000800 {
	237	unused = <1>;
	238	linux,network-index = <2>;
	239	device_type = "network";
	240	compatible = "ibm,emac-440gx", "ibm,emac4";
	241	interrupt-parent = <&UIC1>;
	242	interrupts = <1c 4 1d 4>;
	243	reg = <40000800 70>;
	244	local-mac-address = [000000000000]; // Filled in by zImage
	245	mal-device = <&MAL0>;
	246	mal-tx-channel = <0>;
	247	mal-rx-channel = <0>;
	248	cell-index = <0>;
	249	max-frame-size = <5dc>;
	250	rx-fifo-size = <1000>;
	251	tx-fifo-size = <800>;
	252	phy-mode = "rmii";
	253	phy-map = <00000001>;
	254	zmii-device = <&ZMII0>;
	255	zmii-channel = <0>;
	256	};
	257	EMAC1: ethernet@40000900 {
	258	unused = <1>;
	259	linux,network-index = <3>;
	260	device_type = "network";
	261	compatible = "ibm,emac-440gx", "ibm,emac4";
	262	interrupt-parent = <&UIC1>;
	263	interrupts = <1e 4 1f 4>;
	264	reg = <40000900 70>;
	265	local-mac-address = [000000000000]; // Filled in by zImage
	266	mal-device = <&MAL0>;
	267	mal-tx-channel = <1>;
	268	mal-rx-channel = <1>;
	269	cell-index = <1>;
	270	max-frame-size = <5dc>;
	271	rx-fifo-size = <1000>;
	272	tx-fifo-size = <800>;
	273	phy-mode = "rmii";
	274	phy-map = <00000001>;
	275	zmii-device = <&ZMII0>;
	276	zmii-channel = <1>;
	277	};
	278
	279	EMAC2: ethernet@40000c00 {
	280	linux,network-index = <0>;
	281	device_type = "network";
	282	compatible = "ibm,emac-440gx", "ibm,emac4";
	283	interrupt-parent = <&UIC2>;
	284	interrupts = <0 4 1 4>;
	285	reg = <40000c00 70>;
	286	local-mac-address = [000000000000]; // Filled in by zImage
	287	mal-device = <&MAL0>;
	288	mal-tx-channel = <2>;
	289	mal-rx-channel = <2>;
	290	cell-index = <2>;
	291	max-frame-size = <5dc>;
	292	rx-fifo-size = <1000>;
	293	tx-fifo-size = <800>;
	294	phy-mode = "rgmii";
295	phy-map = <00000001>;
296	rgmii-device = <&RGMII0>;
297	rgmii-channel = <0>;
298	zmii-device = <&ZMII0>;
299	zmii-channel = <2>;
300	};
301
302	EMAC3: ethernet@40000e00 {
303	linux,network-index = <1>;
304	device_type = "network";
305	compatible = "ibm,emac-440gx", "ibm,emac4";
306	interrupt-parent = <&UIC2>;
307	interrupts = <2 4 3 4>;
308	reg = <40000e00 70>;
309	local-mac-address = [000000000000]; // Filled in by zImage
310	mal-device = <&MAL0>;
311	mal-tx-channel = <3>;
312	mal-rx-channel = <3>;
313	cell-index = <3>;
314	max-frame-size = <5dc>;
315	rx-fifo-size = <1000>;
316	tx-fifo-size = <800>;
317	phy-mode = "rgmii";
318	phy-map = <00000003>;
319	rgmii-device = <&RGMII0>;
320	rgmii-channel = <1>;
321	zmii-device = <&ZMII0>;
322	zmii-channel = <3>;
323	};
324
325
326	GPT0: gpt@40000a00 {
327	/* FIXME */
328	reg = <40000a00 d4>;
329	interrupt-parent = <&UIC0>;
330	interrupts = <12 4 13 4 14 4 15 4 16 4>;
331	};
332
333	};
334
335	PCIX0: pci@20ec00000 {
336	device_type = "pci";
337	#interrupt-cells = <1>;
338	#size-cells = <2>;
339	#address-cells = <3>;
340	compatible = "ibm,plb440gp-pcix", "ibm,plb-pcix";
341	primary;
342	large-inbound-windows;
343	enable-msi-hole;
344	reg = <2 0ec00000 8 /* Config space access */
345	0 0 0 /* no IACK cycles */
346	2 0ed00000 4 /* Special cycles */
347	2 0ec80000 100 /* Internal registers */
348	2 0ec80100 fc>; /* Internal messaging registers */
349
350	/* Outbound ranges, one memory and one IO,
351	* later cannot be changed
352	*/
353	ranges = <02000000 0 80000000 00000003 80000000 0 80000000
354	01000000 0 00000000 00000002 08000000 0 00010000>;
355
356	/* Inbound 2GB range starting at 0 */
357	dma-ranges = <42000000 0 0 0 0 0 80000000>;
358
359	interrupt-map-mask = <f800 0 0 7>;
360	interrupt-map = <
361	/* IDSEL 1 */
362	0800 0 0 1 &UIC0 17 8
363	0800 0 0 2 &UIC0 18 8
364	0800 0 0 3 &UIC0 19 8
365	0800 0 0 4 &UIC0 1a 8
366
367	/* IDSEL 2 */
368	1000 0 0 1 &UIC0 18 8
369	1000 0 0 2 &UIC0 19 8
370	1000 0 0 3 &UIC0 1a 8
371	1000 0 0 4 &UIC0 17 8
372	>;
373	};
374	};
375
376	chosen {
377	linux,stdout-path = "/plb/opb/serial@40000300";
378	};
379	};