Commit | Line | Data |
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3910cd8c VB |
1 | /* |
2 | * Device Tree Source for AMCC Rainier | |
3 | * | |
4 | * Based on Sequoia code | |
5 | * Copyright (c) 2007 MontaVista Software, Inc. | |
6 | * | |
7 | * FIXME: Draft only! | |
8 | * | |
9 | * This file is licensed under the terms of the GNU General Public | |
10 | * License version 2. This program is licensed "as is" without | |
11 | * any warranty of any kind, whether express or implied. | |
12 | * | |
13 | */ | |
14 | ||
15 | / { | |
16 | #address-cells = <2>; | |
17 | #size-cells = <1>; | |
18 | model = "amcc,rainier"; | |
19 | compatible = "amcc,rainier"; | |
72fda114 | 20 | dcr-parent = <&/cpus/cpu@0>; |
3910cd8c | 21 | |
8aaed98c SR |
22 | aliases { |
23 | ethernet0 = &EMAC0; | |
24 | ethernet1 = &EMAC1; | |
25 | serial0 = &UART0; | |
26 | serial1 = &UART1; | |
27 | serial2 = &UART2; | |
28 | serial3 = &UART3; | |
29 | }; | |
30 | ||
3910cd8c VB |
31 | cpus { |
32 | #address-cells = <1>; | |
33 | #size-cells = <0>; | |
34 | ||
72fda114 | 35 | cpu@0 { |
3910cd8c | 36 | device_type = "cpu"; |
72fda114 | 37 | model = "PowerPC,440GRx"; |
3910cd8c VB |
38 | reg = <0>; |
39 | clock-frequency = <0>; /* Filled in by zImage */ | |
40 | timebase-frequency = <0>; /* Filled in by zImage */ | |
41 | i-cache-line-size = <20>; | |
42 | d-cache-line-size = <20>; | |
43 | i-cache-size = <8000>; | |
44 | d-cache-size = <8000>; | |
45 | dcr-controller; | |
46 | dcr-access-method = "native"; | |
47 | }; | |
48 | }; | |
49 | ||
50 | memory { | |
51 | device_type = "memory"; | |
52 | reg = <0 0 0>; /* Filled in by zImage */ | |
53 | }; | |
54 | ||
55 | UIC0: interrupt-controller0 { | |
56 | compatible = "ibm,uic-440grx","ibm,uic"; | |
57 | interrupt-controller; | |
58 | cell-index = <0>; | |
59 | dcr-reg = <0c0 009>; | |
60 | #address-cells = <0>; | |
61 | #size-cells = <0>; | |
62 | #interrupt-cells = <2>; | |
63 | }; | |
64 | ||
65 | UIC1: interrupt-controller1 { | |
66 | compatible = "ibm,uic-440grx","ibm,uic"; | |
67 | interrupt-controller; | |
68 | cell-index = <1>; | |
69 | dcr-reg = <0d0 009>; | |
70 | #address-cells = <0>; | |
71 | #size-cells = <0>; | |
72 | #interrupt-cells = <2>; | |
73 | interrupts = <1e 4 1f 4>; /* cascade */ | |
74 | interrupt-parent = <&UIC0>; | |
75 | }; | |
76 | ||
77 | UIC2: interrupt-controller2 { | |
78 | compatible = "ibm,uic-440grx","ibm,uic"; | |
79 | interrupt-controller; | |
80 | cell-index = <2>; | |
81 | dcr-reg = <0e0 009>; | |
82 | #address-cells = <0>; | |
83 | #size-cells = <0>; | |
84 | #interrupt-cells = <2>; | |
85 | interrupts = <1c 4 1d 4>; /* cascade */ | |
86 | interrupt-parent = <&UIC0>; | |
87 | }; | |
88 | ||
89 | SDR0: sdr { | |
90 | compatible = "ibm,sdr-440grx", "ibm,sdr-440ep"; | |
91 | dcr-reg = <00e 002>; | |
92 | }; | |
93 | ||
94 | CPR0: cpr { | |
95 | compatible = "ibm,cpr-440grx", "ibm,cpr-440ep"; | |
96 | dcr-reg = <00c 002>; | |
97 | }; | |
98 | ||
99 | plb { | |
100 | compatible = "ibm,plb-440grx", "ibm,plb4"; | |
101 | #address-cells = <2>; | |
102 | #size-cells = <1>; | |
103 | ranges; | |
104 | clock-frequency = <0>; /* Filled in by zImage */ | |
8aaed98c | 105 | |
3910cd8c | 106 | SDRAM0: sdram { |
3910cd8c VB |
107 | compatible = "ibm,sdram-440grx", "ibm,sdram-44x-ddr2denali"; |
108 | dcr-reg = <010 2>; | |
109 | }; | |
110 | ||
111 | DMA0: dma { | |
112 | compatible = "ibm,dma-440grx", "ibm,dma-4xx"; | |
113 | dcr-reg = <100 027>; | |
114 | }; | |
115 | ||
116 | MAL0: mcmal { | |
117 | compatible = "ibm,mcmal-440grx", "ibm,mcmal2"; | |
118 | dcr-reg = <180 62>; | |
119 | num-tx-chans = <2>; | |
120 | num-rx-chans = <2>; | |
121 | interrupt-parent = <&MAL0>; | |
122 | interrupts = <0 1 2 3 4>; | |
123 | #interrupt-cells = <1>; | |
124 | #address-cells = <0>; | |
125 | #size-cells = <0>; | |
126 | interrupt-map = </*TXEOB*/ 0 &UIC0 a 4 | |
127 | /*RXEOB*/ 1 &UIC0 b 4 | |
128 | /*SERR*/ 2 &UIC1 0 4 | |
129 | /*TXDE*/ 3 &UIC1 1 4 | |
130 | /*RXDE*/ 4 &UIC1 2 4>; | |
131 | interrupt-map-mask = <ffffffff>; | |
132 | }; | |
133 | ||
134 | POB0: opb { | |
135 | compatible = "ibm,opb-440grx", "ibm,opb"; | |
136 | #address-cells = <1>; | |
137 | #size-cells = <1>; | |
138 | ranges = <00000000 1 00000000 80000000 | |
139 | 80000000 1 80000000 80000000>; | |
140 | interrupt-parent = <&UIC1>; | |
141 | interrupts = <7 4>; | |
142 | clock-frequency = <0>; /* Filled in by zImage */ | |
143 | ||
144 | EBC0: ebc { | |
145 | compatible = "ibm,ebc-440grx", "ibm,ebc"; | |
146 | dcr-reg = <012 2>; | |
147 | #address-cells = <2>; | |
148 | #size-cells = <1>; | |
149 | clock-frequency = <0>; /* Filled in by zImage */ | |
150 | interrupts = <5 1>; | |
151 | interrupt-parent = <&UIC1>; | |
152 | ||
153 | nor_flash@0,0 { | |
154 | compatible = "amd,s29gl256n", "cfi-flash"; | |
155 | bank-width = <2>; | |
156 | reg = <0 000000 4000000>; | |
157 | #address-cells = <1>; | |
158 | #size-cells = <1>; | |
159 | partition@0 { | |
160 | label = "Kernel"; | |
161 | reg = <0 180000>; | |
162 | }; | |
163 | partition@180000 { | |
164 | label = "ramdisk"; | |
165 | reg = <180000 200000>; | |
166 | }; | |
167 | partition@380000 { | |
168 | label = "file system"; | |
169 | reg = <380000 3aa0000>; | |
170 | }; | |
171 | partition@3e20000 { | |
172 | label = "kozio"; | |
173 | reg = <3e20000 140000>; | |
174 | }; | |
175 | partition@3f60000 { | |
176 | label = "env"; | |
177 | reg = <3f60000 40000>; | |
178 | }; | |
179 | partition@3fa0000 { | |
180 | label = "u-boot"; | |
181 | reg = <3fa0000 60000>; | |
182 | }; | |
183 | }; | |
184 | ||
185 | }; | |
186 | ||
187 | UART0: serial@ef600300 { | |
188 | device_type = "serial"; | |
189 | compatible = "ns16550"; | |
190 | reg = <ef600300 8>; | |
191 | virtual-reg = <ef600300>; | |
192 | clock-frequency = <0>; /* Filled in by zImage */ | |
193 | current-speed = <1c200>; | |
194 | interrupt-parent = <&UIC0>; | |
195 | interrupts = <0 4>; | |
196 | }; | |
197 | ||
198 | UART1: serial@ef600400 { | |
199 | device_type = "serial"; | |
200 | compatible = "ns16550"; | |
201 | reg = <ef600400 8>; | |
202 | virtual-reg = <ef600400>; | |
203 | clock-frequency = <0>; | |
204 | current-speed = <0>; | |
205 | interrupt-parent = <&UIC0>; | |
206 | interrupts = <1 4>; | |
207 | }; | |
208 | ||
209 | UART2: serial@ef600500 { | |
210 | device_type = "serial"; | |
211 | compatible = "ns16550"; | |
212 | reg = <ef600500 8>; | |
213 | virtual-reg = <ef600500>; | |
214 | clock-frequency = <0>; | |
215 | current-speed = <0>; | |
216 | interrupt-parent = <&UIC1>; | |
217 | interrupts = <3 4>; | |
218 | }; | |
219 | ||
220 | UART3: serial@ef600600 { | |
221 | device_type = "serial"; | |
222 | compatible = "ns16550"; | |
223 | reg = <ef600600 8>; | |
224 | virtual-reg = <ef600600>; | |
225 | clock-frequency = <0>; | |
226 | current-speed = <0>; | |
227 | interrupt-parent = <&UIC1>; | |
228 | interrupts = <4 4>; | |
229 | }; | |
230 | ||
231 | IIC0: i2c@ef600700 { | |
3910cd8c VB |
232 | compatible = "ibm,iic-440grx", "ibm,iic"; |
233 | reg = <ef600700 14>; | |
234 | interrupt-parent = <&UIC0>; | |
235 | interrupts = <2 4>; | |
236 | }; | |
237 | ||
238 | IIC1: i2c@ef600800 { | |
3910cd8c VB |
239 | compatible = "ibm,iic-440grx", "ibm,iic"; |
240 | reg = <ef600800 14>; | |
241 | interrupt-parent = <&UIC0>; | |
242 | interrupts = <7 4>; | |
243 | }; | |
244 | ||
245 | ZMII0: emac-zmii@ef600d00 { | |
3910cd8c VB |
246 | compatible = "ibm,zmii-440grx", "ibm,zmii"; |
247 | reg = <ef600d00 c>; | |
248 | }; | |
249 | ||
250 | RGMII0: emac-rgmii@ef601000 { | |
3910cd8c VB |
251 | compatible = "ibm,rgmii-440grx", "ibm,rgmii"; |
252 | reg = <ef601000 8>; | |
58c50192 | 253 | has-mdio; |
3910cd8c VB |
254 | }; |
255 | ||
256 | EMAC0: ethernet@ef600e00 { | |
257 | linux,network-index = <0>; | |
258 | device_type = "network"; | |
259 | compatible = "ibm,emac-440grx", "ibm,emac-440epx", "ibm,emac4"; | |
260 | interrupt-parent = <&EMAC0>; | |
261 | interrupts = <0 1>; | |
262 | #interrupt-cells = <1>; | |
263 | #address-cells = <0>; | |
264 | #size-cells = <0>; | |
265 | interrupt-map = </*Status*/ 0 &UIC0 18 4 | |
266 | /*Wake*/ 1 &UIC1 1d 4>; | |
267 | reg = <ef600e00 70>; | |
268 | local-mac-address = [000000000000]; | |
269 | mal-device = <&MAL0>; | |
270 | mal-tx-channel = <0>; | |
271 | mal-rx-channel = <0>; | |
272 | cell-index = <0>; | |
273 | max-frame-size = <5dc>; | |
274 | rx-fifo-size = <1000>; | |
275 | tx-fifo-size = <800>; | |
276 | phy-mode = "rgmii"; | |
277 | phy-map = <00000000>; | |
278 | zmii-device = <&ZMII0>; | |
279 | zmii-channel = <0>; | |
280 | rgmii-device = <&RGMII0>; | |
281 | rgmii-channel = <0>; | |
58c50192 VB |
282 | has-inverted-stacr-oc; |
283 | has-new-stacr-staopc; | |
3910cd8c VB |
284 | }; |
285 | ||
286 | EMAC1: ethernet@ef600f00 { | |
287 | linux,network-index = <1>; | |
288 | device_type = "network"; | |
289 | compatible = "ibm,emac-440grx", "ibm,emac-440epx", "ibm,emac4"; | |
290 | interrupt-parent = <&EMAC1>; | |
291 | interrupts = <0 1>; | |
292 | #interrupt-cells = <1>; | |
293 | #address-cells = <0>; | |
294 | #size-cells = <0>; | |
295 | interrupt-map = </*Status*/ 0 &UIC0 19 4 | |
296 | /*Wake*/ 1 &UIC1 1f 4>; | |
297 | reg = <ef600f00 70>; | |
298 | local-mac-address = [000000000000]; | |
299 | mal-device = <&MAL0>; | |
300 | mal-tx-channel = <1>; | |
301 | mal-rx-channel = <1>; | |
302 | cell-index = <1>; | |
303 | max-frame-size = <5dc>; | |
304 | rx-fifo-size = <1000>; | |
305 | tx-fifo-size = <800>; | |
306 | phy-mode = "rgmii"; | |
307 | phy-map = <00000000>; | |
308 | zmii-device = <&ZMII0>; | |
309 | zmii-channel = <1>; | |
310 | rgmii-device = <&RGMII0>; | |
311 | rgmii-channel = <1>; | |
58c50192 VB |
312 | has-inverted-stacr-oc; |
313 | has-new-stacr-staopc; | |
3910cd8c VB |
314 | }; |
315 | }; | |
0b2e9751 VB |
316 | |
317 | PCI0: pci@1ec000000 { | |
318 | device_type = "pci"; | |
319 | #interrupt-cells = <1>; | |
320 | #size-cells = <2>; | |
321 | #address-cells = <3>; | |
322 | compatible = "ibm,plb440grx-pci", "ibm,plb-pci"; | |
323 | primary; | |
324 | reg = <1 eec00000 8 /* Config space access */ | |
325 | 1 eed00000 4 /* IACK */ | |
326 | 1 eed00000 4 /* Special cycle */ | |
327 | 1 ef400000 40>; /* Internal registers */ | |
328 | ||
329 | /* Outbound ranges, one memory and one IO, | |
330 | * later cannot be changed. Chip supports a second | |
331 | * IO range but we don't use it for now | |
332 | */ | |
333 | ranges = <02000000 0 80000000 1 80000000 0 10000000 | |
334 | 01000000 0 00000000 1 e8000000 0 00100000>; | |
335 | ||
336 | /* Inbound 2GB range starting at 0 */ | |
337 | dma-ranges = <42000000 0 0 0 0 0 80000000>; | |
338 | ||
339 | /* All PCI interrupts are routed to IRQ 67 */ | |
340 | interrupt-map-mask = <0000 0 0 0>; | |
341 | interrupt-map = < 0000 0 0 0 &UIC2 3 8 >; | |
342 | }; | |
3910cd8c VB |
343 | }; |
344 | ||
345 | chosen { | |
346 | linux,stdout-path = "/plb/opb/serial@ef600300"; | |
347 | bootargs = "console=ttyS0,115200"; | |
348 | }; | |
349 | }; |