Commit | Line | Data |
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3de9c9cd BH |
1 | /* |
2 | * Device Tree Source for AMCC Katmai eval board | |
3 | * | |
4 | * Copyright (c) 2006, 2007 IBM Corp. | |
5 | * Benjamin Herrenschmidt <benh@kernel.crashing.org> | |
6 | * | |
7 | * Copyright (c) 2006, 2007 IBM Corp. | |
8 | * Josh Boyer <jwboyer@linux.vnet.ibm.com> | |
9 | * | |
10 | * This file is licensed under the terms of the GNU General Public | |
11 | * License version 2. This program is licensed "as is" without | |
12 | * any warranty of any kind, whether express or implied. | |
13 | */ | |
14 | ||
15 | / { | |
16 | #address-cells = <2>; | |
17 | #size-cells = <1>; | |
18 | model = "amcc,katmai"; | |
19 | compatible = "amcc,katmai"; | |
72fda114 | 20 | dcr-parent = <&/cpus/cpu@0>; |
3de9c9cd | 21 | |
8aaed98c SR |
22 | aliases { |
23 | ethernet0 = &EMAC0; | |
24 | serial0 = &UART0; | |
25 | serial1 = &UART1; | |
26 | serial2 = &UART2; | |
27 | }; | |
28 | ||
3de9c9cd BH |
29 | cpus { |
30 | #address-cells = <1>; | |
31 | #size-cells = <0>; | |
32 | ||
72fda114 | 33 | cpu@0 { |
3de9c9cd | 34 | device_type = "cpu"; |
72fda114 | 35 | model = "PowerPC,440SPe"; |
3de9c9cd BH |
36 | reg = <0>; |
37 | clock-frequency = <0>; /* Filled in by zImage */ | |
38 | timebase-frequency = <0>; /* Filled in by zImage */ | |
39 | i-cache-line-size = <20>; | |
40 | d-cache-line-size = <20>; | |
41 | i-cache-size = <20000>; | |
42 | d-cache-size = <20000>; | |
43 | dcr-controller; | |
44 | dcr-access-method = "native"; | |
45 | }; | |
46 | }; | |
47 | ||
48 | memory { | |
49 | device_type = "memory"; | |
50 | reg = <0 0 0>; /* Filled in by zImage */ | |
51 | }; | |
52 | ||
53 | UIC0: interrupt-controller0 { | |
54 | compatible = "ibm,uic-440spe","ibm,uic"; | |
55 | interrupt-controller; | |
56 | cell-index = <0>; | |
57 | dcr-reg = <0c0 009>; | |
58 | #address-cells = <0>; | |
59 | #size-cells = <0>; | |
60 | #interrupt-cells = <2>; | |
61 | }; | |
62 | ||
63 | UIC1: interrupt-controller1 { | |
64 | compatible = "ibm,uic-440spe","ibm,uic"; | |
65 | interrupt-controller; | |
66 | cell-index = <1>; | |
67 | dcr-reg = <0d0 009>; | |
68 | #address-cells = <0>; | |
69 | #size-cells = <0>; | |
70 | #interrupt-cells = <2>; | |
71 | interrupts = <1e 4 1f 4>; /* cascade */ | |
72 | interrupt-parent = <&UIC0>; | |
73 | }; | |
74 | ||
75 | UIC2: interrupt-controller2 { | |
76 | compatible = "ibm,uic-440spe","ibm,uic"; | |
77 | interrupt-controller; | |
78 | cell-index = <2>; | |
79 | dcr-reg = <0e0 009>; | |
80 | #address-cells = <0>; | |
81 | #size-cells = <0>; | |
82 | #interrupt-cells = <2>; | |
83 | interrupts = <a 4 b 4>; /* cascade */ | |
84 | interrupt-parent = <&UIC0>; | |
85 | }; | |
86 | ||
87 | UIC3: interrupt-controller3 { | |
88 | compatible = "ibm,uic-440spe","ibm,uic"; | |
89 | interrupt-controller; | |
90 | cell-index = <3>; | |
91 | dcr-reg = <0f0 009>; | |
92 | #address-cells = <0>; | |
93 | #size-cells = <0>; | |
94 | #interrupt-cells = <2>; | |
95 | interrupts = <10 4 11 4>; /* cascade */ | |
96 | interrupt-parent = <&UIC0>; | |
97 | }; | |
98 | ||
99 | SDR0: sdr { | |
100 | compatible = "ibm,sdr-440spe"; | |
101 | dcr-reg = <00e 002>; | |
102 | }; | |
103 | ||
104 | CPR0: cpr { | |
105 | compatible = "ibm,cpr-440spe"; | |
106 | dcr-reg = <00c 002>; | |
107 | }; | |
108 | ||
109 | plb { | |
110 | compatible = "ibm,plb-440spe", "ibm,plb-440gp", "ibm,plb4"; | |
111 | #address-cells = <2>; | |
112 | #size-cells = <1>; | |
113 | ranges; | |
114 | clock-frequency = <0>; /* Filled in by zImage */ | |
115 | ||
116 | SDRAM0: sdram { | |
117 | compatible = "ibm,sdram-440spe", "ibm,sdram-405gp"; | |
118 | dcr-reg = <010 2>; | |
119 | }; | |
120 | ||
121 | MAL0: mcmal { | |
122 | compatible = "ibm,mcmal-440spe", "ibm,mcmal2"; | |
123 | dcr-reg = <180 62>; | |
124 | num-tx-chans = <2>; | |
125 | num-rx-chans = <1>; | |
126 | interrupt-parent = <&MAL0>; | |
127 | interrupts = <0 1 2 3 4>; | |
128 | #interrupt-cells = <1>; | |
129 | #address-cells = <0>; | |
130 | #size-cells = <0>; | |
131 | interrupt-map = </*TXEOB*/ 0 &UIC1 6 4 | |
132 | /*RXEOB*/ 1 &UIC1 7 4 | |
133 | /*SERR*/ 2 &UIC1 1 4 | |
134 | /*TXDE*/ 3 &UIC1 2 4 | |
135 | /*RXDE*/ 4 &UIC1 3 4>; | |
136 | }; | |
137 | ||
138 | POB0: opb { | |
139 | compatible = "ibm,opb-440spe", "ibm,opb-440gp", "ibm,opb"; | |
140 | #address-cells = <1>; | |
141 | #size-cells = <1>; | |
142 | ranges = <00000000 4 e0000000 20000000>; | |
143 | clock-frequency = <0>; /* Filled in by zImage */ | |
144 | ||
145 | EBC0: ebc { | |
146 | compatible = "ibm,ebc-440spe", "ibm,ebc-440gp", "ibm,ebc"; | |
147 | dcr-reg = <012 2>; | |
148 | #address-cells = <2>; | |
149 | #size-cells = <1>; | |
150 | clock-frequency = <0>; /* Filled in by zImage */ | |
151 | interrupts = <5 1>; | |
152 | interrupt-parent = <&UIC1>; | |
153 | }; | |
154 | ||
155 | UART0: serial@10000200 { | |
156 | device_type = "serial"; | |
157 | compatible = "ns16550"; | |
158 | reg = <10000200 8>; | |
159 | virtual-reg = <a0000200>; | |
160 | clock-frequency = <0>; /* Filled in by zImage */ | |
161 | current-speed = <1c200>; | |
162 | interrupt-parent = <&UIC0>; | |
163 | interrupts = <0 4>; | |
164 | }; | |
165 | ||
166 | UART1: serial@10000300 { | |
167 | device_type = "serial"; | |
168 | compatible = "ns16550"; | |
169 | reg = <10000300 8>; | |
170 | virtual-reg = <a0000300>; | |
171 | clock-frequency = <0>; | |
172 | current-speed = <0>; | |
173 | interrupt-parent = <&UIC0>; | |
174 | interrupts = <1 4>; | |
175 | }; | |
176 | ||
177 | ||
178 | UART2: serial@10000600 { | |
179 | device_type = "serial"; | |
180 | compatible = "ns16550"; | |
181 | reg = <10000600 8>; | |
182 | virtual-reg = <a0000600>; | |
183 | clock-frequency = <0>; | |
184 | current-speed = <0>; | |
185 | interrupt-parent = <&UIC1>; | |
186 | interrupts = <5 4>; | |
187 | }; | |
188 | ||
189 | IIC0: i2c@10000400 { | |
3de9c9cd BH |
190 | compatible = "ibm,iic-440spe", "ibm,iic-440gp", "ibm,iic"; |
191 | reg = <10000400 14>; | |
192 | interrupt-parent = <&UIC0>; | |
193 | interrupts = <2 4>; | |
194 | }; | |
195 | ||
196 | IIC1: i2c@10000500 { | |
3de9c9cd BH |
197 | compatible = "ibm,iic-440spe", "ibm,iic-440gp", "ibm,iic"; |
198 | reg = <10000500 14>; | |
199 | interrupt-parent = <&UIC0>; | |
200 | interrupts = <3 4>; | |
201 | }; | |
202 | ||
203 | EMAC0: ethernet@10000800 { | |
204 | linux,network-index = <0>; | |
205 | device_type = "network"; | |
206 | compatible = "ibm,emac-440spe", "ibm,emac4"; | |
207 | interrupt-parent = <&UIC1>; | |
208 | interrupts = <1c 4 1d 4>; | |
209 | reg = <10000800 70>; | |
210 | local-mac-address = [000000000000]; | |
211 | mal-device = <&MAL0>; | |
212 | mal-tx-channel = <0>; | |
213 | mal-rx-channel = <0>; | |
214 | cell-index = <0>; | |
215 | max-frame-size = <5dc>; | |
216 | rx-fifo-size = <1000>; | |
217 | tx-fifo-size = <800>; | |
218 | phy-mode = "gmii"; | |
219 | phy-map = <00000000>; | |
220 | has-inverted-stacr-oc; | |
221 | has-new-stacr-staopc; | |
222 | }; | |
223 | }; | |
224 | ||
225 | PCIX0: pci@c0ec00000 { | |
226 | device_type = "pci"; | |
227 | #interrupt-cells = <1>; | |
228 | #size-cells = <2>; | |
229 | #address-cells = <3>; | |
230 | compatible = "ibm,plb-pcix-440spe", "ibm,plb-pcix"; | |
231 | primary; | |
232 | large-inbound-windows; | |
233 | enable-msi-hole; | |
234 | reg = <c 0ec00000 8 /* Config space access */ | |
235 | 0 0 0 /* no IACK cycles */ | |
236 | c 0ed00000 4 /* Special cycles */ | |
237 | c 0ec80000 100 /* Internal registers */ | |
238 | c 0ec80100 fc>; /* Internal messaging registers */ | |
239 | ||
240 | /* Outbound ranges, one memory and one IO, | |
241 | * later cannot be changed | |
242 | */ | |
243 | ranges = <02000000 0 80000000 0000000d 80000000 0 80000000 | |
244 | 01000000 0 00000000 0000000c 08000000 0 00010000>; | |
245 | ||
246 | /* Inbound 2GB range starting at 0 */ | |
247 | dma-ranges = <42000000 0 0 0 0 0 80000000>; | |
248 | ||
249 | /* This drives busses 0 to 0xf */ | |
250 | bus-range = <0 f>; | |
251 | ||
252 | /* | |
253 | * On Katmai, the following PCI-X interrupts signals | |
254 | * have to be enabled via jumpers (only INTA is | |
255 | * enabled per default): | |
256 | * | |
257 | * INTB: J3: 1-2 | |
258 | * INTC: J2: 1-2 | |
259 | * INTD: J1: 1-2 | |
260 | */ | |
261 | interrupt-map-mask = <f800 0 0 7>; | |
262 | interrupt-map = < | |
263 | /* IDSEL 1 */ | |
264 | 0800 0 0 1 &UIC1 14 8 | |
265 | 0800 0 0 2 &UIC1 13 8 | |
266 | 0800 0 0 3 &UIC1 12 8 | |
267 | 0800 0 0 4 &UIC1 11 8 | |
268 | >; | |
269 | }; | |
270 | ||
271 | PCIE0: pciex@d00000000 { | |
272 | device_type = "pci"; | |
273 | #interrupt-cells = <1>; | |
274 | #size-cells = <2>; | |
275 | #address-cells = <3>; | |
accf5ef2 | 276 | compatible = "ibm,plb-pciex-440spe", "ibm,plb-pciex"; |
3de9c9cd BH |
277 | primary; |
278 | port = <0>; /* port number */ | |
279 | reg = <d 00000000 20000000 /* Config space access */ | |
280 | c 10000000 00001000>; /* Registers */ | |
281 | dcr-reg = <100 020>; | |
282 | sdr-base = <300>; | |
283 | ||
284 | /* Outbound ranges, one memory and one IO, | |
285 | * later cannot be changed | |
286 | */ | |
287 | ranges = <02000000 0 80000000 0000000e 00000000 0 80000000 | |
288 | 01000000 0 00000000 0000000f 80000000 0 00010000>; | |
289 | ||
290 | /* Inbound 2GB range starting at 0 */ | |
291 | dma-ranges = <42000000 0 0 0 0 0 80000000>; | |
292 | ||
293 | /* This drives busses 10 to 0x1f */ | |
294 | bus-range = <10 1f>; | |
295 | ||
296 | /* Legacy interrupts (note the weird polarity, the bridge seems | |
297 | * to invert PCIe legacy interrupts). | |
298 | * We are de-swizzling here because the numbers are actually for | |
299 | * port of the root complex virtual P2P bridge. But I want | |
300 | * to avoid putting a node for it in the tree, so the numbers | |
301 | * below are basically de-swizzled numbers. | |
302 | * The real slot is on idsel 0, so the swizzling is 1:1 | |
303 | */ | |
304 | interrupt-map-mask = <0000 0 0 7>; | |
305 | interrupt-map = < | |
306 | 0000 0 0 1 &UIC3 0 4 /* swizzled int A */ | |
307 | 0000 0 0 2 &UIC3 1 4 /* swizzled int B */ | |
308 | 0000 0 0 3 &UIC3 2 4 /* swizzled int C */ | |
309 | 0000 0 0 4 &UIC3 3 4 /* swizzled int D */>; | |
310 | }; | |
311 | ||
312 | PCIE1: pciex@d20000000 { | |
313 | device_type = "pci"; | |
314 | #interrupt-cells = <1>; | |
315 | #size-cells = <2>; | |
316 | #address-cells = <3>; | |
accf5ef2 | 317 | compatible = "ibm,plb-pciex-440spe", "ibm,plb-pciex"; |
3de9c9cd BH |
318 | primary; |
319 | port = <1>; /* port number */ | |
320 | reg = <d 20000000 20000000 /* Config space access */ | |
321 | c 10001000 00001000>; /* Registers */ | |
322 | dcr-reg = <120 020>; | |
323 | sdr-base = <340>; | |
324 | ||
325 | /* Outbound ranges, one memory and one IO, | |
326 | * later cannot be changed | |
327 | */ | |
328 | ranges = <02000000 0 80000000 0000000e 80000000 0 80000000 | |
329 | 01000000 0 00000000 0000000f 80010000 0 00010000>; | |
330 | ||
331 | /* Inbound 2GB range starting at 0 */ | |
332 | dma-ranges = <42000000 0 0 0 0 0 80000000>; | |
333 | ||
334 | /* This drives busses 10 to 0x1f */ | |
335 | bus-range = <20 2f>; | |
336 | ||
337 | /* Legacy interrupts (note the weird polarity, the bridge seems | |
338 | * to invert PCIe legacy interrupts). | |
339 | * We are de-swizzling here because the numbers are actually for | |
340 | * port of the root complex virtual P2P bridge. But I want | |
341 | * to avoid putting a node for it in the tree, so the numbers | |
342 | * below are basically de-swizzled numbers. | |
343 | * The real slot is on idsel 0, so the swizzling is 1:1 | |
344 | */ | |
345 | interrupt-map-mask = <0000 0 0 7>; | |
346 | interrupt-map = < | |
347 | 0000 0 0 1 &UIC3 4 4 /* swizzled int A */ | |
348 | 0000 0 0 2 &UIC3 5 4 /* swizzled int B */ | |
349 | 0000 0 0 3 &UIC3 6 4 /* swizzled int C */ | |
350 | 0000 0 0 4 &UIC3 7 4 /* swizzled int D */>; | |
351 | }; | |
352 | ||
353 | PCIE2: pciex@d40000000 { | |
354 | device_type = "pci"; | |
355 | #interrupt-cells = <1>; | |
356 | #size-cells = <2>; | |
357 | #address-cells = <3>; | |
accf5ef2 | 358 | compatible = "ibm,plb-pciex-440spe", "ibm,plb-pciex"; |
3de9c9cd BH |
359 | primary; |
360 | port = <2>; /* port number */ | |
361 | reg = <d 40000000 20000000 /* Config space access */ | |
362 | c 10002000 00001000>; /* Registers */ | |
363 | dcr-reg = <140 020>; | |
364 | sdr-base = <370>; | |
365 | ||
366 | /* Outbound ranges, one memory and one IO, | |
367 | * later cannot be changed | |
368 | */ | |
369 | ranges = <02000000 0 80000000 0000000f 00000000 0 80000000 | |
370 | 01000000 0 00000000 0000000f 80020000 0 00010000>; | |
371 | ||
372 | /* Inbound 2GB range starting at 0 */ | |
373 | dma-ranges = <42000000 0 0 0 0 0 80000000>; | |
374 | ||
375 | /* This drives busses 10 to 0x1f */ | |
376 | bus-range = <30 3f>; | |
377 | ||
378 | /* Legacy interrupts (note the weird polarity, the bridge seems | |
379 | * to invert PCIe legacy interrupts). | |
380 | * We are de-swizzling here because the numbers are actually for | |
381 | * port of the root complex virtual P2P bridge. But I want | |
382 | * to avoid putting a node for it in the tree, so the numbers | |
383 | * below are basically de-swizzled numbers. | |
384 | * The real slot is on idsel 0, so the swizzling is 1:1 | |
385 | */ | |
386 | interrupt-map-mask = <0000 0 0 7>; | |
387 | interrupt-map = < | |
388 | 0000 0 0 1 &UIC3 8 4 /* swizzled int A */ | |
389 | 0000 0 0 2 &UIC3 9 4 /* swizzled int B */ | |
390 | 0000 0 0 3 &UIC3 a 4 /* swizzled int C */ | |
391 | 0000 0 0 4 &UIC3 b 4 /* swizzled int D */>; | |
392 | }; | |
393 | }; | |
394 | ||
395 | chosen { | |
396 | linux,stdout-path = "/plb/opb/serial@10000200"; | |
397 | }; | |
398 | }; |