[GitHub/mt8127/android_kernel_alcatel_ttab.git] / arch / powerpc / boot / dts / ebony.dts

/*
 * Device Tree Source for IBM Ebony
 *
 * Copyright (c) 2006, 2007 IBM Corp.
 * Josh Boyer <jwboyer@linux.vnet.ibm.com>, David Gibson <dwg@au1.ibm.com>
 *
 * FIXME: Draft only!
 *
 * This file is licensed under the terms of the GNU General Public
 * License version 2.  This program is licensed "as is" without
 * any warranty of any kind, whether express or implied.
 */

/ {
	#address-cells = <2>;
	#size-cells = <1>;
	model = "ibm,ebony";
	compatible = "ibm,ebony";
	dcr-parent = <&/cpus/cpu@0>;

	aliases {
		ethernet0 = &EMAC0;
		ethernet1 = &EMAC1;
		serial0 = &UART0;
		serial1 = &UART1;
	};

	cpus {
		#address-cells = <1>;
		#size-cells = <0>;

		cpu@0 {
			device_type = "cpu";
			model = "PowerPC,440GP";
			reg = <0>;
			clock-frequency = <0>; // Filled in by zImage
			timebase-frequency = <0>; // Filled in by zImage
			i-cache-line-size = <20>;
			d-cache-line-size = <20>;
			i-cache-size = <8000>; /* 32 kB */
			d-cache-size = <8000>; /* 32 kB */
			dcr-controller;
			dcr-access-method = "native";
		};
	};

	memory {
		device_type = "memory";
		reg = <0 0 0>; // Filled in by zImage
	};

	UIC0: interrupt-controller0 {
		compatible = "ibm,uic-440gp", "ibm,uic";
		interrupt-controller;
		cell-index = <0>;
		dcr-reg = <0c0 009>;
		#address-cells = <0>;
		#size-cells = <0>;
		#interrupt-cells = <2>;

	};

	UIC1: interrupt-controller1 {
		compatible = "ibm,uic-440gp", "ibm,uic";
		interrupt-controller;
		cell-index = <1>;
		dcr-reg = <0d0 009>;
		#address-cells = <0>;
		#size-cells = <0>;
		#interrupt-cells = <2>;
		interrupts = <1e 4 1f 4>; /* cascade */
		interrupt-parent = <&UIC0>;
	};

	CPC0: cpc {
		compatible = "ibm,cpc-440gp";
		dcr-reg = <0b0 003 0e0 010>;
		// FIXME: anything else?
	};

	plb {
		compatible = "ibm,plb-440gp", "ibm,plb4";
		#address-cells = <2>;
		#size-cells = <1>;
		ranges;
		clock-frequency = <0>; // Filled in by zImage

		SDRAM0: memory-controller {
			compatible = "ibm,sdram-440gp";
			dcr-reg = <010 2>;
			// FIXME: anything else?
		};

		SRAM0: sram {
			compatible = "ibm,sram-440gp";
			dcr-reg = <020 8 00a 1>;
		};

		DMA0: dma {
			// FIXME: ???
			compatible = "ibm,dma-440gp";
			dcr-reg = <100 027>;
		};

		MAL0: mcmal {
			compatible = "ibm,mcmal-440gp", "ibm,mcmal";
			dcr-reg = <180 62>;
			num-tx-chans = <4>;
			num-rx-chans = <4>;
			interrupt-parent = <&MAL0>;
			interrupts = <0 1 2 3 4>;
			#interrupt-cells = <1>;
			#address-cells = <0>;
			#size-cells = <0>;
			interrupt-map = </*TXEOB*/ 0 &UIC0 a 4
					 /*RXEOB*/ 1 &UIC0 b 4
					 /*SERR*/  2 &UIC1 0 4
					 /*TXDE*/  3 &UIC1 1 4
					 /*RXDE*/  4 &UIC1 2 4>;
			interrupt-map-mask = <ffffffff>;
		};

		POB0: opb {
			compatible = "ibm,opb-440gp", "ibm,opb";
			#address-cells = <1>;
			#size-cells = <1>;
			/* Wish there was a nicer way of specifying a full 32-bit
			   range */
			ranges = <00000000 1 00000000 80000000
				  80000000 1 80000000 80000000>;
			dcr-reg = <090 00b>;
			interrupt-parent = <&UIC1>;
			interrupts = <7 4>;
			clock-frequency = <0>; // Filled in by zImage

			EBC0: ebc {
				compatible = "ibm,ebc-440gp", "ibm,ebc";
				dcr-reg = <012 2>;
				#address-cells = <2>;
				#size-cells = <1>;
				clock-frequency = <0>; // Filled in by zImage
				// ranges property is supplied by zImage
				// based on firmware's configuration of the
				// EBC bridge
				interrupts = <5 4>;
				interrupt-parent = <&UIC1>;

				small-flash@0,80000 {
					compatible = "jedec-flash";
					bank-width = <1>;
					reg = <0 80000 80000>;
					#address-cells = <1>;
					#size-cells = <1>;
					partition@0 {
						label = "OpenBIOS";
						reg = <0 80000>;
						read-only;
					};
				};

				nvram@1,0 {
					/* NVRAM & RTC */
					compatible = "ds1743-nvram";
					#bytes = <2000>;
					reg = <1 0 2000>;
				};

				large-flash@2,0 {
					compatible = "jedec-flash";
					bank-width = <1>;
					reg = <2 0 400000>;
					#address-cells = <1>;
					#size-cells = <1>;
					partition@0 {
						label = "fs";
						reg = <0 380000>;
					};
					partition@380000 {
						label = "firmware";
						reg = <380000 80000>;
					};
				};

				ir@3,0 {
					reg = <3 0 10>;
				};

				fpga@7,0 {
					compatible = "Ebony-FPGA";
					reg = <7 0 10>;
					virtual-reg = <e8300000>;
				};
			};

			UART0: serial@40000200 {
				device_type = "serial";
				compatible = "ns16550";
				reg = <40000200 8>;
				virtual-reg = <e0000200>;
				clock-frequency = <A8C000>;
				current-speed = <2580>;
				interrupt-parent = <&UIC0>;
				interrupts = <0 4>;
			};

			UART1: serial@40000300 {
				device_type = "serial";
				compatible = "ns16550";
				reg = <40000300 8>;
				virtual-reg = <e0000300>;
				clock-frequency = <A8C000>;
				current-speed = <2580>;
				interrupt-parent = <&UIC0>;
				interrupts = <1 4>;
			};

			IIC0: i2c@40000400 {
				/* FIXME */
				compatible = "ibm,iic-440gp", "ibm,iic";
				reg = <40000400 14>;
				interrupt-parent = <&UIC0>;
				interrupts = <2 4>;
			};
			IIC1: i2c@40000500 {
				/* FIXME */
				compatible = "ibm,iic-440gp", "ibm,iic";
				reg = <40000500 14>;
				interrupt-parent = <&UIC0>;
				interrupts = <3 4>;
			};

			GPIO0: gpio@40000700 {
				/* FIXME */
				compatible = "ibm,gpio-440gp";
				reg = <40000700 20>;
			};

			ZMII0: emac-zmii@40000780 {
				compatible = "ibm,zmii-440gp", "ibm,zmii";
				reg = <40000780 c>;
			};

			EMAC0: ethernet@40000800 {
				linux,network-index = <0>;
				device_type = "network";
				compatible = "ibm,emac-440gp", "ibm,emac";
				interrupt-parent = <&UIC1>;
				interrupts = <1c 4 1d 4>;
				reg = <40000800 70>;
				local-mac-address = [000000000000]; // Filled in by zImage
				mal-device = <&MAL0>;
				mal-tx-channel = <0 1>;
				mal-rx-channel = <0>;
				cell-index = <0>;
				max-frame-size = <5dc>;
				rx-fifo-size = <1000>;
				tx-fifo-size = <800>;
				phy-mode = "rmii";
				phy-map = <00000001>;
				zmii-device = <&ZMII0>;
				zmii-channel = <0>;
			};
			EMAC1: ethernet@40000900 {
				linux,network-index = <1>;
				device_type = "network";
				compatible = "ibm,emac-440gp", "ibm,emac";
				interrupt-parent = <&UIC1>;
				interrupts = <1e 4 1f 4>;
				reg = <40000900 70>;
				local-mac-address = [000000000000]; // Filled in by zImage
				mal-device = <&MAL0>;
				mal-tx-channel = <2 3>;
				mal-rx-channel = <1>;
				cell-index = <1>;
				max-frame-size = <5dc>;
				rx-fifo-size = <1000>;
				tx-fifo-size = <800>;
				phy-mode = "rmii";
				phy-map = <00000001>;
				zmii-device = <&ZMII0>;
				zmii-channel = <1>;
			};


			GPT0: gpt@40000a00 {
				/* FIXME */
				reg = <40000a00 d4>;
				interrupt-parent = <&UIC0>;
				interrupts = <12 4 13 4 14 4 15 4 16 4>;
			};

		};

		PCIX0: pci@20ec00000 {
			device_type = "pci";
			#interrupt-cells = <1>;
			#size-cells = <2>;
			#address-cells = <3>;
			compatible = "ibm,plb440gp-pcix", "ibm,plb-pcix";
			primary;
			reg = <2 0ec00000 8	/* Config space access */
			       0 0 0		/* no IACK cycles */
			       2 0ed00000 4     /* Special cycles */
			       2 0ec80000 f0	/* Internal registers */
			       2 0ec80100 fc>;	/* Internal messaging registers */

			/* Outbound ranges, one memory and one IO,
			 * later cannot be changed
			 */
			ranges = <02000000 0 80000000 00000003 80000000 0 80000000
				  01000000 0 00000000 00000002 08000000 0 00010000>;

			/* Inbound 2GB range starting at 0 */
			dma-ranges = <42000000 0 0 0 0 0 80000000>;

			/* Ebony has all 4 IRQ pins tied together per slot */
			interrupt-map-mask = <f800 0 0 0>;
			interrupt-map = <
				/* IDSEL 1 */
				0800 0 0 0 &UIC0 17 8

				/* IDSEL 2 */
				1000 0 0 0 &UIC0 18 8

				/* IDSEL 3 */
				1800 0 0 0 &UIC0 19 8

				/* IDSEL 4 */
				2000 0 0 0 &UIC0 1a 8
			>;
		};
	};

	chosen {
		linux,stdout-path = "/plb/opb/serial@40000200";
	};
};
Commit	Line	Data
ea20ff5d DG	1	/*
	2	* Device Tree Source for IBM Ebony
	3	*
	4	* Copyright (c) 2006, 2007 IBM Corp.
	5	* Josh Boyer <jwboyer@linux.vnet.ibm.com>, David Gibson <dwg@au1.ibm.com>
	6	*
	7	* FIXME: Draft only!
	8	*
	9	* This file is licensed under the terms of the GNU General Public
	10	* License version 2. This program is licensed "as is" without
	11	* any warranty of any kind, whether express or implied.
ea20ff5d DG	12	*/
	13
	14	/ {
	15	#address-cells = <2>;
	16	#size-cells = <1>;
	17	model = "ibm,ebony";
	18	compatible = "ibm,ebony";
72fda114	19	dcr-parent = <&/cpus/cpu@0>;
8aaed98c SR	20
	21	aliases {
	22	ethernet0 = &EMAC0;
	23	ethernet1 = &EMAC1;
	24	serial0 = &UART0;
	25	serial1 = &UART1;
	26	};
ea20ff5d DG	27
	28	cpus {
	29	#address-cells = <1>;
	30	#size-cells = <0>;
	31
72fda114	32	cpu@0 {
ea20ff5d	33	device_type = "cpu";
72fda114	34	model = "PowerPC,440GP";
ea20ff5d DG	35	reg = <0>;
	36	clock-frequency = <0>; // Filled in by zImage
	37	timebase-frequency = <0>; // Filled in by zImage
8203c17e LY	38	i-cache-line-size = <20>;
8203c17e LY	39	d-cache-line-size = <20>;
c72ea777 DG	40	i-cache-size = <8000>; /* 32 kB */
c72ea777 DG	41	d-cache-size = <8000>; /* 32 kB */
ea20ff5d DG	42	dcr-controller;
	43	dcr-access-method = "native";
	44	};
	45	};
	46
	47	memory {
	48	device_type = "memory";
	49	reg = <0 0 0>; // Filled in by zImage
	50	};
	51
	52	UIC0: interrupt-controller0 {
ea20ff5d DG	53	compatible = "ibm,uic-440gp", "ibm,uic";
	54	interrupt-controller;
	55	cell-index = <0>;
	56	dcr-reg = <0c0 009>;
	57	#address-cells = <0>;
	58	#size-cells = <0>;
	59	#interrupt-cells = <2>;
	60
	61	};
	62
	63	UIC1: interrupt-controller1 {
ea20ff5d DG	64	compatible = "ibm,uic-440gp", "ibm,uic";
	65	interrupt-controller;
	66	cell-index = <1>;
	67	dcr-reg = <0d0 009>;
	68	#address-cells = <0>;
	69	#size-cells = <0>;
	70	#interrupt-cells = <2>;
	71	interrupts = <1e 4 1f 4>; /* cascade */
	72	interrupt-parent = <&UIC0>;
	73	};
	74
	75	CPC0: cpc {
ea20ff5d DG	76	compatible = "ibm,cpc-440gp";
	77	dcr-reg = <0b0 003 0e0 010>;
	78	// FIXME: anything else?
	79	};
	80
	81	plb {
ea20ff5d DG	82	compatible = "ibm,plb-440gp", "ibm,plb4";
	83	#address-cells = <2>;
	84	#size-cells = <1>;
	85	ranges;
	86	clock-frequency = <0>; // Filled in by zImage
	87
c72ea777 DG	88	SDRAM0: memory-controller {
c72ea777 DG	89	compatible = "ibm,sdram-440gp";
ea20ff5d DG	90	dcr-reg = <010 2>;
	91	// FIXME: anything else?
	92	};
	93
c72ea777 DG	94	SRAM0: sram {
	95	compatible = "ibm,sram-440gp";
	96	dcr-reg = <020 8 00a 1>;
	97	};
	98
ea20ff5d DG	99	DMA0: dma {
ea20ff5d DG	100	// FIXME: ???
c72ea777	101	compatible = "ibm,dma-440gp";
ea20ff5d DG	102	dcr-reg = <100 027>;
	103	};
	104
	105	MAL0: mcmal {
ea20ff5d DG	106	compatible = "ibm,mcmal-440gp", "ibm,mcmal";
	107	dcr-reg = <180 62>;
	108	num-tx-chans = <4>;
	109	num-rx-chans = <4>;
	110	interrupt-parent = <&MAL0>;
	111	interrupts = <0 1 2 3 4>;
	112	#interrupt-cells = <1>;
	113	#address-cells = <0>;
	114	#size-cells = <0>;
	115	interrupt-map = </TXEOB/ 0 &UIC0 a 4
	116	/RXEOB/ 1 &UIC0 b 4
	117	/SERR/ 2 &UIC1 0 4
	118	/TXDE/ 3 &UIC1 1 4
	119	/RXDE/ 4 &UIC1 2 4>;
	120	interrupt-map-mask = <ffffffff>;
	121	};
	122
	123	POB0: opb {
ea20ff5d DG	124	compatible = "ibm,opb-440gp", "ibm,opb";
	125	#address-cells = <1>;
	126	#size-cells = <1>;
	127	/* Wish there was a nicer way of specifying a full 32-bit
	128	range */
	129	ranges = <00000000 1 00000000 80000000
	130	80000000 1 80000000 80000000>;
	131	dcr-reg = <090 00b>;
	132	interrupt-parent = <&UIC1>;
	133	interrupts = <7 4>;
	134	clock-frequency = <0>; // Filled in by zImage
	135
	136	EBC0: ebc {
c72ea777	137	compatible = "ibm,ebc-440gp", "ibm,ebc";
ea20ff5d DG	138	dcr-reg = <012 2>;
	139	#address-cells = <2>;
	140	#size-cells = <1>;
	141	clock-frequency = <0>; // Filled in by zImage
b2ba34f3 DG	142	// ranges property is supplied by zImage
	143	// based on firmware's configuration of the
	144	// EBC bridge
ea20ff5d DG	145	interrupts = <5 4>;
	146	interrupt-parent = <&UIC1>;
	147
c72ea777	148	small-flash@0,80000 {
2099172d	149	compatible = "jedec-flash";
ea20ff5d	150	bank-width = <1>;
ea20ff5d	151	reg = <0 80000 80000>;
2099172d DG	152	#address-cells = <1>;
	153	#size-cells = <1>;
	154	partition@0 {
	155	label = "OpenBIOS";
	156	reg = <0 80000>;
	157	read-only;
	158	};
ea20ff5d DG	159	};
ea20ff5d DG	160
22258fa4	161	nvram@1,0 {
ea20ff5d	162	/* NVRAM & RTC */
22258fa4 DG	163	compatible = "ds1743-nvram";
22258fa4 DG	164	#bytes = <2000>;
ea20ff5d DG	165	reg = <1 0 2000>;
	166	};
	167
	168	large-flash@2,0 {
2099172d	169	compatible = "jedec-flash";
ea20ff5d	170	bank-width = <1>;
ea20ff5d	171	reg = <2 0 400000>;
2099172d DG	172	#address-cells = <1>;
	173	#size-cells = <1>;
	174	partition@0 {
	175	label = "fs";
	176	reg = <0 380000>;
	177	};
	178	partition@380000 {
	179	label = "firmware";
	180	reg = <380000 80000>;
	181	};
ea20ff5d DG	182	};
	183
	184	ir@3,0 {
	185	reg = <3 0 10>;
	186	};
	187
	188	fpga@7,0 {
	189	compatible = "Ebony-FPGA";
	190	reg = <7 0 10>;
0d279d47	191	virtual-reg = <e8300000>;
ea20ff5d DG	192	};
	193	};
	194
	195	UART0: serial@40000200 {
	196	device_type = "serial";
	197	compatible = "ns16550";
	198	reg = <40000200 8>;
	199	virtual-reg = <e0000200>;
	200	clock-frequency = <A8C000>;
	201	current-speed = <2580>;
	202	interrupt-parent = <&UIC0>;
	203	interrupts = <0 4>;
	204	};
	205
	206	UART1: serial@40000300 {
	207	device_type = "serial";
	208	compatible = "ns16550";
	209	reg = <40000300 8>;
	210	virtual-reg = <e0000300>;
	211	clock-frequency = <A8C000>;
	212	current-speed = <2580>;
	213	interrupt-parent = <&UIC0>;
	214	interrupts = <1 4>;
	215	};
	216
	217	IIC0: i2c@40000400 {
	218	/* FIXME */
ea20ff5d DG	219	compatible = "ibm,iic-440gp", "ibm,iic";
	220	reg = <40000400 14>;
	221	interrupt-parent = <&UIC0>;
	222	interrupts = <2 4>;
	223	};
	224	IIC1: i2c@40000500 {
	225	/* FIXME */
ea20ff5d DG	226	compatible = "ibm,iic-440gp", "ibm,iic";
	227	reg = <40000500 14>;
	228	interrupt-parent = <&UIC0>;
	229	interrupts = <3 4>;
	230	};
	231
	232	GPIO0: gpio@40000700 {
	233	/* FIXME */
ea20ff5d DG	234	compatible = "ibm,gpio-440gp";
	235	reg = <40000700 20>;
	236	};
	237
	238	ZMII0: emac-zmii@40000780 {
ea20ff5d DG	239	compatible = "ibm,zmii-440gp", "ibm,zmii";
	240	reg = <40000780 c>;
	241	};
	242
	243	EMAC0: ethernet@40000800 {
	244	linux,network-index = <0>;
	245	device_type = "network";
	246	compatible = "ibm,emac-440gp", "ibm,emac";
	247	interrupt-parent = <&UIC1>;
	248	interrupts = <1c 4 1d 4>;
	249	reg = <40000800 70>;
	250	local-mac-address = [000000000000]; // Filled in by zImage
	251	mal-device = <&MAL0>;
	252	mal-tx-channel = <0 1>;
	253	mal-rx-channel = <0>;
	254	cell-index = <0>;
	255	max-frame-size = <5dc>;
	256	rx-fifo-size = <1000>;
	257	tx-fifo-size = <800>;
	258	phy-mode = "rmii";
	259	phy-map = <00000001>;
	260	zmii-device = <&ZMII0>;
	261	zmii-channel = <0>;
	262	};
	263	EMAC1: ethernet@40000900 {
	264	linux,network-index = <1>;
	265	device_type = "network";
	266	compatible = "ibm,emac-440gp", "ibm,emac";
	267	interrupt-parent = <&UIC1>;
	268	interrupts = <1e 4 1f 4>;
	269	reg = <40000900 70>;
	270	local-mac-address = [000000000000]; // Filled in by zImage
	271	mal-device = <&MAL0>;
	272	mal-tx-channel = <2 3>;
	273	mal-rx-channel = <1>;
	274	cell-index = <1>;
	275	max-frame-size = <5dc>;
	276	rx-fifo-size = <1000>;
	277	tx-fifo-size = <800>;
	278	phy-mode = "rmii";
	279	phy-map = <00000001>;
	280	zmii-device = <&ZMII0>;
	281	zmii-channel = <1>;
	282	};
	283
	284
	285	GPT0: gpt@40000a00 {
	286	/* FIXME */
	287	reg = <40000a00 d4>;
	288	interrupt-parent = <&UIC0>;
	289	interrupts = <12 4 13 4 14 4 15 4 16 4>;
	290	};
	291
	292	};
	293
69c07851	294	PCIX0: pci@20ec00000 {
ea20ff5d	295	device_type = "pci";
69c07851 BH	296	#interrupt-cells = <1>;
	297	#size-cells = <2>;
	298	#address-cells = <3>;
	299	compatible = "ibm,plb440gp-pcix", "ibm,plb-pcix";
	300	primary;
	301	reg = <2 0ec00000 8 /* Config space access */
	302	0 0 0 /* no IACK cycles */
	303	2 0ed00000 4 /* Special cycles */
	304	2 0ec80000 f0 /* Internal registers */
	305	2 0ec80100 fc>; /* Internal messaging registers */
	306
	307	/* Outbound ranges, one memory and one IO,
	308	* later cannot be changed
	309	*/
	310	ranges = <02000000 0 80000000 00000003 80000000 0 80000000
	311	01000000 0 00000000 00000002 08000000 0 00010000>;
	312
	313	/* Inbound 2GB range starting at 0 */
	314	dma-ranges = <42000000 0 0 0 0 0 80000000>;
	315
	316	/* Ebony has all 4 IRQ pins tied together per slot */
	317	interrupt-map-mask = <f800 0 0 0>;
	318	interrupt-map = <
	319	/* IDSEL 1 */
	320	0800 0 0 0 &UIC0 17 8
	321
	322	/* IDSEL 2 */
	323	1000 0 0 0 &UIC0 18 8
	324
	325	/* IDSEL 3 */
	326	1800 0 0 0 &UIC0 19 8
	327
	328	/* IDSEL 4 */
	329	2000 0 0 0 &UIC0 1a 8
	330	>;
ea20ff5d DG	331	};
	332	};
	333
	334	chosen {
	335	linux,stdout-path = "/plb/opb/serial@40000200";
ea20ff5d DG	336	};
ea20ff5d DG	337	};