projects / GitHub / moto-9609 / android_kernel_motorola_exynos9610.git / blame
| Commit | Line | Data |
|---|---|---|
| b2441318 | 1 | /* SPDX-License-Identifier: GPL-2.0 */ |
| 4068d93c KM |
2 | /* |
| 3 | * include/asm-parisc/prefetch.h | |
| 4 | * | |
| 5 | * PA 2.0 defines data prefetch instructions on page 6-11 of the Kane book. | |
| 6 | * In addition, many implementations do hardware prefetching of both | |
| 7 | * instructions and data. | |
| 8 | * | |
| 9 | * PA7300LC (page 14-4 of the ERS) also implements prefetching by a load | |
| 10 | * to gr0 but not in a way that Linux can use. If the load would cause an | |
| 11 | * interruption (eg due to prefetching 0), it is suppressed on PA2.0 | |
| 12 | * processors, but not on 7300LC. | |
| 13 | * | |
| 14 | */ | |
| 15 | ||
| 16 | #ifndef __ASM_PARISC_PREFETCH_H | |
| 17 | #define __ASM_PARISC_PREFETCH_H | |
| 18 | ||
| 19 | #ifndef __ASSEMBLY__ | |
| 20 | #ifdef CONFIG_PREFETCH | |
| 21 | ||
| 22 | #define ARCH_HAS_PREFETCH | |
| f13cec84 | 23 | static inline void prefetch(const void *addr) |
| 4068d93c | 24 | { |
| b3cb8674 JB |
25 | __asm__( |
| 26 | #ifndef CONFIG_PA20 | |
| 27 | /* Need to avoid prefetch of NULL on PA7300LC */ | |
| 28 | " extrw,u,= %0,31,32,%%r0\n" | |
| 29 | #endif | |
| 30 | " ldw 0(%0), %%r0" : : "r" (addr)); | |
| 4068d93c KM |
31 | } |
| 32 | ||
| 32104b29 KM |
33 | /* LDD is a PA2.0 addition. */ |
| 34 | #ifdef CONFIG_PA20 | |
| 4068d93c | 35 | #define ARCH_HAS_PREFETCHW |
| f13cec84 | 36 | static inline void prefetchw(const void *addr) |
| 4068d93c KM |
37 | { |
| 38 | __asm__("ldd 0(%0), %%r0" : : "r" (addr)); | |
| 39 | } | |
| 32104b29 | 40 | #endif /* CONFIG_PA20 */ |
| 4068d93c KM |
41 | |
| 42 | #endif /* CONFIG_PREFETCH */ | |
| 43 | #endif /* __ASSEMBLY__ */ | |
| 44 | ||
| 45 | #endif /* __ASM_PARISC_PROCESSOR_H */ |