Commit | Line | Data |
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b2441318 | 1 | /* SPDX-License-Identifier: GPL-2.0 */ |
1da177e4 LT |
2 | #ifndef _PARISC_CACHEFLUSH_H |
3 | #define _PARISC_CACHEFLUSH_H | |
4 | ||
1da177e4 | 5 | #include <linux/mm.h> |
210501aa | 6 | #include <linux/uaccess.h> |
b7d45818 | 7 | #include <asm/tlbflush.h> |
1da177e4 LT |
8 | |
9 | /* The usual comment is "Caches aren't brain-dead on the <architecture>". | |
10 | * Unfortunately, that doesn't apply to PA-RISC. */ | |
11 | ||
d6ce8626 RC |
12 | /* Internal implementation */ |
13 | void flush_data_cache_local(void *); /* flushes local data-cache only */ | |
14 | void flush_instruction_cache_local(void *); /* flushes local code-cache only */ | |
1da177e4 | 15 | #ifdef CONFIG_SMP |
d6ce8626 RC |
16 | void flush_data_cache(void); /* flushes data-cache only (all processors) */ |
17 | void flush_instruction_cache(void); /* flushes i-cache only (all processors) */ | |
1da177e4 | 18 | #else |
d6ce8626 RC |
19 | #define flush_data_cache() flush_data_cache_local(NULL) |
20 | #define flush_instruction_cache() flush_instruction_cache_local(NULL) | |
1da177e4 LT |
21 | #endif |
22 | ||
ec8c0446 RB |
23 | #define flush_cache_dup_mm(mm) flush_cache_mm(mm) |
24 | ||
d6ce8626 RC |
25 | void flush_user_icache_range_asm(unsigned long, unsigned long); |
26 | void flush_kernel_icache_range_asm(unsigned long, unsigned long); | |
27 | void flush_user_dcache_range_asm(unsigned long, unsigned long); | |
28 | void flush_kernel_dcache_range_asm(unsigned long, unsigned long); | |
dabf8905 | 29 | void purge_kernel_dcache_range_asm(unsigned long, unsigned long); |
d6ce8626 RC |
30 | void flush_kernel_dcache_page_asm(void *); |
31 | void flush_kernel_icache_page(void *); | |
1da177e4 | 32 | |
d6ce8626 | 33 | /* Cache flush operations */ |
1da177e4 | 34 | |
d6ce8626 RC |
35 | void flush_cache_all_local(void); |
36 | void flush_cache_all(void); | |
37 | void flush_cache_mm(struct mm_struct *mm); | |
1da177e4 | 38 | |
8e1964a9 JB |
39 | #define ARCH_HAS_FLUSH_KERNEL_DCACHE_PAGE |
40 | void flush_kernel_dcache_page_addr(void *addr); | |
41 | static inline void flush_kernel_dcache_page(struct page *page) | |
42 | { | |
43 | flush_kernel_dcache_page_addr(page_address(page)); | |
44 | } | |
45 | ||
d6ce8626 RC |
46 | #define flush_kernel_dcache_range(start,size) \ |
47 | flush_kernel_dcache_range_asm((start), (start)+(size)); | |
8e1964a9 | 48 | |
316ec062 JDA |
49 | void flush_kernel_vmap_range(void *vaddr, int size); |
50 | void invalidate_kernel_vmap_range(void *vaddr, int size); | |
1da177e4 LT |
51 | |
52 | #define flush_cache_vmap(start, end) flush_cache_all() | |
53 | #define flush_cache_vunmap(start, end) flush_cache_all() | |
54 | ||
2d4dc890 | 55 | #define ARCH_IMPLEMENTS_FLUSH_DCACHE_PAGE 1 |
1da177e4 LT |
56 | extern void flush_dcache_page(struct page *page); |
57 | ||
58 | #define flush_dcache_mmap_lock(mapping) \ | |
19fd6231 | 59 | spin_lock_irq(&(mapping)->tree_lock) |
1da177e4 | 60 | #define flush_dcache_mmap_unlock(mapping) \ |
19fd6231 | 61 | spin_unlock_irq(&(mapping)->tree_lock) |
1da177e4 | 62 | |
d6ce8626 RC |
63 | #define flush_icache_page(vma,page) do { \ |
64 | flush_kernel_dcache_page(page); \ | |
65 | flush_kernel_icache_page(page_address(page)); \ | |
66 | } while (0) | |
1da177e4 | 67 | |
d6ce8626 RC |
68 | #define flush_icache_range(s,e) do { \ |
69 | flush_kernel_dcache_range_asm(s,e); \ | |
70 | flush_kernel_icache_range_asm(s,e); \ | |
71 | } while (0) | |
1da177e4 LT |
72 | |
73 | #define copy_to_user_page(vma, page, vaddr, dst, src, len) \ | |
74 | do { \ | |
75 | flush_cache_page(vma, vaddr, page_to_pfn(page)); \ | |
76 | memcpy(dst, src, len); \ | |
77 | flush_kernel_dcache_range_asm((unsigned long)dst, (unsigned long)dst + len); \ | |
78 | } while (0) | |
79 | ||
80 | #define copy_from_user_page(vma, page, vaddr, dst, src, len) \ | |
81 | do { \ | |
82 | flush_cache_page(vma, vaddr, page_to_pfn(page)); \ | |
83 | memcpy(dst, src, len); \ | |
84 | } while (0) | |
85 | ||
d6ce8626 RC |
86 | void flush_cache_page(struct vm_area_struct *vma, unsigned long vmaddr, unsigned long pfn); |
87 | void flush_cache_range(struct vm_area_struct *vma, | |
88 | unsigned long start, unsigned long end); | |
1bcdd854 | 89 | |
f311847c JB |
90 | /* defined in pacache.S exported in cache.c used by flush_anon_page */ |
91 | void flush_dcache_page_asm(unsigned long phys_addr, unsigned long vaddr); | |
92 | ||
d6ce8626 | 93 | #define ARCH_HAS_FLUSH_ANON_PAGE |
ab43227c | 94 | static inline void |
a6f36be3 | 95 | flush_anon_page(struct vm_area_struct *vma, struct page *page, unsigned long vmaddr) |
ab43227c | 96 | { |
b7d45818 JB |
97 | if (PageAnon(page)) { |
98 | flush_tlb_page(vma, vmaddr); | |
027f27c4 | 99 | preempt_disable(); |
f311847c | 100 | flush_dcache_page_asm(page_to_phys(page), vmaddr); |
027f27c4 | 101 | preempt_enable(); |
b7d45818 | 102 | } |
ab43227c | 103 | } |
ab43227c | 104 | |
bb735019 KM |
105 | #include <asm/kmap_types.h> |
106 | ||
20f4d3cb JB |
107 | #define ARCH_HAS_KMAP |
108 | ||
20f4d3cb JB |
109 | static inline void *kmap(struct page *page) |
110 | { | |
111 | might_sleep(); | |
112 | return page_address(page); | |
113 | } | |
114 | ||
87be2f88 JDA |
115 | static inline void kunmap(struct page *page) |
116 | { | |
f8dae006 | 117 | flush_kernel_dcache_page_addr(page_address(page)); |
87be2f88 | 118 | } |
20f4d3cb | 119 | |
a24401bc | 120 | static inline void *kmap_atomic(struct page *page) |
210501aa | 121 | { |
2cb7c9cb | 122 | preempt_disable(); |
210501aa JDA |
123 | pagefault_disable(); |
124 | return page_address(page); | |
125 | } | |
20f4d3cb | 126 | |
765aaafe | 127 | static inline void __kunmap_atomic(void *addr) |
210501aa | 128 | { |
f8dae006 | 129 | flush_kernel_dcache_page_addr(addr); |
210501aa | 130 | pagefault_enable(); |
2cb7c9cb | 131 | preempt_enable(); |
210501aa | 132 | } |
20f4d3cb | 133 | |
765aaafe JB |
134 | #define kmap_atomic_prot(page, prot) kmap_atomic(page) |
135 | #define kmap_atomic_pfn(pfn) kmap_atomic(pfn_to_page(pfn)) | |
20f4d3cb | 136 | |
1bcdd854 HD |
137 | #endif /* _PARISC_CACHEFLUSH_H */ |
138 |