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b920de1b DH |
1 | /* MN10300 Arch-specific initialisation |
2 | * | |
3 | * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved. | |
4 | * Written by David Howells (dhowells@redhat.com) | |
5 | * | |
6 | * This program is free software; you can redistribute it and/or | |
7 | * modify it under the terms of the GNU General Public Licence | |
8 | * as published by the Free Software Foundation; either version | |
9 | * 2 of the Licence, or (at your option) any later version. | |
10 | */ | |
11 | #include <linux/errno.h> | |
12 | #include <linux/sched.h> | |
13 | #include <linux/kernel.h> | |
14 | #include <linux/mm.h> | |
15 | #include <linux/stddef.h> | |
16 | #include <linux/unistd.h> | |
17 | #include <linux/ptrace.h> | |
b920de1b | 18 | #include <linux/user.h> |
b920de1b DH |
19 | #include <linux/tty.h> |
20 | #include <linux/ioport.h> | |
21 | #include <linux/delay.h> | |
22 | #include <linux/init.h> | |
23 | #include <linux/bootmem.h> | |
24 | #include <linux/seq_file.h> | |
368dd5ac | 25 | #include <linux/cpu.h> |
b920de1b DH |
26 | #include <asm/processor.h> |
27 | #include <linux/console.h> | |
28 | #include <asm/uaccess.h> | |
b920de1b DH |
29 | #include <asm/setup.h> |
30 | #include <asm/io.h> | |
31 | #include <asm/smp.h> | |
2f2a2132 | 32 | #include <proc/proc.h> |
b920de1b DH |
33 | #include <asm/fpu.h> |
34 | #include <asm/sections.h> | |
35 | ||
36 | struct mn10300_cpuinfo boot_cpu_data; | |
37 | ||
38 | /* For PCI or other memory-mapped resources */ | |
39 | unsigned long pci_mem_start = 0x18000000; | |
40 | ||
e3f12a53 | 41 | static char __initdata cmd_line[COMMAND_LINE_SIZE]; |
b920de1b DH |
42 | char redboot_command_line[COMMAND_LINE_SIZE] = |
43 | "console=ttyS0,115200 root=/dev/mtdblock3 rw"; | |
44 | ||
45 | char __initdata redboot_platform_name[COMMAND_LINE_SIZE]; | |
46 | ||
47 | static struct resource code_resource = { | |
48 | .start = 0x100000, | |
49 | .end = 0, | |
50 | .name = "Kernel code", | |
51 | }; | |
52 | ||
53 | static struct resource data_resource = { | |
54 | .start = 0, | |
55 | .end = 0, | |
56 | .name = "Kernel data", | |
57 | }; | |
58 | ||
59 | static unsigned long __initdata phys_memory_base; | |
60 | static unsigned long __initdata phys_memory_end; | |
61 | static unsigned long __initdata memory_end; | |
62 | unsigned long memory_size; | |
63 | ||
64 | struct thread_info *__current_ti = &init_thread_union.thread_info; | |
65 | struct task_struct *__current = &init_task; | |
66 | ||
368dd5ac | 67 | #define mn10300_known_cpus 5 |
b920de1b | 68 | static const char *const mn10300_cputypes[] = { |
368dd5ac AT |
69 | "am33-1", |
70 | "am33-2", | |
71 | "am34-1", | |
72 | "am33-3", | |
73 | "am34-2", | |
b920de1b DH |
74 | "unknown" |
75 | }; | |
76 | ||
77 | /* | |
e3f12a53 AT |
78 | * Pick out the memory size. We look for mem=size, |
79 | * where size is "size[KkMm]" | |
b920de1b | 80 | */ |
e3f12a53 | 81 | static int __init early_mem(char *p) |
b920de1b | 82 | { |
e3f12a53 | 83 | memory_size = memparse(p, &p); |
b920de1b DH |
84 | |
85 | if (memory_size == 0) | |
86 | panic("Memory size not known\n"); | |
87 | ||
e3f12a53 | 88 | return 0; |
b920de1b | 89 | } |
e3f12a53 | 90 | early_param("mem", early_mem); |
b920de1b DH |
91 | |
92 | /* | |
93 | * architecture specific setup | |
94 | */ | |
95 | void __init setup_arch(char **cmdline_p) | |
96 | { | |
97 | unsigned long bootmap_size; | |
98 | unsigned long kstart_pfn, start_pfn, free_pfn, end_pfn; | |
99 | ||
100 | cpu_init(); | |
101 | unit_setup(); | |
368dd5ac | 102 | smp_init_cpus(); |
e3f12a53 AT |
103 | |
104 | /* save unparsed command line copy for /proc/cmdline */ | |
105 | strlcpy(boot_command_line, redboot_command_line, COMMAND_LINE_SIZE); | |
106 | ||
107 | /* populate cmd_line too for later use, preserving boot_command_line */ | |
108 | strlcpy(cmd_line, boot_command_line, COMMAND_LINE_SIZE); | |
109 | *cmdline_p = cmd_line; | |
110 | ||
111 | parse_early_param(); | |
112 | ||
113 | memory_end = (unsigned long) CONFIG_KERNEL_RAM_BASE_ADDRESS + | |
114 | memory_size; | |
115 | if (memory_end > phys_memory_end) | |
116 | memory_end = phys_memory_end; | |
b920de1b DH |
117 | |
118 | init_mm.start_code = (unsigned long)&_text; | |
119 | init_mm.end_code = (unsigned long) &_etext; | |
120 | init_mm.end_data = (unsigned long) &_edata; | |
121 | init_mm.brk = (unsigned long) &_end; | |
122 | ||
123 | code_resource.start = virt_to_bus(&_text); | |
124 | code_resource.end = virt_to_bus(&_etext)-1; | |
125 | data_resource.start = virt_to_bus(&_etext); | |
126 | data_resource.end = virt_to_bus(&_edata)-1; | |
127 | ||
b920de1b DH |
128 | start_pfn = (CONFIG_KERNEL_RAM_BASE_ADDRESS >> PAGE_SHIFT); |
129 | kstart_pfn = PFN_UP(__pa(&_text)); | |
130 | free_pfn = PFN_UP(__pa(&_end)); | |
131 | end_pfn = PFN_DOWN(__pa(memory_end)); | |
132 | ||
133 | bootmap_size = init_bootmem_node(&contig_page_data, | |
134 | free_pfn, | |
135 | start_pfn, | |
136 | end_pfn); | |
137 | ||
138 | if (kstart_pfn > start_pfn) | |
139 | free_bootmem(PFN_PHYS(start_pfn), | |
140 | PFN_PHYS(kstart_pfn - start_pfn)); | |
141 | ||
142 | free_bootmem(PFN_PHYS(free_pfn), | |
143 | PFN_PHYS(end_pfn - free_pfn)); | |
144 | ||
145 | /* If interrupt vector table is in main ram, then we need to | |
146 | reserve the page it is occupying. */ | |
147 | if (CONFIG_INTERRUPT_VECTOR_BASE >= CONFIG_KERNEL_RAM_BASE_ADDRESS && | |
148 | CONFIG_INTERRUPT_VECTOR_BASE < memory_end) | |
c7f8d6f6 | 149 | reserve_bootmem(CONFIG_INTERRUPT_VECTOR_BASE, PAGE_SIZE, |
b920de1b DH |
150 | BOOTMEM_DEFAULT); |
151 | ||
152 | reserve_bootmem(PAGE_ALIGN(PFN_PHYS(free_pfn)), bootmap_size, | |
153 | BOOTMEM_DEFAULT); | |
154 | ||
155 | #ifdef CONFIG_VT | |
156 | #if defined(CONFIG_VGA_CONSOLE) | |
157 | conswitchp = &vga_con; | |
158 | #elif defined(CONFIG_DUMMY_CONSOLE) | |
159 | conswitchp = &dummy_con; | |
160 | #endif | |
161 | #endif | |
162 | ||
163 | paging_init(); | |
164 | } | |
165 | ||
166 | /* | |
167 | * perform CPU initialisation | |
168 | */ | |
169 | void __init cpu_init(void) | |
170 | { | |
171 | unsigned long cpurev = CPUREV, type; | |
b920de1b DH |
172 | |
173 | type = (CPUREV & CPUREV_TYPE) >> CPUREV_TYPE_S; | |
174 | if (type > mn10300_known_cpus) | |
175 | type = mn10300_known_cpus; | |
176 | ||
a5e03ca2 | 177 | printk(KERN_INFO "Panasonic %s, rev %ld\n", |
b920de1b DH |
178 | mn10300_cputypes[type], |
179 | (cpurev & CPUREV_REVISION) >> CPUREV_REVISION_S); | |
180 | ||
368dd5ac AT |
181 | get_mem_info(&phys_memory_base, &memory_size); |
182 | phys_memory_end = phys_memory_base + memory_size; | |
b920de1b | 183 | |
368dd5ac AT |
184 | fpu_init_state(); |
185 | } | |
b920de1b | 186 | |
368dd5ac | 187 | static struct cpu cpu_devices[NR_CPUS]; |
b920de1b | 188 | |
368dd5ac AT |
189 | static int __init topology_init(void) |
190 | { | |
191 | int i; | |
b920de1b | 192 | |
368dd5ac AT |
193 | for_each_present_cpu(i) |
194 | register_cpu(&cpu_devices[i], i); | |
b920de1b | 195 | |
368dd5ac | 196 | return 0; |
b920de1b DH |
197 | } |
198 | ||
368dd5ac AT |
199 | subsys_initcall(topology_init); |
200 | ||
b920de1b DH |
201 | /* |
202 | * Get CPU information for use by the procfs. | |
203 | */ | |
204 | static int show_cpuinfo(struct seq_file *m, void *v) | |
205 | { | |
368dd5ac AT |
206 | #ifdef CONFIG_SMP |
207 | struct mn10300_cpuinfo *c = v; | |
208 | unsigned long cpu_id = c - cpu_data; | |
209 | unsigned long cpurev = c->type, type, icachesz, dcachesz; | |
210 | #else /* CONFIG_SMP */ | |
211 | unsigned long cpu_id = 0; | |
b920de1b | 212 | unsigned long cpurev = CPUREV, type, icachesz, dcachesz; |
368dd5ac | 213 | #endif /* CONFIG_SMP */ |
b920de1b | 214 | |
368dd5ac AT |
215 | #ifdef CONFIG_SMP |
216 | if (!cpu_online(cpu_id)) | |
217 | return 0; | |
218 | #endif | |
219 | ||
220 | type = (cpurev & CPUREV_TYPE) >> CPUREV_TYPE_S; | |
b920de1b DH |
221 | if (type > mn10300_known_cpus) |
222 | type = mn10300_known_cpus; | |
223 | ||
224 | icachesz = | |
225 | ((cpurev & CPUREV_ICWAY ) >> CPUREV_ICWAY_S) * | |
226 | ((cpurev & CPUREV_ICSIZE) >> CPUREV_ICSIZE_S) * | |
227 | 1024; | |
228 | ||
229 | dcachesz = | |
230 | ((cpurev & CPUREV_DCWAY ) >> CPUREV_DCWAY_S) * | |
231 | ((cpurev & CPUREV_DCSIZE) >> CPUREV_DCSIZE_S) * | |
232 | 1024; | |
233 | ||
234 | seq_printf(m, | |
368dd5ac | 235 | "processor : %ld\n" |
a5e03ca2 | 236 | "vendor_id : " PROCESSOR_VENDOR_NAME "\n" |
b920de1b DH |
237 | "cpu core : %s\n" |
238 | "cpu rev : %lu\n" | |
239 | "model name : " PROCESSOR_MODEL_NAME "\n" | |
240 | "icache size: %lu\n" | |
241 | "dcache size: %lu\n", | |
368dd5ac | 242 | cpu_id, |
b920de1b DH |
243 | mn10300_cputypes[type], |
244 | (cpurev & CPUREV_REVISION) >> CPUREV_REVISION_S, | |
245 | icachesz, | |
246 | dcachesz | |
247 | ); | |
248 | ||
249 | seq_printf(m, | |
250 | "ioclk speed: %lu.%02luMHz\n" | |
251 | "bogomips : %lu.%02lu\n\n", | |
252 | MN10300_IOCLK / 1000000, | |
253 | (MN10300_IOCLK / 10000) % 100, | |
368dd5ac AT |
254 | #ifdef CONFIG_SMP |
255 | c->loops_per_jiffy / (500000 / HZ), | |
256 | (c->loops_per_jiffy / (5000 / HZ)) % 100 | |
257 | #else /* CONFIG_SMP */ | |
b920de1b DH |
258 | loops_per_jiffy / (500000 / HZ), |
259 | (loops_per_jiffy / (5000 / HZ)) % 100 | |
368dd5ac | 260 | #endif /* CONFIG_SMP */ |
b920de1b DH |
261 | ); |
262 | ||
263 | return 0; | |
264 | } | |
265 | ||
266 | static void *c_start(struct seq_file *m, loff_t *pos) | |
267 | { | |
268 | return *pos < NR_CPUS ? cpu_data + *pos : NULL; | |
269 | } | |
270 | ||
271 | static void *c_next(struct seq_file *m, void *v, loff_t *pos) | |
272 | { | |
273 | ++*pos; | |
274 | return c_start(m, pos); | |
275 | } | |
276 | ||
277 | static void c_stop(struct seq_file *m, void *v) | |
278 | { | |
279 | } | |
280 | ||
88e9d34c | 281 | const struct seq_operations cpuinfo_op = { |
b920de1b DH |
282 | .start = c_start, |
283 | .next = c_next, | |
284 | .stop = c_stop, | |
285 | .show = show_cpuinfo, | |
286 | }; |