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73b4390f RB |
1 | /* |
2 | * RouterBoard 500 Platform devices | |
3 | * | |
4 | * Copyright (C) 2006 Felix Fietkau <nbd@openwrt.org> | |
5 | * Copyright (C) 2007 Florian Fainelli <florian@openwrt.org> | |
6 | * | |
7 | * This program is free software; you can redistribute it and/or modify | |
8 | * it under the terms of the GNU General Public License as published by | |
9 | * the Free Software Foundation; either version 2 of the License, or | |
10 | * (at your option) any later version. | |
11 | * | |
12 | * This program is distributed in the hope that it will be useful, | |
13 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
14 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
15 | * GNU General Public License for more details. | |
16 | */ | |
17 | #include <linux/kernel.h> | |
18 | #include <linux/init.h> | |
19 | #include <linux/ctype.h> | |
20 | #include <linux/string.h> | |
21 | #include <linux/platform_device.h> | |
22 | #include <linux/mtd/nand.h> | |
23 | #include <linux/mtd/mtd.h> | |
24 | #include <linux/mtd/partitions.h> | |
25 | #include <linux/gpio_keys.h> | |
26 | #include <linux/input.h> | |
27 | ||
28 | #include <asm/bootinfo.h> | |
29 | ||
30 | #include <asm/mach-rc32434/rc32434.h> | |
31 | #include <asm/mach-rc32434/dma.h> | |
32 | #include <asm/mach-rc32434/dma_v.h> | |
33 | #include <asm/mach-rc32434/eth.h> | |
34 | #include <asm/mach-rc32434/rb.h> | |
35 | #include <asm/mach-rc32434/integ.h> | |
36 | #include <asm/mach-rc32434/gpio.h> | |
37 | ||
38 | #define ETH0_DMA_RX_IRQ (GROUP1_IRQ_BASE + 0) | |
39 | #define ETH0_DMA_TX_IRQ (GROUP1_IRQ_BASE + 1) | |
40 | #define ETH0_RX_OVR_IRQ (GROUP3_IRQ_BASE + 9) | |
41 | #define ETH0_TX_UND_IRQ (GROUP3_IRQ_BASE + 10) | |
42 | ||
43 | #define ETH0_RX_DMA_ADDR (DMA0_BASE_ADDR + 0 * DMA_CHAN_OFFSET) | |
44 | #define ETH0_TX_DMA_ADDR (DMA0_BASE_ADDR + 1 * DMA_CHAN_OFFSET) | |
45 | ||
46 | /* NAND definitions */ | |
47 | #define GPIO_RDY (1 << 0x08) | |
48 | #define GPIO_WPX (1 << 0x09) | |
49 | #define GPIO_ALE (1 << 0x0a) | |
50 | #define GPIO_CLE (1 << 0x0b) | |
51 | ||
73b4390f RB |
52 | static struct resource korina_dev0_res[] = { |
53 | { | |
54 | .name = "korina_regs", | |
55 | .start = ETH0_BASE_ADDR, | |
56 | .end = ETH0_BASE_ADDR + sizeof(struct eth_regs), | |
57 | .flags = IORESOURCE_MEM, | |
58 | }, { | |
59 | .name = "korina_rx", | |
60 | .start = ETH0_DMA_RX_IRQ, | |
61 | .end = ETH0_DMA_RX_IRQ, | |
62 | .flags = IORESOURCE_IRQ | |
63 | }, { | |
64 | .name = "korina_tx", | |
65 | .start = ETH0_DMA_TX_IRQ, | |
66 | .end = ETH0_DMA_TX_IRQ, | |
67 | .flags = IORESOURCE_IRQ | |
68 | }, { | |
69 | .name = "korina_ovr", | |
70 | .start = ETH0_RX_OVR_IRQ, | |
71 | .end = ETH0_RX_OVR_IRQ, | |
72 | .flags = IORESOURCE_IRQ | |
73 | }, { | |
74 | .name = "korina_und", | |
75 | .start = ETH0_TX_UND_IRQ, | |
76 | .end = ETH0_TX_UND_IRQ, | |
77 | .flags = IORESOURCE_IRQ | |
78 | }, { | |
79 | .name = "korina_dma_rx", | |
80 | .start = ETH0_RX_DMA_ADDR, | |
81 | .end = ETH0_RX_DMA_ADDR + DMA_CHAN_OFFSET - 1, | |
82 | .flags = IORESOURCE_MEM, | |
83 | }, { | |
84 | .name = "korina_dma_tx", | |
85 | .start = ETH0_TX_DMA_ADDR, | |
86 | .end = ETH0_TX_DMA_ADDR + DMA_CHAN_OFFSET - 1, | |
87 | .flags = IORESOURCE_MEM, | |
88 | } | |
89 | }; | |
90 | ||
91 | static struct korina_device korina_dev0_data = { | |
92 | .name = "korina0", | |
93 | .mac = {0xde, 0xca, 0xff, 0xc0, 0xff, 0xee} | |
94 | }; | |
95 | ||
96 | static struct platform_device korina_dev0 = { | |
97 | .id = 0, | |
98 | .name = "korina", | |
99 | .dev.platform_data = &korina_dev0_data, | |
100 | .resource = korina_dev0_res, | |
101 | .num_resources = ARRAY_SIZE(korina_dev0_res), | |
102 | }; | |
103 | ||
104 | #define CF_GPIO_NUM 13 | |
105 | ||
106 | static struct resource cf_slot0_res[] = { | |
107 | { | |
108 | .name = "cf_membase", | |
109 | .flags = IORESOURCE_MEM | |
110 | }, { | |
111 | .name = "cf_irq", | |
112 | .start = (8 + 4 * 32 + CF_GPIO_NUM), /* 149 */ | |
113 | .end = (8 + 4 * 32 + CF_GPIO_NUM), | |
114 | .flags = IORESOURCE_IRQ | |
115 | } | |
116 | }; | |
117 | ||
118 | static struct cf_device cf_slot0_data = { | |
119 | .gpio_pin = 13 | |
120 | }; | |
121 | ||
122 | static struct platform_device cf_slot0 = { | |
123 | .id = 0, | |
124 | .name = "pata-rb532-cf", | |
125 | .dev.platform_data = &cf_slot0_data, | |
126 | .resource = cf_slot0_res, | |
127 | .num_resources = ARRAY_SIZE(cf_slot0_res), | |
128 | }; | |
129 | ||
130 | /* Resources and device for NAND */ | |
131 | static int rb532_dev_ready(struct mtd_info *mtd) | |
132 | { | |
133 | return readl(IDT434_REG_BASE + GPIOD) & GPIO_RDY; | |
134 | } | |
135 | ||
136 | static void rb532_cmd_ctrl(struct mtd_info *mtd, int cmd, unsigned int ctrl) | |
137 | { | |
138 | struct nand_chip *chip = mtd->priv; | |
139 | unsigned char orbits, nandbits; | |
140 | ||
141 | if (ctrl & NAND_CTRL_CHANGE) { | |
142 | orbits = (ctrl & NAND_CLE) << 1; | |
143 | orbits |= (ctrl & NAND_ALE) >> 1; | |
144 | ||
145 | nandbits = (~ctrl & NAND_CLE) << 1; | |
146 | nandbits |= (~ctrl & NAND_ALE) >> 1; | |
147 | ||
148 | set_latch_u5(orbits, nandbits); | |
149 | } | |
150 | if (cmd != NAND_CMD_NONE) | |
151 | writeb(cmd, chip->IO_ADDR_W); | |
152 | } | |
153 | ||
154 | static struct resource nand_slot0_res[] = { | |
155 | [0] = { | |
156 | .name = "nand_membase", | |
157 | .flags = IORESOURCE_MEM | |
158 | } | |
159 | }; | |
160 | ||
161 | static struct platform_nand_data rb532_nand_data = { | |
162 | .ctrl.dev_ready = rb532_dev_ready, | |
163 | .ctrl.cmd_ctrl = rb532_cmd_ctrl, | |
164 | }; | |
165 | ||
166 | static struct platform_device nand_slot0 = { | |
167 | .name = "gen_nand", | |
168 | .id = -1, | |
169 | .resource = nand_slot0_res, | |
170 | .num_resources = ARRAY_SIZE(nand_slot0_res), | |
171 | .dev.platform_data = &rb532_nand_data, | |
172 | }; | |
173 | ||
174 | static struct mtd_partition rb532_partition_info[] = { | |
175 | { | |
176 | .name = "Routerboard NAND boot", | |
177 | .offset = 0, | |
178 | .size = 4 * 1024 * 1024, | |
179 | }, { | |
180 | .name = "rootfs", | |
181 | .offset = MTDPART_OFS_NXTBLK, | |
182 | .size = MTDPART_SIZ_FULL, | |
183 | } | |
184 | }; | |
185 | ||
186 | static struct platform_device rb532_led = { | |
187 | .name = "rb532-led", | |
188 | .id = 0, | |
189 | }; | |
190 | ||
191 | static struct gpio_keys_button rb532_gpio_btn[] = { | |
192 | { | |
193 | .gpio = 1, | |
194 | .code = BTN_0, | |
195 | .desc = "S1", | |
196 | .active_low = 1, | |
197 | } | |
198 | }; | |
199 | ||
200 | static struct gpio_keys_platform_data rb532_gpio_btn_data = { | |
201 | .buttons = rb532_gpio_btn, | |
202 | .nbuttons = ARRAY_SIZE(rb532_gpio_btn), | |
203 | }; | |
204 | ||
205 | static struct platform_device rb532_button = { | |
206 | .name = "gpio-keys", | |
207 | .id = -1, | |
208 | .dev = { | |
209 | .platform_data = &rb532_gpio_btn_data, | |
210 | } | |
211 | }; | |
212 | ||
213 | static struct resource rb532_wdt_res[] = { | |
214 | { | |
215 | .name = "rb532_wdt_res", | |
216 | .start = INTEG0_BASE_ADDR, | |
217 | .end = INTEG0_BASE_ADDR + sizeof(struct integ), | |
218 | .flags = IORESOURCE_MEM, | |
219 | } | |
220 | }; | |
221 | ||
222 | static struct platform_device rb532_wdt = { | |
223 | .name = "rc32434_wdt", | |
224 | .id = -1, | |
225 | .resource = rb532_wdt_res, | |
226 | .num_resources = ARRAY_SIZE(rb532_wdt_res), | |
227 | }; | |
228 | ||
229 | static struct platform_device *rb532_devs[] = { | |
230 | &korina_dev0, | |
231 | &nand_slot0, | |
232 | &cf_slot0, | |
233 | &rb532_led, | |
234 | &rb532_button, | |
235 | &rb532_wdt | |
236 | }; | |
237 | ||
238 | static void __init parse_mac_addr(char *macstr) | |
239 | { | |
240 | int i, j; | |
241 | unsigned char result, value; | |
242 | ||
243 | for (i = 0; i < 6; i++) { | |
244 | result = 0; | |
245 | ||
246 | if (i != 5 && *(macstr + 2) != ':') | |
247 | return; | |
248 | ||
249 | for (j = 0; j < 2; j++) { | |
250 | if (isxdigit(*macstr) | |
251 | && (value = | |
252 | isdigit(*macstr) ? *macstr - | |
253 | '0' : toupper(*macstr) - 'A' + 10) < 16) { | |
254 | result = result * 16 + value; | |
255 | macstr++; | |
256 | } else | |
257 | return; | |
258 | } | |
259 | ||
260 | macstr++; | |
261 | korina_dev0_data.mac[i] = result; | |
262 | } | |
263 | } | |
264 | ||
265 | ||
73b4390f RB |
266 | /* NAND definitions */ |
267 | #define NAND_CHIP_DELAY 25 | |
268 | ||
269 | static void __init rb532_nand_setup(void) | |
270 | { | |
271 | switch (mips_machtype) { | |
272 | case MACH_MIKROTIK_RB532A: | |
273 | set_latch_u5(LO_FOFF | LO_CEX, | |
274 | LO_ULED | LO_ALE | LO_CLE | LO_WPX); | |
275 | break; | |
276 | default: | |
277 | set_latch_u5(LO_WPX | LO_FOFF | LO_CEX, | |
278 | LO_ULED | LO_ALE | LO_CLE); | |
279 | break; | |
280 | } | |
281 | ||
282 | /* Setup NAND specific settings */ | |
283 | rb532_nand_data.chip.nr_chips = 1; | |
284 | rb532_nand_data.chip.nr_partitions = ARRAY_SIZE(rb532_partition_info); | |
285 | rb532_nand_data.chip.partitions = rb532_partition_info; | |
286 | rb532_nand_data.chip.chip_delay = NAND_CHIP_DELAY; | |
287 | rb532_nand_data.chip.options = NAND_NO_AUTOINCR; | |
288 | } | |
289 | ||
290 | ||
291 | static int __init plat_setup_devices(void) | |
292 | { | |
293 | /* Look for the CF card reader */ | |
1ddfe82d | 294 | if (!readl(IDT434_REG_BASE + DEV1MASK)) |
73b4390f RB |
295 | rb532_devs[1] = NULL; |
296 | else { | |
297 | cf_slot0_res[0].start = | |
1ddfe82d | 298 | readl(IDT434_REG_BASE + DEV1BASE); |
73b4390f RB |
299 | cf_slot0_res[0].end = cf_slot0_res[0].start + 0x1000; |
300 | } | |
301 | ||
302 | /* Read the NAND resources from the device controller */ | |
1ddfe82d | 303 | nand_slot0_res[0].start = readl(IDT434_REG_BASE + DEV2BASE); |
73b4390f RB |
304 | nand_slot0_res[0].end = nand_slot0_res[0].start + 0x1000; |
305 | ||
306 | /* Initialise the NAND device */ | |
307 | rb532_nand_setup(); | |
308 | ||
309 | return platform_add_devices(rb532_devs, ARRAY_SIZE(rb532_devs)); | |
310 | } | |
311 | ||
312 | static int __init setup_kmac(char *s) | |
313 | { | |
314 | printk(KERN_INFO "korina mac = %s\n", s); | |
315 | parse_mac_addr(s); | |
316 | return 0; | |
317 | } | |
318 | ||
319 | __setup("kmac=", setup_kmac); | |
320 | ||
321 | arch_initcall(plat_setup_devices); |