Commit | Line | Data |
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1da177e4 LT |
1 | /***************************************************************************/ |
2 | ||
3 | /* | |
4 | * linux/arch/m68knommu/platform/5272/config.c | |
5 | * | |
6 | * Copyright (C) 1999-2002, Greg Ungerer (gerg@snapgear.com) | |
7 | * Copyright (C) 2001-2002, SnapGear Inc. (www.snapgear.com) | |
8 | */ | |
9 | ||
10 | /***************************************************************************/ | |
11 | ||
1da177e4 | 12 | #include <linux/kernel.h> |
1da177e4 LT |
13 | #include <linux/param.h> |
14 | #include <linux/init.h> | |
84e6defa | 15 | #include <linux/io.h> |
1da177e4 LT |
16 | #include <asm/machdep.h> |
17 | #include <asm/coldfire.h> | |
1da177e4 | 18 | #include <asm/mcfsim.h> |
84e6defa | 19 | #include <asm/mcfuart.h> |
1da177e4 LT |
20 | |
21 | /***************************************************************************/ | |
22 | ||
1da177e4 LT |
23 | /* |
24 | * Some platforms need software versions of the GPIO data registers. | |
25 | */ | |
26 | unsigned short ppdata; | |
27 | unsigned char ledbank = 0xff; | |
28 | ||
29 | /***************************************************************************/ | |
30 | ||
84e6defa GU |
31 | static struct mcf_platform_uart m5272_uart_platform[] = { |
32 | { | |
33 | .mapbase = MCF_MBAR + MCFUART_BASE1, | |
49802967 | 34 | .irq = MCF_IRQ_UART1, |
84e6defa GU |
35 | }, |
36 | { | |
37 | .mapbase = MCF_MBAR + MCFUART_BASE2, | |
49802967 | 38 | .irq = MCF_IRQ_UART2, |
84e6defa GU |
39 | }, |
40 | { }, | |
1da177e4 LT |
41 | }; |
42 | ||
84e6defa GU |
43 | static struct platform_device m5272_uart = { |
44 | .name = "mcfuart", | |
45 | .id = 0, | |
46 | .dev.platform_data = m5272_uart_platform, | |
47 | }; | |
48 | ||
ffba3f48 GU |
49 | static struct resource m5272_fec_resources[] = { |
50 | { | |
51 | .start = MCF_MBAR + 0x840, | |
52 | .end = MCF_MBAR + 0x840 + 0x1cf, | |
53 | .flags = IORESOURCE_MEM, | |
54 | }, | |
55 | { | |
49802967 GU |
56 | .start = MCF_IRQ_ERX, |
57 | .end = MCF_IRQ_ERX, | |
ffba3f48 GU |
58 | .flags = IORESOURCE_IRQ, |
59 | }, | |
60 | { | |
49802967 GU |
61 | .start = MCF_IRQ_ETX, |
62 | .end = MCF_IRQ_ETX, | |
ffba3f48 GU |
63 | .flags = IORESOURCE_IRQ, |
64 | }, | |
65 | { | |
49802967 GU |
66 | .start = MCF_IRQ_ENTC, |
67 | .end = MCF_IRQ_ENTC, | |
ffba3f48 GU |
68 | .flags = IORESOURCE_IRQ, |
69 | }, | |
70 | }; | |
71 | ||
72 | static struct platform_device m5272_fec = { | |
73 | .name = "fec", | |
74 | .id = 0, | |
75 | .num_resources = ARRAY_SIZE(m5272_fec_resources), | |
76 | .resource = m5272_fec_resources, | |
77 | }; | |
78 | ||
84e6defa GU |
79 | static struct platform_device *m5272_devices[] __initdata = { |
80 | &m5272_uart, | |
ffba3f48 | 81 | &m5272_fec, |
84e6defa GU |
82 | }; |
83 | ||
84 | /***************************************************************************/ | |
85 | ||
86 | static void __init m5272_uart_init_line(int line, int irq) | |
87 | { | |
88 | u32 v; | |
89 | ||
90 | if ((line >= 0) && (line < 2)) { | |
84e6defa GU |
91 | /* Enable the output lines for the serial ports */ |
92 | v = readl(MCF_MBAR + MCFSIM_PBCNT); | |
93 | v = (v & ~0x000000ff) | 0x00000055; | |
94 | writel(v, MCF_MBAR + MCFSIM_PBCNT); | |
95 | ||
96 | v = readl(MCF_MBAR + MCFSIM_PDCNT); | |
97 | v = (v & ~0x000003fc) | 0x000002a8; | |
98 | writel(v, MCF_MBAR + MCFSIM_PDCNT); | |
99 | } | |
100 | } | |
101 | ||
102 | static void __init m5272_uarts_init(void) | |
103 | { | |
104 | const int nrlines = ARRAY_SIZE(m5272_uart_platform); | |
105 | int line; | |
106 | ||
107 | for (line = 0; (line < nrlines); line++) | |
108 | m5272_uart_init_line(line, m5272_uart_platform[line].irq); | |
109 | } | |
1da177e4 LT |
110 | |
111 | /***************************************************************************/ | |
112 | ||
05728aec GU |
113 | static void m5272_cpu_reset(void) |
114 | { | |
115 | local_irq_disable(); | |
116 | /* Set watchdog to reset, and enabled */ | |
117 | __raw_writew(0, MCF_MBAR + MCFSIM_WIRR); | |
118 | __raw_writew(1, MCF_MBAR + MCFSIM_WRRR); | |
119 | __raw_writew(0, MCF_MBAR + MCFSIM_WCR); | |
120 | for (;;) | |
121 | /* wait for watchdog to timeout */; | |
122 | } | |
123 | ||
124 | /***************************************************************************/ | |
125 | ||
84e6defa | 126 | void __init config_BSP(char *commandp, int size) |
1da177e4 | 127 | { |
a7962660 GU |
128 | #if defined (CONFIG_MOD5272) |
129 | volatile unsigned char *pivrp; | |
1da177e4 LT |
130 | |
131 | /* Set base of device vectors to be 64 */ | |
a7962660 | 132 | pivrp = (volatile unsigned char *) (MCF_MBAR + MCFSIM_PIVR); |
1da177e4 LT |
133 | *pivrp = 0x40; |
134 | #endif | |
135 | ||
bc72450a | 136 | #if defined(CONFIG_NETtel) || defined(CONFIG_SCALES) |
1da177e4 LT |
137 | /* Copy command line from FLASH to local buffer... */ |
138 | memcpy(commandp, (char *) 0xf0004000, size); | |
139 | commandp[size-1] = 0; | |
1da177e4 LT |
140 | #elif defined(CONFIG_CANCam) |
141 | /* Copy command line from FLASH to local buffer... */ | |
142 | memcpy(commandp, (char *) 0xf0010000, size); | |
143 | commandp[size-1] = 0; | |
1da177e4 LT |
144 | #endif |
145 | ||
05728aec | 146 | mach_reset = m5272_cpu_reset; |
1da177e4 LT |
147 | } |
148 | ||
149 | /***************************************************************************/ | |
84e6defa GU |
150 | |
151 | static int __init init_BSP(void) | |
152 | { | |
153 | m5272_uarts_init(); | |
154 | platform_add_devices(m5272_devices, ARRAY_SIZE(m5272_devices)); | |
155 | return 0; | |
156 | } | |
157 | ||
158 | arch_initcall(init_BSP); | |
159 | ||
160 | /***************************************************************************/ |