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0e152d80 GU |
1 | comment "Processor Type" |
2 | ||
3 | config M68000 | |
4 | bool | |
5 | select CPU_HAS_NO_BITFIELDS | |
7f73bafc | 6 | select GENERIC_CSUM |
0e152d80 GU |
7 | help |
8 | The Freescale (was Motorola) 68000 CPU is the first generation of | |
9 | the well known M68K family of processors. The CPU core as well as | |
10 | being available as a stand alone CPU was also used in many | |
11 | System-On-Chip devices (eg 68328, 68302, etc). It does not contain | |
12 | a paging MMU. | |
13 | ||
14 | config MCPU32 | |
15 | bool | |
16 | select CPU_HAS_NO_BITFIELDS | |
17 | help | |
18 | The Freescale (was then Motorola) CPU32 is a CPU core that is | |
19 | based on the 68020 processor. For the most part it is used in | |
20 | System-On-Chip parts, and does not contain a paging MMU. | |
21 | ||
22 | config COLDFIRE | |
23 | bool | |
24 | select GENERIC_GPIO | |
25 | select ARCH_REQUIRE_GPIOLIB | |
26 | select CPU_HAS_NO_BITFIELDS | |
7f73bafc | 27 | select GENERIC_CSUM |
0e152d80 GU |
28 | help |
29 | The Freescale ColdFire family of processors is a modern derivitive | |
30 | of the 68000 processor family. They are mainly targeted at embedded | |
31 | applications, and are all System-On-Chip (SOC) devices, as opposed | |
32 | to stand alone CPUs. They implement a subset of the original 68000 | |
33 | processor instruction set. | |
34 | ||
35 | config M68020 | |
36 | bool "68020 support" | |
37 | depends on MMU | |
5717a02b | 38 | select GENERIC_ATOMIC64 |
0e152d80 GU |
39 | help |
40 | If you anticipate running this kernel on a computer with a MC68020 | |
41 | processor, say Y. Otherwise, say N. Note that the 68020 requires a | |
42 | 68851 MMU (Memory Management Unit) to run Linux/m68k, except on the | |
43 | Sun 3, which provides its own version. | |
44 | ||
45 | config M68030 | |
46 | bool "68030 support" | |
47 | depends on MMU && !MMU_SUN3 | |
5717a02b | 48 | select GENERIC_ATOMIC64 |
0e152d80 GU |
49 | help |
50 | If you anticipate running this kernel on a computer with a MC68030 | |
51 | processor, say Y. Otherwise, say N. Note that a MC68EC030 will not | |
52 | work, as it does not include an MMU (Memory Management Unit). | |
53 | ||
54 | config M68040 | |
55 | bool "68040 support" | |
56 | depends on MMU && !MMU_SUN3 | |
5717a02b | 57 | select GENERIC_ATOMIC64 |
0e152d80 GU |
58 | help |
59 | If you anticipate running this kernel on a computer with a MC68LC040 | |
60 | or MC68040 processor, say Y. Otherwise, say N. Note that an | |
61 | MC68EC040 will not work, as it does not include an MMU (Memory | |
62 | Management Unit). | |
63 | ||
64 | config M68060 | |
65 | bool "68060 support" | |
66 | depends on MMU && !MMU_SUN3 | |
5717a02b | 67 | select GENERIC_ATOMIC64 |
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68 | help |
69 | If you anticipate running this kernel on a computer with a MC68060 | |
70 | processor, say Y. Otherwise, say N. | |
71 | ||
72 | config M68328 | |
73 | bool "MC68328" | |
74 | depends on !MMU | |
75 | select M68000 | |
76 | help | |
77 | Motorola 68328 processor support. | |
78 | ||
79 | config M68EZ328 | |
80 | bool "MC68EZ328" | |
81 | depends on !MMU | |
82 | select M68000 | |
83 | help | |
84 | Motorola 68EX328 processor support. | |
85 | ||
86 | config M68VZ328 | |
87 | bool "MC68VZ328" | |
88 | depends on !MMU | |
89 | select M68000 | |
90 | help | |
91 | Motorola 68VZ328 processor support. | |
92 | ||
93 | config M68360 | |
94 | bool "MC68360" | |
95 | depends on !MMU | |
96 | select MCPU32 | |
97 | help | |
98 | Motorola 68360 processor support. | |
99 | ||
100 | config M5206 | |
101 | bool "MCF5206" | |
102 | depends on !MMU | |
103 | select COLDFIRE | |
104 | select COLDFIRE_SW_A7 | |
105 | select HAVE_MBAR | |
106 | help | |
107 | Motorola ColdFire 5206 processor support. | |
108 | ||
109 | config M5206e | |
110 | bool "MCF5206e" | |
111 | depends on !MMU | |
112 | select COLDFIRE | |
113 | select COLDFIRE_SW_A7 | |
114 | select HAVE_MBAR | |
115 | help | |
116 | Motorola ColdFire 5206e processor support. | |
117 | ||
118 | config M520x | |
119 | bool "MCF520x" | |
120 | depends on !MMU | |
121 | select COLDFIRE | |
122 | select GENERIC_CLOCKEVENTS | |
123 | select HAVE_CACHE_SPLIT | |
124 | help | |
125 | Freescale Coldfire 5207/5208 processor support. | |
126 | ||
127 | config M523x | |
128 | bool "MCF523x" | |
129 | depends on !MMU | |
130 | select COLDFIRE | |
131 | select GENERIC_CLOCKEVENTS | |
132 | select HAVE_CACHE_SPLIT | |
133 | select HAVE_IPSBAR | |
134 | help | |
135 | Freescale Coldfire 5230/1/2/4/5 processor support | |
136 | ||
137 | config M5249 | |
138 | bool "MCF5249" | |
139 | depends on !MMU | |
140 | select COLDFIRE | |
141 | select COLDFIRE_SW_A7 | |
142 | select HAVE_MBAR | |
143 | help | |
144 | Motorola ColdFire 5249 processor support. | |
145 | ||
146 | config M527x | |
147 | bool | |
148 | ||
149 | config M5271 | |
150 | bool "MCF5271" | |
151 | depends on !MMU | |
152 | select COLDFIRE | |
153 | select M527x | |
154 | select HAVE_CACHE_SPLIT | |
155 | select HAVE_IPSBAR | |
156 | select GENERIC_CLOCKEVENTS | |
157 | help | |
158 | Freescale (Motorola) ColdFire 5270/5271 processor support. | |
159 | ||
160 | config M5272 | |
161 | bool "MCF5272" | |
162 | depends on !MMU | |
163 | select COLDFIRE | |
164 | select COLDFIRE_SW_A7 | |
165 | select HAVE_MBAR | |
166 | help | |
167 | Motorola ColdFire 5272 processor support. | |
168 | ||
169 | config M5275 | |
170 | bool "MCF5275" | |
171 | depends on !MMU | |
172 | select COLDFIRE | |
173 | select M527x | |
174 | select HAVE_CACHE_SPLIT | |
175 | select HAVE_IPSBAR | |
176 | select GENERIC_CLOCKEVENTS | |
177 | help | |
178 | Freescale (Motorola) ColdFire 5274/5275 processor support. | |
179 | ||
180 | config M528x | |
181 | bool "MCF528x" | |
182 | depends on !MMU | |
183 | select COLDFIRE | |
184 | select GENERIC_CLOCKEVENTS | |
185 | select HAVE_CACHE_SPLIT | |
186 | select HAVE_IPSBAR | |
187 | help | |
188 | Motorola ColdFire 5280/5282 processor support. | |
189 | ||
190 | config M5307 | |
191 | bool "MCF5307" | |
192 | depends on !MMU | |
193 | select COLDFIRE | |
194 | select COLDFIRE_SW_A7 | |
195 | select HAVE_CACHE_CB | |
196 | select HAVE_MBAR | |
197 | help | |
198 | Motorola ColdFire 5307 processor support. | |
199 | ||
200 | config M532x | |
201 | bool "MCF532x" | |
202 | depends on !MMU | |
203 | select COLDFIRE | |
204 | select HAVE_CACHE_CB | |
205 | help | |
206 | Freescale (Motorola) ColdFire 532x processor support. | |
207 | ||
208 | config M5407 | |
209 | bool "MCF5407" | |
210 | depends on !MMU | |
211 | select COLDFIRE | |
212 | select COLDFIRE_SW_A7 | |
213 | select HAVE_CACHE_CB | |
214 | select HAVE_MBAR | |
215 | help | |
216 | Motorola ColdFire 5407 processor support. | |
217 | ||
218 | config M54xx | |
219 | bool | |
220 | ||
221 | config M547x | |
222 | bool "MCF547x" | |
223 | depends on !MMU | |
224 | select COLDFIRE | |
225 | select M54xx | |
226 | select HAVE_CACHE_CB | |
227 | select HAVE_MBAR | |
228 | help | |
229 | Freescale ColdFire 5470/5471/5472/5473/5474/5475 processor support. | |
230 | ||
231 | config M548x | |
232 | bool "MCF548x" | |
233 | depends on !MMU | |
234 | select COLDFIRE | |
235 | select M54xx | |
236 | select HAVE_CACHE_CB | |
237 | select HAVE_MBAR | |
238 | help | |
239 | Freescale ColdFire 5480/5481/5482/5483/5484/5485 processor support. | |
240 | ||
241 | ||
242 | comment "Processor Specific Options" | |
243 | ||
244 | config M68KFPU_EMU | |
245 | bool "Math emulation support (EXPERIMENTAL)" | |
246 | depends on MMU | |
247 | depends on EXPERIMENTAL | |
248 | help | |
249 | At some point in the future, this will cause floating-point math | |
250 | instructions to be emulated by the kernel on machines that lack a | |
251 | floating-point math coprocessor. Thrill-seekers and chronically | |
252 | sleep-deprived psychotic hacker types can say Y now, everyone else | |
253 | should probably wait a while. | |
254 | ||
255 | config M68KFPU_EMU_EXTRAPREC | |
256 | bool "Math emulation extra precision" | |
257 | depends on M68KFPU_EMU | |
258 | help | |
259 | The fpu uses normally a few bit more during calculations for | |
260 | correct rounding, the emulator can (often) do the same but this | |
261 | extra calculation can cost quite some time, so you can disable | |
262 | it here. The emulator will then "only" calculate with a 64 bit | |
263 | mantissa and round slightly incorrect, what is more than enough | |
264 | for normal usage. | |
265 | ||
266 | config M68KFPU_EMU_ONLY | |
267 | bool "Math emulation only kernel" | |
268 | depends on M68KFPU_EMU | |
269 | help | |
270 | This option prevents any floating-point instructions from being | |
271 | compiled into the kernel, thereby the kernel doesn't save any | |
272 | floating point context anymore during task switches, so this | |
273 | kernel will only be usable on machines without a floating-point | |
274 | math coprocessor. This makes the kernel a bit faster as no tests | |
275 | needs to be executed whether a floating-point instruction in the | |
276 | kernel should be executed or not. | |
277 | ||
278 | config ADVANCED | |
279 | bool "Advanced configuration options" | |
280 | depends on MMU | |
281 | ---help--- | |
282 | This gives you access to some advanced options for the CPU. The | |
283 | defaults should be fine for most users, but these options may make | |
284 | it possible for you to improve performance somewhat if you know what | |
285 | you are doing. | |
286 | ||
287 | Note that the answer to this question won't directly affect the | |
288 | kernel: saying N will just cause the configurator to skip all | |
289 | the questions about these options. | |
290 | ||
291 | Most users should say N to this question. | |
292 | ||
293 | config RMW_INSNS | |
294 | bool "Use read-modify-write instructions" | |
295 | depends on ADVANCED | |
296 | ---help--- | |
297 | This allows to use certain instructions that work with indivisible | |
298 | read-modify-write bus cycles. While this is faster than the | |
299 | workaround of disabling interrupts, it can conflict with DMA | |
300 | ( = direct memory access) on many Amiga systems, and it is also said | |
301 | to destabilize other machines. It is very likely that this will | |
302 | cause serious problems on any Amiga or Atari Medusa if set. The only | |
303 | configuration where it should work are 68030-based Ataris, where it | |
304 | apparently improves performance. But you've been warned! Unless you | |
305 | really know what you are doing, say N. Try Y only if you're quite | |
306 | adventurous. | |
307 | ||
308 | config SINGLE_MEMORY_CHUNK | |
309 | bool "Use one physical chunk of memory only" if ADVANCED && !SUN3 | |
310 | depends on MMU | |
311 | default y if SUN3 | |
312 | select NEED_MULTIPLE_NODES | |
313 | help | |
314 | Ignore all but the first contiguous chunk of physical memory for VM | |
315 | purposes. This will save a few bytes kernel size and may speed up | |
316 | some operations. Say N if not sure. | |
317 | ||
318 | config ARCH_DISCONTIGMEM_ENABLE | |
319 | def_bool MMU && !SINGLE_MEMORY_CHUNK | |
320 | ||
321 | config 060_WRITETHROUGH | |
322 | bool "Use write-through caching for 68060 supervisor accesses" | |
323 | depends on ADVANCED && M68060 | |
324 | ---help--- | |
325 | The 68060 generally uses copyback caching of recently accessed data. | |
326 | Copyback caching means that memory writes will be held in an on-chip | |
327 | cache and only written back to memory some time later. Saying Y | |
328 | here will force supervisor (kernel) accesses to use writethrough | |
329 | caching. Writethrough caching means that data is written to memory | |
330 | straight away, so that cache and memory data always agree. | |
331 | Writethrough caching is less efficient, but is needed for some | |
332 | drivers on 68060 based systems where the 68060 bus snooping signal | |
333 | is hardwired on. The 53c710 SCSI driver is known to suffer from | |
334 | this problem. | |
335 | ||
336 | config M68K_L2_CACHE | |
337 | bool | |
338 | depends on MAC | |
339 | default y | |
340 | ||
341 | config NODES_SHIFT | |
342 | int | |
343 | default "3" | |
344 | depends on !SINGLE_MEMORY_CHUNK | |
345 | ||
346 | config FPU | |
347 | bool | |
348 | ||
349 | config COLDFIRE_SW_A7 | |
350 | bool | |
351 | ||
352 | config HAVE_CACHE_SPLIT | |
353 | bool | |
354 | ||
355 | config HAVE_CACHE_CB | |
356 | bool | |
357 | ||
358 | config HAVE_MBAR | |
359 | bool | |
360 | ||
361 | config HAVE_IPSBAR | |
362 | bool | |
363 | ||
364 | config CLOCK_SET | |
365 | bool "Enable setting the CPU clock frequency" | |
366 | depends on COLDFIRE | |
367 | default n | |
368 | help | |
369 | On some CPU's you do not need to know what the core CPU clock | |
370 | frequency is. On these you can disable clock setting. On some | |
371 | traditional 68K parts, and on all ColdFire parts you need to set | |
372 | the appropriate CPU clock frequency. On these devices many of the | |
373 | onboard peripherals derive their timing from the master CPU clock | |
374 | frequency. | |
375 | ||
376 | config CLOCK_FREQ | |
377 | int "Set the core clock frequency" | |
378 | default "66666666" | |
379 | depends on CLOCK_SET | |
380 | help | |
381 | Define the CPU clock frequency in use. This is the core clock | |
382 | frequency, it may or may not be the same as the external clock | |
383 | crystal fitted to your board. Some processors have an internal | |
384 | PLL and can have their frequency programmed at run time, others | |
385 | use internal dividers. In general the kernel won't setup a PLL | |
386 | if it is fitted (there are some exceptions). This value will be | |
387 | specific to the exact CPU that you are using. | |
388 | ||
389 | config OLDMASK | |
390 | bool "Old mask 5307 (1H55J) silicon" | |
391 | depends on M5307 | |
392 | help | |
393 | Build support for the older revision ColdFire 5307 silicon. | |
394 | Specifically this is the 1H55J mask revision. | |
395 | ||
396 | if HAVE_CACHE_SPLIT | |
397 | choice | |
398 | prompt "Split Cache Configuration" | |
399 | default CACHE_I | |
400 | ||
401 | config CACHE_I | |
402 | bool "Instruction" | |
403 | help | |
404 | Use all of the ColdFire CPU cache memory as an instruction cache. | |
405 | ||
406 | config CACHE_D | |
407 | bool "Data" | |
408 | help | |
409 | Use all of the ColdFire CPU cache memory as a data cache. | |
410 | ||
411 | config CACHE_BOTH | |
412 | bool "Both" | |
413 | help | |
414 | Split the ColdFire CPU cache, and use half as an instruction cache | |
415 | and half as a data cache. | |
416 | endchoice | |
417 | endif | |
418 | ||
419 | if HAVE_CACHE_CB | |
420 | choice | |
421 | prompt "Data cache mode" | |
422 | default CACHE_WRITETHRU | |
423 | ||
424 | config CACHE_WRITETHRU | |
425 | bool "Write-through" | |
426 | help | |
427 | The ColdFire CPU cache is set into Write-through mode. | |
428 | ||
429 | config CACHE_COPYBACK | |
430 | bool "Copy-back" | |
431 | help | |
432 | The ColdFire CPU cache is set into Copy-back mode. | |
433 | endchoice | |
434 | endif | |
435 |