[GitHub/mt8127/android_kernel_alcatel_ttab.git] / arch / m68k / Kconfig.cpu

comment "Processor Type"

choice
	prompt "CPU family support"
	default M68KCLASSIC if MMU
	default COLDFIRE if !MMU
	help
	  The Freescale (was Motorola) M68K family of processors implements
	  the full 68000 processor instruction set.
	  The Freescale ColdFire family of processors is a modern derivative
	  of the 68000 processor family. They are mainly targeted at embedded
	  applications, and are all System-On-Chip (SOC) devices, as opposed
	  to stand alone CPUs. They implement a subset of the original 68000
	  processor instruction set.
	  If you anticipate running this kernel on a computer with a classic
	  MC68xxx processor, select M68KCLASSIC.
	  If you anticipate running this kernel on a computer with a ColdFire
	  processor, select COLDFIRE.

config M68KCLASSIC
	bool "Classic M68K CPU family support"

config COLDFIRE
	bool "Coldfire CPU family support"
	select GENERIC_GPIO
	select ARCH_WANT_OPTIONAL_GPIOLIB
	select ARCH_HAVE_CUSTOM_GPIO_H
	select CPU_HAS_NO_BITFIELDS
	select CPU_HAS_NO_MULDIV64
	select GENERIC_CSUM
	select HAVE_CLK

endchoice

if M68KCLASSIC

config M68000
	bool "MC68000"
	depends on !MMU
	select CPU_HAS_NO_BITFIELDS
	select CPU_HAS_NO_MULDIV64
	select CPU_HAS_NO_UNALIGNED
	select GENERIC_CSUM
	help
	  The Freescale (was Motorola) 68000 CPU is the first generation of
	  the well known M68K family of processors. The CPU core as well as
	  being available as a stand alone CPU was also used in many
	  System-On-Chip devices (eg 68328, 68302, etc). It does not contain
	  a paging MMU.

config MCPU32
	bool
	select CPU_HAS_NO_BITFIELDS
	select CPU_HAS_NO_UNALIGNED
	help
	  The Freescale (was then Motorola) CPU32 is a CPU core that is
	  based on the 68020 processor. For the most part it is used in
	  System-On-Chip parts, and does not contain a paging MMU.

config M68020
	bool "68020 support"
	depends on MMU
	select CPU_HAS_ADDRESS_SPACES
	help
	  If you anticipate running this kernel on a computer with a MC68020
	  processor, say Y. Otherwise, say N. Note that the 68020 requires a
	  68851 MMU (Memory Management Unit) to run Linux/m68k, except on the
	  Sun 3, which provides its own version.

config M68030
	bool "68030 support"
	depends on MMU && !MMU_SUN3
	select CPU_HAS_ADDRESS_SPACES
	help
	  If you anticipate running this kernel on a computer with a MC68030
	  processor, say Y. Otherwise, say N. Note that a MC68EC030 will not
	  work, as it does not include an MMU (Memory Management Unit).

config M68040
	bool "68040 support"
	depends on MMU && !MMU_SUN3
	select CPU_HAS_ADDRESS_SPACES
	help
	  If you anticipate running this kernel on a computer with a MC68LC040
	  or MC68040 processor, say Y. Otherwise, say N. Note that an
	  MC68EC040 will not work, as it does not include an MMU (Memory
	  Management Unit).

config M68060
	bool "68060 support"
	depends on MMU && !MMU_SUN3
	select CPU_HAS_ADDRESS_SPACES
	help
	  If you anticipate running this kernel on a computer with a MC68060
	  processor, say Y. Otherwise, say N.

config M68328
	bool "MC68328"
	depends on !MMU
	select M68000
	help
	  Motorola 68328 processor support.

config M68EZ328
	bool "MC68EZ328"
	depends on !MMU
	select M68000
	help
	  Motorola 68EX328 processor support.

config M68VZ328
	bool "MC68VZ328"
	depends on !MMU
	select M68000
	help
	  Motorola 68VZ328 processor support.

config M68360
	bool "MC68360"
	depends on !MMU
	select MCPU32
	help
	  Motorola 68360 processor support.

endif # M68KCLASSIC

if COLDFIRE

config M5206
	bool "MCF5206"
	depends on !MMU
	select COLDFIRE_SW_A7
	select HAVE_MBAR
	help
	  Motorola ColdFire 5206 processor support.

config M5206e
	bool "MCF5206e"
	depends on !MMU
	select COLDFIRE_SW_A7
	select HAVE_MBAR
	help
	  Motorola ColdFire 5206e processor support.

config M520x
	bool "MCF520x"
	depends on !MMU
	select GENERIC_CLOCKEVENTS
	select HAVE_CACHE_SPLIT
	help
	   Freescale Coldfire 5207/5208 processor support.

config M523x
	bool "MCF523x"
	depends on !MMU
	select GENERIC_CLOCKEVENTS
	select HAVE_CACHE_SPLIT
	select HAVE_IPSBAR
	help
	  Freescale Coldfire 5230/1/2/4/5 processor support

config M5249
	bool "MCF5249"
	depends on !MMU
	select COLDFIRE_SW_A7
	select HAVE_MBAR
	help
	  Motorola ColdFire 5249 processor support.

config M525x
	bool "MCF525x"
	depends on !MMU
	select COLDFIRE_SW_A7
	select HAVE_MBAR
	help
	  Freescale (Motorola) Coldfire 5251/5253 processor support.

config M527x
	bool

config M5271
	bool "MCF5271"
	depends on !MMU
	select M527x
	select HAVE_CACHE_SPLIT
	select HAVE_IPSBAR
	select GENERIC_CLOCKEVENTS
	help
	  Freescale (Motorola) ColdFire 5270/5271 processor support.

config M5272
	bool "MCF5272"
	depends on !MMU
	select COLDFIRE_SW_A7
	select HAVE_MBAR
	help
	  Motorola ColdFire 5272 processor support.

config M5275
	bool "MCF5275"
	depends on !MMU
	select M527x
	select HAVE_CACHE_SPLIT
	select HAVE_IPSBAR
	select GENERIC_CLOCKEVENTS
	help
	  Freescale (Motorola) ColdFire 5274/5275 processor support.

config M528x
	bool "MCF528x"
	depends on !MMU
	select GENERIC_CLOCKEVENTS
	select HAVE_CACHE_SPLIT
	select HAVE_IPSBAR
	help
	  Motorola ColdFire 5280/5282 processor support.

config M5307
	bool "MCF5307"
	depends on !MMU
	select COLDFIRE_SW_A7
	select HAVE_CACHE_CB
	select HAVE_MBAR
	help
	  Motorola ColdFire 5307 processor support.

config M53xx
	bool

config M532x
	bool "MCF532x"
	depends on !MMU
	select M53xx
	select HAVE_CACHE_CB
	help
	  Freescale (Motorola) ColdFire 532x processor support.

config M5407
	bool "MCF5407"
	depends on !MMU
	select COLDFIRE_SW_A7
	select HAVE_CACHE_CB
	select HAVE_MBAR
	help
	  Motorola ColdFire 5407 processor support.

config M54xx
	bool

config M547x
	bool "MCF547x"
	select M54xx
	select MMU_COLDFIRE if MMU
	select HAVE_CACHE_CB
	select HAVE_MBAR
	help
	  Freescale ColdFire 5470/5471/5472/5473/5474/5475 processor support.

config M548x
	bool "MCF548x"
	select MMU_COLDFIRE if MMU
	select M54xx
	select HAVE_CACHE_CB
	select HAVE_MBAR
	help
	  Freescale ColdFire 5480/5481/5482/5483/5484/5485 processor support.

config M5441x
	bool "MCF5441x"
	depends on !MMU
	select GENERIC_CLOCKEVENTS
	select HAVE_CACHE_CB
	help
	  Freescale Coldfire 54410/54415/54416/54417/54418 processor support.

endif # COLDFIRE


comment "Processor Specific Options"

config M68KFPU_EMU
	bool "Math emulation support"
	depends on MMU
	help
	  At some point in the future, this will cause floating-point math
	  instructions to be emulated by the kernel on machines that lack a
	  floating-point math coprocessor.  Thrill-seekers and chronically
	  sleep-deprived psychotic hacker types can say Y now, everyone else
	  should probably wait a while.

config M68KFPU_EMU_EXTRAPREC
	bool "Math emulation extra precision"
	depends on M68KFPU_EMU
	help
	  The fpu uses normally a few bit more during calculations for
	  correct rounding, the emulator can (often) do the same but this
	  extra calculation can cost quite some time, so you can disable
	  it here. The emulator will then "only" calculate with a 64 bit
	  mantissa and round slightly incorrect, what is more than enough
	  for normal usage.

config M68KFPU_EMU_ONLY
	bool "Math emulation only kernel"
	depends on M68KFPU_EMU
	help
	  This option prevents any floating-point instructions from being
	  compiled into the kernel, thereby the kernel doesn't save any
	  floating point context anymore during task switches, so this
	  kernel will only be usable on machines without a floating-point
	  math coprocessor. This makes the kernel a bit faster as no tests
	  needs to be executed whether a floating-point instruction in the
	  kernel should be executed or not.

config ADVANCED
	bool "Advanced configuration options"
	depends on MMU
	---help---
	  This gives you access to some advanced options for the CPU. The
	  defaults should be fine for most users, but these options may make
	  it possible for you to improve performance somewhat if you know what
	  you are doing.

	  Note that the answer to this question won't directly affect the
	  kernel: saying N will just cause the configurator to skip all
	  the questions about these options.

	  Most users should say N to this question.

config RMW_INSNS
	bool "Use read-modify-write instructions"
	depends on ADVANCED
	---help---
	  This allows to use certain instructions that work with indivisible
	  read-modify-write bus cycles. While this is faster than the
	  workaround of disabling interrupts, it can conflict with DMA
	  ( = direct memory access) on many Amiga systems, and it is also said
	  to destabilize other machines. It is very likely that this will
	  cause serious problems on any Amiga or Atari Medusa if set. The only
	  configuration where it should work are 68030-based Ataris, where it
	  apparently improves performance. But you've been warned! Unless you
	  really know what you are doing, say N. Try Y only if you're quite
	  adventurous.

config SINGLE_MEMORY_CHUNK
	bool "Use one physical chunk of memory only" if ADVANCED && !SUN3
	depends on MMU
	default y if SUN3
	select NEED_MULTIPLE_NODES
	help
	  Ignore all but the first contiguous chunk of physical memory for VM
	  purposes.  This will save a few bytes kernel size and may speed up
	  some operations.  Say N if not sure.

config ARCH_DISCONTIGMEM_ENABLE
	def_bool MMU && !SINGLE_MEMORY_CHUNK

config 060_WRITETHROUGH
	bool "Use write-through caching for 68060 supervisor accesses"
	depends on ADVANCED && M68060
	---help---
	  The 68060 generally uses copyback caching of recently accessed data.
	  Copyback caching means that memory writes will be held in an on-chip
	  cache and only written back to memory some time later.  Saying Y
	  here will force supervisor (kernel) accesses to use writethrough
	  caching.  Writethrough caching means that data is written to memory
	  straight away, so that cache and memory data always agree.
	  Writethrough caching is less efficient, but is needed for some
	  drivers on 68060 based systems where the 68060 bus snooping signal
	  is hardwired on.  The 53c710 SCSI driver is known to suffer from
	  this problem.

config M68K_L2_CACHE
	bool
	depends on MAC
	default y

config NODES_SHIFT
	int
	default "3"
	depends on !SINGLE_MEMORY_CHUNK

config CPU_HAS_NO_BITFIELDS
	bool

config CPU_HAS_NO_MULDIV64
	bool

config CPU_HAS_NO_UNALIGNED
	bool

config CPU_HAS_ADDRESS_SPACES
	bool

config FPU
	bool

config COLDFIRE_SW_A7
	bool

config HAVE_CACHE_SPLIT
	bool

config HAVE_CACHE_CB
	bool

config HAVE_MBAR
	bool

config HAVE_IPSBAR
	bool

config CLOCK_SET
	bool "Enable setting the CPU clock frequency"
	depends on COLDFIRE
	default n
	help
	  On some CPU's you do not need to know what the core CPU clock
	  frequency is. On these you can disable clock setting. On some
	  traditional 68K parts, and on all ColdFire parts you need to set
	  the appropriate CPU clock frequency. On these devices many of the
	  onboard peripherals derive their timing from the master CPU clock
	  frequency.

config CLOCK_FREQ
	int "Set the core clock frequency"
	default "66666666"
	depends on CLOCK_SET
	help
	  Define the CPU clock frequency in use. This is the core clock
	  frequency, it may or may not be the same as the external clock
	  crystal fitted to your board. Some processors have an internal
	  PLL and can have their frequency programmed at run time, others
	  use internal dividers. In general the kernel won't setup a PLL
	  if it is fitted (there are some exceptions). This value will be
	  specific to the exact CPU that you are using.

config OLDMASK
	bool "Old mask 5307 (1H55J) silicon"
	depends on M5307
	help
	  Build support for the older revision ColdFire 5307 silicon.
	  Specifically this is the 1H55J mask revision.

if HAVE_CACHE_SPLIT
choice
	prompt "Split Cache Configuration"
	default CACHE_I

config CACHE_I
	bool "Instruction"
	help
	  Use all of the ColdFire CPU cache memory as an instruction cache.

config CACHE_D
	bool "Data"
	help
	  Use all of the ColdFire CPU cache memory as a data cache.

config CACHE_BOTH
	bool "Both"
	help
	  Split the ColdFire CPU cache, and use half as an instruction cache
	  and half as a data cache.
endchoice
endif

if HAVE_CACHE_CB
choice
	prompt "Data cache mode"
	default CACHE_WRITETHRU

config CACHE_WRITETHRU
	bool "Write-through"
	help
	  The ColdFire CPU cache is set into Write-through mode.

config CACHE_COPYBACK
	bool "Copy-back"
	help
	  The ColdFire CPU cache is set into Copy-back mode.
endchoice
endif
Commit	Line	Data
0e152d80 GU	1	comment "Processor Type"
0e152d80 GU	2
ad8f955d GU	3	choice
	4	prompt "CPU family support"
	5	default M68KCLASSIC if MMU
	6	default COLDFIRE if !MMU
	7	help
	8	The Freescale (was Motorola) M68K family of processors implements
	9	the full 68000 processor instruction set.
6b2aac42	10	The Freescale ColdFire family of processors is a modern derivative
ad8f955d GU	11	of the 68000 processor family. They are mainly targeted at embedded
	12	applications, and are all System-On-Chip (SOC) devices, as opposed
	13	to stand alone CPUs. They implement a subset of the original 68000
	14	processor instruction set.
	15	If you anticipate running this kernel on a computer with a classic
	16	MC68xxx processor, select M68KCLASSIC.
	17	If you anticipate running this kernel on a computer with a ColdFire
	18	processor, select COLDFIRE.
	19
	20	config M68KCLASSIC
	21	bool "Classic M68K CPU family support"
	22
	23	config COLDFIRE
	24	bool "Coldfire CPU family support"
	25	select GENERIC_GPIO
eac57949	26	select ARCH_WANT_OPTIONAL_GPIOLIB
7563bbf8	27	select ARCH_HAVE_CUSTOM_GPIO_H
ad8f955d GU	28	select CPU_HAS_NO_BITFIELDS
	29	select CPU_HAS_NO_MULDIV64
	30	select GENERIC_CSUM
e7d6582e	31	select HAVE_CLK
ad8f955d GU	32
	33	endchoice
	34
	35	if M68KCLASSIC
	36
0e152d80	37	config M68000
4674e8d3	38	bool "MC68000"
9da1a84a	39	depends on !MMU
0e152d80	40	select CPU_HAS_NO_BITFIELDS
84f3fb7a	41	select CPU_HAS_NO_MULDIV64
9f1f1180	42	select CPU_HAS_NO_UNALIGNED
7f73bafc	43	select GENERIC_CSUM
0e152d80 GU	44	help
	45	The Freescale (was Motorola) 68000 CPU is the first generation of
	46	the well known M68K family of processors. The CPU core as well as
	47	being available as a stand alone CPU was also used in many
	48	System-On-Chip devices (eg 68328, 68302, etc). It does not contain
	49	a paging MMU.
	50
	51	config MCPU32
	52	bool
	53	select CPU_HAS_NO_BITFIELDS
7df0d27f	54	select CPU_HAS_NO_UNALIGNED
0e152d80 GU	55	help
	56	The Freescale (was then Motorola) CPU32 is a CPU core that is
	57	based on the 68020 processor. For the most part it is used in
	58	System-On-Chip parts, and does not contain a paging MMU.
	59
0e152d80 GU	60	config M68020
	61	bool "68020 support"
	62	depends on MMU
e08d703c	63	select CPU_HAS_ADDRESS_SPACES
0e152d80 GU	64	help
	65	If you anticipate running this kernel on a computer with a MC68020
	66	processor, say Y. Otherwise, say N. Note that the 68020 requires a
	67	68851 MMU (Memory Management Unit) to run Linux/m68k, except on the
	68	Sun 3, which provides its own version.
	69
	70	config M68030
	71	bool "68030 support"
	72	depends on MMU && !MMU_SUN3
e08d703c	73	select CPU_HAS_ADDRESS_SPACES
0e152d80 GU	74	help
	75	If you anticipate running this kernel on a computer with a MC68030
	76	processor, say Y. Otherwise, say N. Note that a MC68EC030 will not
	77	work, as it does not include an MMU (Memory Management Unit).
	78
	79	config M68040
	80	bool "68040 support"
	81	depends on MMU && !MMU_SUN3
e08d703c	82	select CPU_HAS_ADDRESS_SPACES
0e152d80 GU	83	help
	84	If you anticipate running this kernel on a computer with a MC68LC040
	85	or MC68040 processor, say Y. Otherwise, say N. Note that an
	86	MC68EC040 will not work, as it does not include an MMU (Memory
	87	Management Unit).
	88
	89	config M68060
	90	bool "68060 support"
	91	depends on MMU && !MMU_SUN3
e08d703c	92	select CPU_HAS_ADDRESS_SPACES
0e152d80 GU	93	help
	94	If you anticipate running this kernel on a computer with a MC68060
	95	processor, say Y. Otherwise, say N.
	96
	97	config M68328
	98	bool "MC68328"
	99	depends on !MMU
	100	select M68000
	101	help
	102	Motorola 68328 processor support.
	103
	104	config M68EZ328
	105	bool "MC68EZ328"
	106	depends on !MMU
	107	select M68000
	108	help
	109	Motorola 68EX328 processor support.
	110
	111	config M68VZ328
	112	bool "MC68VZ328"
	113	depends on !MMU
	114	select M68000
	115	help
	116	Motorola 68VZ328 processor support.
	117
	118	config M68360
	119	bool "MC68360"
	120	depends on !MMU
	121	select MCPU32
	122	help
	123	Motorola 68360 processor support.
	124
ad8f955d GU	125	endif # M68KCLASSIC
	126
	127	if COLDFIRE
	128
0e152d80 GU	129	config M5206
	130	bool "MCF5206"
	131	depends on !MMU
0e152d80 GU	132	select COLDFIRE_SW_A7
	133	select HAVE_MBAR
	134	help
	135	Motorola ColdFire 5206 processor support.
	136
	137	config M5206e
	138	bool "MCF5206e"
	139	depends on !MMU
0e152d80 GU	140	select COLDFIRE_SW_A7
	141	select HAVE_MBAR
	142	help
	143	Motorola ColdFire 5206e processor support.
	144
	145	config M520x
	146	bool "MCF520x"
	147	depends on !MMU
0e152d80 GU	148	select GENERIC_CLOCKEVENTS
	149	select HAVE_CACHE_SPLIT
	150	help
	151	Freescale Coldfire 5207/5208 processor support.
	152
	153	config M523x
	154	bool "MCF523x"
	155	depends on !MMU
0e152d80 GU	156	select GENERIC_CLOCKEVENTS
	157	select HAVE_CACHE_SPLIT
	158	select HAVE_IPSBAR
	159	help
	160	Freescale Coldfire 5230/1/2/4/5 processor support
	161
	162	config M5249
	163	bool "MCF5249"
	164	depends on !MMU
0e152d80 GU	165	select COLDFIRE_SW_A7
	166	select HAVE_MBAR
	167	help
	168	Motorola ColdFire 5249 processor support.
	169
04e037aa SK	170	config M525x
	171	bool "MCF525x"
	172	depends on !MMU
	173	select COLDFIRE_SW_A7
	174	select HAVE_MBAR
	175	help
	176	Freescale (Motorola) Coldfire 5251/5253 processor support.
	177
0e152d80 GU	178	config M527x
	179	bool
	180
	181	config M5271
	182	bool "MCF5271"
	183	depends on !MMU
0e152d80 GU	184	select M527x
	185	select HAVE_CACHE_SPLIT
	186	select HAVE_IPSBAR
	187	select GENERIC_CLOCKEVENTS
	188	help
	189	Freescale (Motorola) ColdFire 5270/5271 processor support.
	190
	191	config M5272
	192	bool "MCF5272"
	193	depends on !MMU
0e152d80 GU	194	select COLDFIRE_SW_A7
	195	select HAVE_MBAR
	196	help
	197	Motorola ColdFire 5272 processor support.
	198
	199	config M5275
	200	bool "MCF5275"
	201	depends on !MMU
0e152d80 GU	202	select M527x
	203	select HAVE_CACHE_SPLIT
	204	select HAVE_IPSBAR
	205	select GENERIC_CLOCKEVENTS
	206	help
	207	Freescale (Motorola) ColdFire 5274/5275 processor support.
	208
	209	config M528x
	210	bool "MCF528x"
	211	depends on !MMU
0e152d80 GU	212	select GENERIC_CLOCKEVENTS
	213	select HAVE_CACHE_SPLIT
	214	select HAVE_IPSBAR
	215	help
	216	Motorola ColdFire 5280/5282 processor support.
	217
	218	config M5307
	219	bool "MCF5307"
	220	depends on !MMU
0e152d80 GU	221	select COLDFIRE_SW_A7
	222	select HAVE_CACHE_CB
	223	select HAVE_MBAR
	224	help
	225	Motorola ColdFire 5307 processor support.
	226
6eac4027 GU	227	config M53xx
	228	bool
	229
0e152d80 GU	230	config M532x
	231	bool "MCF532x"
	232	depends on !MMU
6eac4027	233	select M53xx
0e152d80 GU	234	select HAVE_CACHE_CB
	235	help
	236	Freescale (Motorola) ColdFire 532x processor support.
	237
	238	config M5407
	239	bool "MCF5407"
	240	depends on !MMU
0e152d80 GU	241	select COLDFIRE_SW_A7
	242	select HAVE_CACHE_CB
	243	select HAVE_MBAR
	244	help
	245	Motorola ColdFire 5407 processor support.
	246
	247	config M54xx
	248	bool
	249
	250	config M547x
	251	bool "MCF547x"
0e152d80	252	select M54xx
1f7034b9	253	select MMU_COLDFIRE if MMU
0e152d80 GU	254	select HAVE_CACHE_CB
	255	select HAVE_MBAR
	256	help
	257	Freescale ColdFire 5470/5471/5472/5473/5474/5475 processor support.
	258
	259	config M548x
	260	bool "MCF548x"
1f7034b9	261	select MMU_COLDFIRE if MMU
0e152d80 GU	262	select M54xx
	263	select HAVE_CACHE_CB
	264	select HAVE_MBAR
	265	help
	266	Freescale ColdFire 5480/5481/5482/5483/5484/5485 processor support.
	267
bea8bcb1 SK	268	config M5441x
	269	bool "MCF5441x"
	270	depends on !MMU
	271	select GENERIC_CLOCKEVENTS
	272	select HAVE_CACHE_CB
	273	help
	274	Freescale Coldfire 54410/54415/54416/54417/54418 processor support.
	275
ad8f955d GU	276	endif # COLDFIRE
ad8f955d GU	277
0e152d80 GU	278
	279	comment "Processor Specific Options"
	280
	281	config M68KFPU_EMU
112f8b12	282	bool "Math emulation support"
0e152d80	283	depends on MMU
0e152d80 GU	284	help
	285	At some point in the future, this will cause floating-point math
	286	instructions to be emulated by the kernel on machines that lack a
	287	floating-point math coprocessor. Thrill-seekers and chronically
	288	sleep-deprived psychotic hacker types can say Y now, everyone else
	289	should probably wait a while.
	290
	291	config M68KFPU_EMU_EXTRAPREC
	292	bool "Math emulation extra precision"
	293	depends on M68KFPU_EMU
	294	help
	295	The fpu uses normally a few bit more during calculations for
	296	correct rounding, the emulator can (often) do the same but this
	297	extra calculation can cost quite some time, so you can disable
	298	it here. The emulator will then "only" calculate with a 64 bit
	299	mantissa and round slightly incorrect, what is more than enough
	300	for normal usage.
	301
	302	config M68KFPU_EMU_ONLY
	303	bool "Math emulation only kernel"
	304	depends on M68KFPU_EMU
	305	help
	306	This option prevents any floating-point instructions from being
	307	compiled into the kernel, thereby the kernel doesn't save any
	308	floating point context anymore during task switches, so this
	309	kernel will only be usable on machines without a floating-point
	310	math coprocessor. This makes the kernel a bit faster as no tests
	311	needs to be executed whether a floating-point instruction in the
	312	kernel should be executed or not.
	313
	314	config ADVANCED
	315	bool "Advanced configuration options"
	316	depends on MMU
	317	---help---
	318	This gives you access to some advanced options for the CPU. The
	319	defaults should be fine for most users, but these options may make
	320	it possible for you to improve performance somewhat if you know what
	321	you are doing.
	322
	323	Note that the answer to this question won't directly affect the
	324	kernel: saying N will just cause the configurator to skip all
	325	the questions about these options.
	326
	327	Most users should say N to this question.
	328
	329	config RMW_INSNS
	330	bool "Use read-modify-write instructions"
	331	depends on ADVANCED
	332	---help---
	333	This allows to use certain instructions that work with indivisible
	334	read-modify-write bus cycles. While this is faster than the
	335	workaround of disabling interrupts, it can conflict with DMA
	336	( = direct memory access) on many Amiga systems, and it is also said
	337	to destabilize other machines. It is very likely that this will
	338	cause serious problems on any Amiga or Atari Medusa if set. The only
	339	configuration where it should work are 68030-based Ataris, where it
	340	apparently improves performance. But you've been warned! Unless you
	341	really know what you are doing, say N. Try Y only if you're quite
	342	adventurous.
	343
	344	config SINGLE_MEMORY_CHUNK
	345	bool "Use one physical chunk of memory only" if ADVANCED && !SUN3
	346	depends on MMU
	347	default y if SUN3
348	select NEED_MULTIPLE_NODES
349	help
350	Ignore all but the first contiguous chunk of physical memory for VM
351	purposes. This will save a few bytes kernel size and may speed up
352	some operations. Say N if not sure.
353
354	config ARCH_DISCONTIGMEM_ENABLE
355	def_bool MMU && !SINGLE_MEMORY_CHUNK
356
357	config 060_WRITETHROUGH
358	bool "Use write-through caching for 68060 supervisor accesses"
359	depends on ADVANCED && M68060
360	---help---
361	The 68060 generally uses copyback caching of recently accessed data.
362	Copyback caching means that memory writes will be held in an on-chip
363	cache and only written back to memory some time later. Saying Y
364	here will force supervisor (kernel) accesses to use writethrough
365	caching. Writethrough caching means that data is written to memory
366	straight away, so that cache and memory data always agree.
367	Writethrough caching is less efficient, but is needed for some
368	drivers on 68060 based systems where the 68060 bus snooping signal
369	is hardwired on. The 53c710 SCSI driver is known to suffer from
370	this problem.
371
372	config M68K_L2_CACHE
373	bool
374	depends on MAC
375	default y
376
377	config NODES_SHIFT
378	int
379	default "3"
380	depends on !SINGLE_MEMORY_CHUNK
381
022613e0 GU	382	config CPU_HAS_NO_BITFIELDS
	383	bool
	384
	385	config CPU_HAS_NO_MULDIV64
	386	bool
	387
9f1f1180 GU	388	config CPU_HAS_NO_UNALIGNED
	389	bool
	390
022613e0 GU	391	config CPU_HAS_ADDRESS_SPACES
	392	bool
	393
0e152d80 GU	394	config FPU
	395	bool
	396
	397	config COLDFIRE_SW_A7
	398	bool
	399
	400	config HAVE_CACHE_SPLIT
	401	bool
	402
	403	config HAVE_CACHE_CB
	404	bool
	405
	406	config HAVE_MBAR
	407	bool
	408
	409	config HAVE_IPSBAR
	410	bool
	411
	412	config CLOCK_SET
	413	bool "Enable setting the CPU clock frequency"
	414	depends on COLDFIRE
	415	default n
	416	help
	417	On some CPU's you do not need to know what the core CPU clock
	418	frequency is. On these you can disable clock setting. On some
	419	traditional 68K parts, and on all ColdFire parts you need to set
	420	the appropriate CPU clock frequency. On these devices many of the
	421	onboard peripherals derive their timing from the master CPU clock
	422	frequency.
	423
	424	config CLOCK_FREQ
	425	int "Set the core clock frequency"
	426	default "66666666"
	427	depends on CLOCK_SET
	428	help
	429	Define the CPU clock frequency in use. This is the core clock
	430	frequency, it may or may not be the same as the external clock
	431	crystal fitted to your board. Some processors have an internal
	432	PLL and can have their frequency programmed at run time, others
	433	use internal dividers. In general the kernel won't setup a PLL
	434	if it is fitted (there are some exceptions). This value will be
	435	specific to the exact CPU that you are using.
	436
	437	config OLDMASK
	438	bool "Old mask 5307 (1H55J) silicon"
	439	depends on M5307
	440	help
	441	Build support for the older revision ColdFire 5307 silicon.
	442	Specifically this is the 1H55J mask revision.
	443
	444	if HAVE_CACHE_SPLIT
	445	choice
	446	prompt "Split Cache Configuration"
	447	default CACHE_I
	448
	449	config CACHE_I
	450	bool "Instruction"
	451	help
	452	Use all of the ColdFire CPU cache memory as an instruction cache.
	453
	454	config CACHE_D
	455	bool "Data"
	456	help
	457	Use all of the ColdFire CPU cache memory as a data cache.
458
459	config CACHE_BOTH
460	bool "Both"
461	help
462	Split the ColdFire CPU cache, and use half as an instruction cache
463	and half as a data cache.
464	endchoice
465	endif
466
467	if HAVE_CACHE_CB
468	choice
469	prompt "Data cache mode"
470	default CACHE_WRITETHRU
471
472	config CACHE_WRITETHRU
473	bool "Write-through"
474	help
475	The ColdFire CPU cache is set into Write-through mode.
476
477	config CACHE_COPYBACK
478	bool "Copy-back"
479	help
480	The ColdFire CPU cache is set into Copy-back mode.
481	endchoice
482	endif
483