[GitHub/mt8127/android_kernel_alcatel_ttab.git] / arch / m68k / Kconfig.cpu

comment "Processor Type"

config M68000
	bool
	select CPU_HAS_NO_BITFIELDS
	help
	  The Freescale (was Motorola) 68000 CPU is the first generation of
	  the well known M68K family of processors. The CPU core as well as
	  being available as a stand alone CPU was also used in many
	  System-On-Chip devices (eg 68328, 68302, etc). It does not contain
	  a paging MMU.

config MCPU32
	bool
	select CPU_HAS_NO_BITFIELDS
	help
	  The Freescale (was then Motorola) CPU32 is a CPU core that is
	  based on the 68020 processor. For the most part it is used in
	  System-On-Chip parts, and does not contain a paging MMU.

config COLDFIRE
	bool
	select GENERIC_GPIO
	select ARCH_REQUIRE_GPIOLIB
	select CPU_HAS_NO_BITFIELDS
	help
	  The Freescale ColdFire family of processors is a modern derivitive
	  of the 68000 processor family. They are mainly targeted at embedded
	  applications, and are all System-On-Chip (SOC) devices, as opposed
	  to stand alone CPUs. They implement a subset of the original 68000
	  processor instruction set.

config M68020
	bool "68020 support"
	depends on MMU
	help
	  If you anticipate running this kernel on a computer with a MC68020
	  processor, say Y. Otherwise, say N. Note that the 68020 requires a
	  68851 MMU (Memory Management Unit) to run Linux/m68k, except on the
	  Sun 3, which provides its own version.

config M68030
	bool "68030 support"
	depends on MMU && !MMU_SUN3
	help
	  If you anticipate running this kernel on a computer with a MC68030
	  processor, say Y. Otherwise, say N. Note that a MC68EC030 will not
	  work, as it does not include an MMU (Memory Management Unit).

config M68040
	bool "68040 support"
	depends on MMU && !MMU_SUN3
	help
	  If you anticipate running this kernel on a computer with a MC68LC040
	  or MC68040 processor, say Y. Otherwise, say N. Note that an
	  MC68EC040 will not work, as it does not include an MMU (Memory
	  Management Unit).

config M68060
	bool "68060 support"
	depends on MMU && !MMU_SUN3
	help
	  If you anticipate running this kernel on a computer with a MC68060
	  processor, say Y. Otherwise, say N.

config M68328
	bool "MC68328"
	depends on !MMU
	select M68000
	help
	  Motorola 68328 processor support.

config M68EZ328
	bool "MC68EZ328"
	depends on !MMU
	select M68000
	help
	  Motorola 68EX328 processor support.

config M68VZ328
	bool "MC68VZ328"
	depends on !MMU
	select M68000
	help
	  Motorola 68VZ328 processor support.

config M68360
	bool "MC68360"
	depends on !MMU
	select MCPU32
	help
	  Motorola 68360 processor support.

config M5206
	bool "MCF5206"
	depends on !MMU
	select COLDFIRE
	select COLDFIRE_SW_A7
	select HAVE_MBAR
	help
	  Motorola ColdFire 5206 processor support.

config M5206e
	bool "MCF5206e"
	depends on !MMU
	select COLDFIRE
	select COLDFIRE_SW_A7
	select HAVE_MBAR
	help
	  Motorola ColdFire 5206e processor support.

config M520x
	bool "MCF520x"
	depends on !MMU
	select COLDFIRE
	select GENERIC_CLOCKEVENTS
	select HAVE_CACHE_SPLIT
	help
	   Freescale Coldfire 5207/5208 processor support.

config M523x
	bool "MCF523x"
	depends on !MMU
	select COLDFIRE
	select GENERIC_CLOCKEVENTS
	select HAVE_CACHE_SPLIT
	select HAVE_IPSBAR
	help
	  Freescale Coldfire 5230/1/2/4/5 processor support

config M5249
	bool "MCF5249"
	depends on !MMU
	select COLDFIRE
	select COLDFIRE_SW_A7
	select HAVE_MBAR
	help
	  Motorola ColdFire 5249 processor support.

config M527x
	bool

config M5271
	bool "MCF5271"
	depends on !MMU
	select COLDFIRE
	select M527x
	select HAVE_CACHE_SPLIT
	select HAVE_IPSBAR
	select GENERIC_CLOCKEVENTS
	help
	  Freescale (Motorola) ColdFire 5270/5271 processor support.

config M5272
	bool "MCF5272"
	depends on !MMU
	select COLDFIRE
	select COLDFIRE_SW_A7
	select HAVE_MBAR
	help
	  Motorola ColdFire 5272 processor support.

config M5275
	bool "MCF5275"
	depends on !MMU
	select COLDFIRE
	select M527x
	select HAVE_CACHE_SPLIT
	select HAVE_IPSBAR
	select GENERIC_CLOCKEVENTS
	help
	  Freescale (Motorola) ColdFire 5274/5275 processor support.

config M528x
	bool "MCF528x"
	depends on !MMU
	select COLDFIRE
	select GENERIC_CLOCKEVENTS
	select HAVE_CACHE_SPLIT
	select HAVE_IPSBAR
	help
	  Motorola ColdFire 5280/5282 processor support.

config M5307
	bool "MCF5307"
	depends on !MMU
	select COLDFIRE
	select COLDFIRE_SW_A7
	select HAVE_CACHE_CB
	select HAVE_MBAR
	help
	  Motorola ColdFire 5307 processor support.

config M532x
	bool "MCF532x"
	depends on !MMU
	select COLDFIRE
	select HAVE_CACHE_CB
	help
	  Freescale (Motorola) ColdFire 532x processor support.

config M5407
	bool "MCF5407"
	depends on !MMU
	select COLDFIRE
	select COLDFIRE_SW_A7
	select HAVE_CACHE_CB
	select HAVE_MBAR
	help
	  Motorola ColdFire 5407 processor support.

config M54xx
	bool

config M547x
	bool "MCF547x"
	depends on !MMU
	select COLDFIRE
	select M54xx
	select HAVE_CACHE_CB
	select HAVE_MBAR
	help
	  Freescale ColdFire 5470/5471/5472/5473/5474/5475 processor support.

config M548x
	bool "MCF548x"
	depends on !MMU
	select COLDFIRE
	select M54xx
	select HAVE_CACHE_CB
	select HAVE_MBAR
	help
	  Freescale ColdFire 5480/5481/5482/5483/5484/5485 processor support.


comment "Processor Specific Options"

config M68KFPU_EMU
	bool "Math emulation support (EXPERIMENTAL)"
	depends on MMU
	depends on EXPERIMENTAL
	help
	  At some point in the future, this will cause floating-point math
	  instructions to be emulated by the kernel on machines that lack a
	  floating-point math coprocessor.  Thrill-seekers and chronically
	  sleep-deprived psychotic hacker types can say Y now, everyone else
	  should probably wait a while.

config M68KFPU_EMU_EXTRAPREC
	bool "Math emulation extra precision"
	depends on M68KFPU_EMU
	help
	  The fpu uses normally a few bit more during calculations for
	  correct rounding, the emulator can (often) do the same but this
	  extra calculation can cost quite some time, so you can disable
	  it here. The emulator will then "only" calculate with a 64 bit
	  mantissa and round slightly incorrect, what is more than enough
	  for normal usage.

config M68KFPU_EMU_ONLY
	bool "Math emulation only kernel"
	depends on M68KFPU_EMU
	help
	  This option prevents any floating-point instructions from being
	  compiled into the kernel, thereby the kernel doesn't save any
	  floating point context anymore during task switches, so this
	  kernel will only be usable on machines without a floating-point
	  math coprocessor. This makes the kernel a bit faster as no tests
	  needs to be executed whether a floating-point instruction in the
	  kernel should be executed or not.

config ADVANCED
	bool "Advanced configuration options"
	depends on MMU
	---help---
	  This gives you access to some advanced options for the CPU. The
	  defaults should be fine for most users, but these options may make
	  it possible for you to improve performance somewhat if you know what
	  you are doing.

	  Note that the answer to this question won't directly affect the
	  kernel: saying N will just cause the configurator to skip all
	  the questions about these options.

	  Most users should say N to this question.

config RMW_INSNS
	bool "Use read-modify-write instructions"
	depends on ADVANCED
	---help---
	  This allows to use certain instructions that work with indivisible
	  read-modify-write bus cycles. While this is faster than the
	  workaround of disabling interrupts, it can conflict with DMA
	  ( = direct memory access) on many Amiga systems, and it is also said
	  to destabilize other machines. It is very likely that this will
	  cause serious problems on any Amiga or Atari Medusa if set. The only
	  configuration where it should work are 68030-based Ataris, where it
	  apparently improves performance. But you've been warned! Unless you
	  really know what you are doing, say N. Try Y only if you're quite
	  adventurous.

config SINGLE_MEMORY_CHUNK
	bool "Use one physical chunk of memory only" if ADVANCED && !SUN3
	depends on MMU
	default y if SUN3
	select NEED_MULTIPLE_NODES
	help
	  Ignore all but the first contiguous chunk of physical memory for VM
	  purposes.  This will save a few bytes kernel size and may speed up
	  some operations.  Say N if not sure.

config ARCH_DISCONTIGMEM_ENABLE
	def_bool MMU && !SINGLE_MEMORY_CHUNK

config 060_WRITETHROUGH
	bool "Use write-through caching for 68060 supervisor accesses"
	depends on ADVANCED && M68060
	---help---
	  The 68060 generally uses copyback caching of recently accessed data.
	  Copyback caching means that memory writes will be held in an on-chip
	  cache and only written back to memory some time later.  Saying Y
	  here will force supervisor (kernel) accesses to use writethrough
	  caching.  Writethrough caching means that data is written to memory
	  straight away, so that cache and memory data always agree.
	  Writethrough caching is less efficient, but is needed for some
	  drivers on 68060 based systems where the 68060 bus snooping signal
	  is hardwired on.  The 53c710 SCSI driver is known to suffer from
	  this problem.

config M68K_L2_CACHE
	bool
	depends on MAC
	default y

config NODES_SHIFT
	int
	default "3"
	depends on !SINGLE_MEMORY_CHUNK

config FPU
	bool

config COLDFIRE_SW_A7
	bool

config HAVE_CACHE_SPLIT
	bool

config HAVE_CACHE_CB
	bool

config HAVE_MBAR
	bool

config HAVE_IPSBAR
	bool

config CLOCK_SET
	bool "Enable setting the CPU clock frequency"
	depends on COLDFIRE
	default n
	help
	  On some CPU's you do not need to know what the core CPU clock
	  frequency is. On these you can disable clock setting. On some
	  traditional 68K parts, and on all ColdFire parts you need to set
	  the appropriate CPU clock frequency. On these devices many of the
	  onboard peripherals derive their timing from the master CPU clock
	  frequency.

config CLOCK_FREQ
	int "Set the core clock frequency"
	default "66666666"
	depends on CLOCK_SET
	help
	  Define the CPU clock frequency in use. This is the core clock
	  frequency, it may or may not be the same as the external clock
	  crystal fitted to your board. Some processors have an internal
	  PLL and can have their frequency programmed at run time, others
	  use internal dividers. In general the kernel won't setup a PLL
	  if it is fitted (there are some exceptions). This value will be
	  specific to the exact CPU that you are using.

config OLDMASK
	bool "Old mask 5307 (1H55J) silicon"
	depends on M5307
	help
	  Build support for the older revision ColdFire 5307 silicon.
	  Specifically this is the 1H55J mask revision.

if HAVE_CACHE_SPLIT
choice
	prompt "Split Cache Configuration"
	default CACHE_I

config CACHE_I
	bool "Instruction"
	help
	  Use all of the ColdFire CPU cache memory as an instruction cache.

config CACHE_D
	bool "Data"
	help
	  Use all of the ColdFire CPU cache memory as a data cache.

config CACHE_BOTH
	bool "Both"
	help
	  Split the ColdFire CPU cache, and use half as an instruction cache
	  and half as a data cache.
endchoice
endif

if HAVE_CACHE_CB
choice
	prompt "Data cache mode"
	default CACHE_WRITETHRU

config CACHE_WRITETHRU
	bool "Write-through"
	help
	  The ColdFire CPU cache is set into Write-through mode.

config CACHE_COPYBACK
	bool "Copy-back"
	help
	  The ColdFire CPU cache is set into Copy-back mode.
endchoice
endif
Commit	Line	Data
0e152d80 GU	1	comment "Processor Type"
	2
	3	config M68000
	4	bool
	5	select CPU_HAS_NO_BITFIELDS
	6	help
	7	The Freescale (was Motorola) 68000 CPU is the first generation of
	8	the well known M68K family of processors. The CPU core as well as
	9	being available as a stand alone CPU was also used in many
	10	System-On-Chip devices (eg 68328, 68302, etc). It does not contain
	11	a paging MMU.
	12
	13	config MCPU32
	14	bool
	15	select CPU_HAS_NO_BITFIELDS
	16	help
	17	The Freescale (was then Motorola) CPU32 is a CPU core that is
	18	based on the 68020 processor. For the most part it is used in
	19	System-On-Chip parts, and does not contain a paging MMU.
	20
	21	config COLDFIRE
	22	bool
	23	select GENERIC_GPIO
	24	select ARCH_REQUIRE_GPIOLIB
	25	select CPU_HAS_NO_BITFIELDS
	26	help
	27	The Freescale ColdFire family of processors is a modern derivitive
	28	of the 68000 processor family. They are mainly targeted at embedded
	29	applications, and are all System-On-Chip (SOC) devices, as opposed
	30	to stand alone CPUs. They implement a subset of the original 68000
	31	processor instruction set.
	32
	33	config M68020
	34	bool "68020 support"
	35	depends on MMU
	36	help
	37	If you anticipate running this kernel on a computer with a MC68020
	38	processor, say Y. Otherwise, say N. Note that the 68020 requires a
	39	68851 MMU (Memory Management Unit) to run Linux/m68k, except on the
	40	Sun 3, which provides its own version.
	41
	42	config M68030
	43	bool "68030 support"
	44	depends on MMU && !MMU_SUN3
	45	help
	46	If you anticipate running this kernel on a computer with a MC68030
	47	processor, say Y. Otherwise, say N. Note that a MC68EC030 will not
	48	work, as it does not include an MMU (Memory Management Unit).
	49
	50	config M68040
	51	bool "68040 support"
	52	depends on MMU && !MMU_SUN3
	53	help
	54	If you anticipate running this kernel on a computer with a MC68LC040
	55	or MC68040 processor, say Y. Otherwise, say N. Note that an
	56	MC68EC040 will not work, as it does not include an MMU (Memory
	57	Management Unit).
	58
	59	config M68060
	60	bool "68060 support"
	61	depends on MMU && !MMU_SUN3
	62	help
	63	If you anticipate running this kernel on a computer with a MC68060
	64	processor, say Y. Otherwise, say N.
65
66	config M68328
67	bool "MC68328"
68	depends on !MMU
69	select M68000
70	help
71	Motorola 68328 processor support.
72
73	config M68EZ328
74	bool "MC68EZ328"
75	depends on !MMU
76	select M68000
77	help
78	Motorola 68EX328 processor support.
79
80	config M68VZ328
81	bool "MC68VZ328"
82	depends on !MMU
83	select M68000
84	help
85	Motorola 68VZ328 processor support.
86
87	config M68360
88	bool "MC68360"
89	depends on !MMU
90	select MCPU32
91	help
92	Motorola 68360 processor support.
93
94	config M5206
95	bool "MCF5206"
96	depends on !MMU
97	select COLDFIRE
98	select COLDFIRE_SW_A7
99	select HAVE_MBAR
100	help
101	Motorola ColdFire 5206 processor support.
102
103	config M5206e
104	bool "MCF5206e"
105	depends on !MMU
106	select COLDFIRE
107	select COLDFIRE_SW_A7
108	select HAVE_MBAR
109	help
110	Motorola ColdFire 5206e processor support.
111
112	config M520x
113	bool "MCF520x"
114	depends on !MMU
115	select COLDFIRE
116	select GENERIC_CLOCKEVENTS
117	select HAVE_CACHE_SPLIT
118	help
119	Freescale Coldfire 5207/5208 processor support.
120
121	config M523x
122	bool "MCF523x"
123	depends on !MMU
124	select COLDFIRE
125	select GENERIC_CLOCKEVENTS
126	select HAVE_CACHE_SPLIT
127	select HAVE_IPSBAR
128	help
129	Freescale Coldfire 5230/1/2/4/5 processor support
130
131	config M5249
132	bool "MCF5249"
133	depends on !MMU
134	select COLDFIRE
135	select COLDFIRE_SW_A7
136	select HAVE_MBAR
137	help
138	Motorola ColdFire 5249 processor support.
139
140	config M527x
141	bool
142
143	config M5271
144	bool "MCF5271"
145	depends on !MMU
146	select COLDFIRE
147	select M527x
148	select HAVE_CACHE_SPLIT
149	select HAVE_IPSBAR
150	select GENERIC_CLOCKEVENTS
151	help
152	Freescale (Motorola) ColdFire 5270/5271 processor support.
153
154	config M5272
155	bool "MCF5272"
156	depends on !MMU
157	select COLDFIRE
158	select COLDFIRE_SW_A7
159	select HAVE_MBAR
160	help
161	Motorola ColdFire 5272 processor support.
162
163	config M5275
164	bool "MCF5275"
165	depends on !MMU
166	select COLDFIRE
167	select M527x
168	select HAVE_CACHE_SPLIT
169	select HAVE_IPSBAR
170	select GENERIC_CLOCKEVENTS
171	help
172	Freescale (Motorola) ColdFire 5274/5275 processor support.
173
174	config M528x
175	bool "MCF528x"
176	depends on !MMU
177	select COLDFIRE
178	select GENERIC_CLOCKEVENTS
179	select HAVE_CACHE_SPLIT
180	select HAVE_IPSBAR
181	help
182	Motorola ColdFire 5280/5282 processor support.
183
184	config M5307
185	bool "MCF5307"
186	depends on !MMU
187	select COLDFIRE
188	select COLDFIRE_SW_A7
189	select HAVE_CACHE_CB
190	select HAVE_MBAR
191	help
192	Motorola ColdFire 5307 processor support.
193
194	config M532x
195	bool "MCF532x"
196	depends on !MMU
197	select COLDFIRE
198	select HAVE_CACHE_CB
199	help
200	Freescale (Motorola) ColdFire 532x processor support.
201
202	config M5407
203	bool "MCF5407"
204	depends on !MMU
205	select COLDFIRE
206	select COLDFIRE_SW_A7
207	select HAVE_CACHE_CB
208	select HAVE_MBAR
209	help
210	Motorola ColdFire 5407 processor support.
211
212	config M54xx
213	bool
214
215	config M547x
216	bool "MCF547x"
217	depends on !MMU
218	select COLDFIRE
219	select M54xx
220	select HAVE_CACHE_CB
221	select HAVE_MBAR
222	help
223	Freescale ColdFire 5470/5471/5472/5473/5474/5475 processor support.
224
225	config M548x
226	bool "MCF548x"
227	depends on !MMU
228	select COLDFIRE
229	select M54xx
230	select HAVE_CACHE_CB
231	select HAVE_MBAR
232	help
233	Freescale ColdFire 5480/5481/5482/5483/5484/5485 processor support.
234
235
236	comment "Processor Specific Options"
237
238	config M68KFPU_EMU
239	bool "Math emulation support (EXPERIMENTAL)"
240	depends on MMU
241	depends on EXPERIMENTAL
242	help
243	At some point in the future, this will cause floating-point math
244	instructions to be emulated by the kernel on machines that lack a
245	floating-point math coprocessor. Thrill-seekers and chronically
246	sleep-deprived psychotic hacker types can say Y now, everyone else
247	should probably wait a while.
248
249	config M68KFPU_EMU_EXTRAPREC
250	bool "Math emulation extra precision"
251	depends on M68KFPU_EMU
252	help
253	The fpu uses normally a few bit more during calculations for
254	correct rounding, the emulator can (often) do the same but this
255	extra calculation can cost quite some time, so you can disable
256	it here. The emulator will then "only" calculate with a 64 bit
257	mantissa and round slightly incorrect, what is more than enough
258	for normal usage.
259
260	config M68KFPU_EMU_ONLY
261	bool "Math emulation only kernel"
262	depends on M68KFPU_EMU
263	help
264	This option prevents any floating-point instructions from being
265	compiled into the kernel, thereby the kernel doesn't save any
266	floating point context anymore during task switches, so this
267	kernel will only be usable on machines without a floating-point
268	math coprocessor. This makes the kernel a bit faster as no tests
269	needs to be executed whether a floating-point instruction in the
270	kernel should be executed or not.
271
272	config ADVANCED
273	bool "Advanced configuration options"
274	depends on MMU
275	---help---
276	This gives you access to some advanced options for the CPU. The
277	defaults should be fine for most users, but these options may make
278	it possible for you to improve performance somewhat if you know what
279	you are doing.
280
281	Note that the answer to this question won't directly affect the
282	kernel: saying N will just cause the configurator to skip all
283	the questions about these options.
284
285	Most users should say N to this question.
286
287	config RMW_INSNS
288	bool "Use read-modify-write instructions"
289	depends on ADVANCED
290	---help---
291	This allows to use certain instructions that work with indivisible
292	read-modify-write bus cycles. While this is faster than the
293	workaround of disabling interrupts, it can conflict with DMA
294	( = direct memory access) on many Amiga systems, and it is also said
295	to destabilize other machines. It is very likely that this will
296	cause serious problems on any Amiga or Atari Medusa if set. The only
297	configuration where it should work are 68030-based Ataris, where it
298	apparently improves performance. But you've been warned! Unless you
299	really know what you are doing, say N. Try Y only if you're quite
300	adventurous.
301
302	config SINGLE_MEMORY_CHUNK
303	bool "Use one physical chunk of memory only" if ADVANCED && !SUN3
304	depends on MMU
305	default y if SUN3
306	select NEED_MULTIPLE_NODES
307	help
308	Ignore all but the first contiguous chunk of physical memory for VM
309	purposes. This will save a few bytes kernel size and may speed up
310	some operations. Say N if not sure.
311
312	config ARCH_DISCONTIGMEM_ENABLE
313	def_bool MMU && !SINGLE_MEMORY_CHUNK
314
315	config 060_WRITETHROUGH
316	bool "Use write-through caching for 68060 supervisor accesses"
317	depends on ADVANCED && M68060
318	---help---
319	The 68060 generally uses copyback caching of recently accessed data.
320	Copyback caching means that memory writes will be held in an on-chip
321	cache and only written back to memory some time later. Saying Y
322	here will force supervisor (kernel) accesses to use writethrough
323	caching. Writethrough caching means that data is written to memory
324	straight away, so that cache and memory data always agree.
325	Writethrough caching is less efficient, but is needed for some
326	drivers on 68060 based systems where the 68060 bus snooping signal
327	is hardwired on. The 53c710 SCSI driver is known to suffer from
328	this problem.
329
330	config M68K_L2_CACHE
331	bool
332	depends on MAC
333	default y
334
335	config NODES_SHIFT
336	int
337	default "3"
338	depends on !SINGLE_MEMORY_CHUNK
339
340	config FPU
341	bool
342
343	config COLDFIRE_SW_A7
344	bool
345
346	config HAVE_CACHE_SPLIT
347	bool
348
349	config HAVE_CACHE_CB
350	bool
351
352	config HAVE_MBAR
353	bool
354
355	config HAVE_IPSBAR
356	bool
357
358	config CLOCK_SET
359	bool "Enable setting the CPU clock frequency"
360	depends on COLDFIRE
361	default n
362	help
363	On some CPU's you do not need to know what the core CPU clock
364	frequency is. On these you can disable clock setting. On some
365	traditional 68K parts, and on all ColdFire parts you need to set
366	the appropriate CPU clock frequency. On these devices many of the
367	onboard peripherals derive their timing from the master CPU clock
368	frequency.
369
370	config CLOCK_FREQ
371	int "Set the core clock frequency"
372	default "66666666"
373	depends on CLOCK_SET
374	help
375	Define the CPU clock frequency in use. This is the core clock
376	frequency, it may or may not be the same as the external clock
377	crystal fitted to your board. Some processors have an internal
378	PLL and can have their frequency programmed at run time, others
379	use internal dividers. In general the kernel won't setup a PLL
380	if it is fitted (there are some exceptions). This value will be
381	specific to the exact CPU that you are using.
382
383	config OLDMASK
384	bool "Old mask 5307 (1H55J) silicon"
385	depends on M5307
386	help
387	Build support for the older revision ColdFire 5307 silicon.
388	Specifically this is the 1H55J mask revision.
389
390	if HAVE_CACHE_SPLIT
391	choice
392	prompt "Split Cache Configuration"
393	default CACHE_I
394
395	config CACHE_I
396	bool "Instruction"
397	help
398	Use all of the ColdFire CPU cache memory as an instruction cache.
399
400	config CACHE_D
401	bool "Data"
402	help
403	Use all of the ColdFire CPU cache memory as a data cache.
404
405	config CACHE_BOTH
406	bool "Both"
407	help
408	Split the ColdFire CPU cache, and use half as an instruction cache
409	and half as a data cache.
410	endchoice
411	endif
412
413	if HAVE_CACHE_CB
414	choice
415	prompt "Data cache mode"
416	default CACHE_WRITETHRU
417
418	config CACHE_WRITETHRU
419	bool "Write-through"
420	help
421	The ColdFire CPU cache is set into Write-through mode.
422
423	config CACHE_COPYBACK
424	bool "Copy-back"
425	help
426	The ColdFire CPU cache is set into Copy-back mode.
427	endchoice
428	endif
429