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7477de98 IY |
1 | /****************************************************************************** |
2 | * arch/ia64/xen/irq_xen.c | |
3 | * | |
4 | * Copyright (c) 2008 Isaku Yamahata <yamahata at valinux co jp> | |
5 | * VA Linux Systems Japan K.K. | |
6 | * | |
7 | * This program is free software; you can redistribute it and/or modify | |
8 | * it under the terms of the GNU General Public License as published by | |
9 | * the Free Software Foundation; either version 2 of the License, or | |
10 | * (at your option) any later version. | |
11 | * | |
12 | * This program is distributed in the hope that it will be useful, | |
13 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
14 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
15 | * GNU General Public License for more details. | |
16 | * | |
17 | * You should have received a copy of the GNU General Public License | |
18 | * along with this program; if not, write to the Free Software | |
19 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | |
20 | * | |
21 | */ | |
22 | ||
23 | #include <linux/cpu.h> | |
24 | ||
25 | #include <xen/interface/xen.h> | |
26 | #include <xen/interface/callback.h> | |
27 | #include <xen/events.h> | |
28 | ||
29 | #include <asm/xen/privop.h> | |
30 | ||
31 | #include "irq_xen.h" | |
32 | ||
33 | /*************************************************************************** | |
34 | * pv_irq_ops | |
35 | * irq operations | |
36 | */ | |
37 | ||
38 | static int | |
39 | xen_assign_irq_vector(int irq) | |
40 | { | |
41 | struct physdev_irq irq_op; | |
42 | ||
43 | irq_op.irq = irq; | |
44 | if (HYPERVISOR_physdev_op(PHYSDEVOP_alloc_irq_vector, &irq_op)) | |
45 | return -ENOSPC; | |
46 | ||
47 | return irq_op.vector; | |
48 | } | |
49 | ||
50 | static void | |
51 | xen_free_irq_vector(int vector) | |
52 | { | |
53 | struct physdev_irq irq_op; | |
54 | ||
55 | if (vector < IA64_FIRST_DEVICE_VECTOR || | |
56 | vector > IA64_LAST_DEVICE_VECTOR) | |
57 | return; | |
58 | ||
59 | irq_op.vector = vector; | |
60 | if (HYPERVISOR_physdev_op(PHYSDEVOP_free_irq_vector, &irq_op)) | |
61 | printk(KERN_WARNING "%s: xen_free_irq_vecotr fail vector=%d\n", | |
62 | __func__, vector); | |
63 | } | |
64 | ||
65 | ||
c6e22f9e TH |
66 | static DEFINE_PER_CPU(int, xen_timer_irq) = -1; |
67 | static DEFINE_PER_CPU(int, xen_ipi_irq) = -1; | |
68 | static DEFINE_PER_CPU(int, xen_resched_irq) = -1; | |
69 | static DEFINE_PER_CPU(int, xen_cmc_irq) = -1; | |
70 | static DEFINE_PER_CPU(int, xen_cmcp_irq) = -1; | |
71 | static DEFINE_PER_CPU(int, xen_cpep_irq) = -1; | |
7477de98 | 72 | #define NAME_SIZE 15 |
c6e22f9e TH |
73 | static DEFINE_PER_CPU(char[NAME_SIZE], xen_timer_name); |
74 | static DEFINE_PER_CPU(char[NAME_SIZE], xen_ipi_name); | |
75 | static DEFINE_PER_CPU(char[NAME_SIZE], xen_resched_name); | |
76 | static DEFINE_PER_CPU(char[NAME_SIZE], xen_cmc_name); | |
77 | static DEFINE_PER_CPU(char[NAME_SIZE], xen_cmcp_name); | |
78 | static DEFINE_PER_CPU(char[NAME_SIZE], xen_cpep_name); | |
7477de98 IY |
79 | #undef NAME_SIZE |
80 | ||
81 | struct saved_irq { | |
82 | unsigned int irq; | |
83 | struct irqaction *action; | |
84 | }; | |
85 | /* 16 should be far optimistic value, since only several percpu irqs | |
86 | * are registered early. | |
87 | */ | |
88 | #define MAX_LATE_IRQ 16 | |
89 | static struct saved_irq saved_percpu_irqs[MAX_LATE_IRQ]; | |
90 | static unsigned short late_irq_cnt; | |
91 | static unsigned short saved_irq_cnt; | |
92 | static int xen_slab_ready; | |
93 | ||
94 | #ifdef CONFIG_SMP | |
95 | /* Dummy stub. Though we may check XEN_RESCHEDULE_VECTOR before __do_IRQ, | |
96 | * it ends up to issue several memory accesses upon percpu data and | |
97 | * thus adds unnecessary traffic to other paths. | |
98 | */ | |
99 | static irqreturn_t | |
100 | xen_dummy_handler(int irq, void *dev_id) | |
101 | { | |
102 | ||
103 | return IRQ_HANDLED; | |
104 | } | |
105 | ||
106 | static struct irqaction xen_ipi_irqaction = { | |
107 | .handler = handle_IPI, | |
108 | .flags = IRQF_DISABLED, | |
109 | .name = "IPI" | |
110 | }; | |
111 | ||
112 | static struct irqaction xen_resched_irqaction = { | |
113 | .handler = xen_dummy_handler, | |
114 | .flags = IRQF_DISABLED, | |
115 | .name = "resched" | |
116 | }; | |
117 | ||
118 | static struct irqaction xen_tlb_irqaction = { | |
119 | .handler = xen_dummy_handler, | |
120 | .flags = IRQF_DISABLED, | |
121 | .name = "tlb_flush" | |
122 | }; | |
123 | #endif | |
124 | ||
125 | /* | |
126 | * This is xen version percpu irq registration, which needs bind | |
127 | * to xen specific evtchn sub-system. One trick here is that xen | |
128 | * evtchn binding interface depends on kmalloc because related | |
129 | * port needs to be freed at device/cpu down. So we cache the | |
130 | * registration on BSP before slab is ready and then deal them | |
131 | * at later point. For rest instances happening after slab ready, | |
132 | * we hook them to xen evtchn immediately. | |
133 | * | |
134 | * FIXME: MCA is not supported by far, and thus "nomca" boot param is | |
135 | * required. | |
136 | */ | |
137 | static void | |
138 | __xen_register_percpu_irq(unsigned int cpu, unsigned int vec, | |
139 | struct irqaction *action, int save) | |
140 | { | |
7477de98 IY |
141 | int irq = 0; |
142 | ||
143 | if (xen_slab_ready) { | |
144 | switch (vec) { | |
145 | case IA64_TIMER_VECTOR: | |
c6e22f9e TH |
146 | snprintf(per_cpu(xen_timer_name, cpu), |
147 | sizeof(per_cpu(xen_timer_name, cpu)), | |
7477de98 IY |
148 | "%s%d", action->name, cpu); |
149 | irq = bind_virq_to_irqhandler(VIRQ_ITC, cpu, | |
150 | action->handler, action->flags, | |
c6e22f9e TH |
151 | per_cpu(xen_timer_name, cpu), action->dev_id); |
152 | per_cpu(xen_timer_irq, cpu) = irq; | |
7477de98 IY |
153 | break; |
154 | case IA64_IPI_RESCHEDULE: | |
c6e22f9e TH |
155 | snprintf(per_cpu(xen_resched_name, cpu), |
156 | sizeof(per_cpu(xen_resched_name, cpu)), | |
7477de98 IY |
157 | "%s%d", action->name, cpu); |
158 | irq = bind_ipi_to_irqhandler(XEN_RESCHEDULE_VECTOR, cpu, | |
159 | action->handler, action->flags, | |
c6e22f9e TH |
160 | per_cpu(xen_resched_name, cpu), action->dev_id); |
161 | per_cpu(xen_resched_irq, cpu) = irq; | |
7477de98 IY |
162 | break; |
163 | case IA64_IPI_VECTOR: | |
c6e22f9e TH |
164 | snprintf(per_cpu(xen_ipi_name, cpu), |
165 | sizeof(per_cpu(xen_ipi_name, cpu)), | |
7477de98 IY |
166 | "%s%d", action->name, cpu); |
167 | irq = bind_ipi_to_irqhandler(XEN_IPI_VECTOR, cpu, | |
168 | action->handler, action->flags, | |
c6e22f9e TH |
169 | per_cpu(xen_ipi_name, cpu), action->dev_id); |
170 | per_cpu(xen_ipi_irq, cpu) = irq; | |
7477de98 IY |
171 | break; |
172 | case IA64_CMC_VECTOR: | |
c6e22f9e TH |
173 | snprintf(per_cpu(xen_cmc_name, cpu), |
174 | sizeof(per_cpu(xen_cmc_name, cpu)), | |
7477de98 IY |
175 | "%s%d", action->name, cpu); |
176 | irq = bind_virq_to_irqhandler(VIRQ_MCA_CMC, cpu, | |
c6e22f9e TH |
177 | action->handler, |
178 | action->flags, | |
179 | per_cpu(xen_cmc_name, cpu), | |
180 | action->dev_id); | |
181 | per_cpu(xen_cmc_irq, cpu) = irq; | |
7477de98 IY |
182 | break; |
183 | case IA64_CMCP_VECTOR: | |
c6e22f9e TH |
184 | snprintf(per_cpu(xen_cmcp_name, cpu), |
185 | sizeof(per_cpu(xen_cmcp_name, cpu)), | |
7477de98 IY |
186 | "%s%d", action->name, cpu); |
187 | irq = bind_ipi_to_irqhandler(XEN_CMCP_VECTOR, cpu, | |
c6e22f9e TH |
188 | action->handler, |
189 | action->flags, | |
190 | per_cpu(xen_cmcp_name, cpu), | |
191 | action->dev_id); | |
192 | per_cpu(xen_cmcp_irq, cpu) = irq; | |
7477de98 IY |
193 | break; |
194 | case IA64_CPEP_VECTOR: | |
c6e22f9e TH |
195 | snprintf(per_cpu(xen_cpep_name, cpu), |
196 | sizeof(per_cpu(xen_cpep_name, cpu)), | |
7477de98 IY |
197 | "%s%d", action->name, cpu); |
198 | irq = bind_ipi_to_irqhandler(XEN_CPEP_VECTOR, cpu, | |
c6e22f9e TH |
199 | action->handler, |
200 | action->flags, | |
201 | per_cpu(xen_cpep_name, cpu), | |
202 | action->dev_id); | |
203 | per_cpu(xen_cpep_irq, cpu) = irq; | |
7477de98 IY |
204 | break; |
205 | case IA64_CPE_VECTOR: | |
206 | case IA64_MCA_RENDEZ_VECTOR: | |
207 | case IA64_PERFMON_VECTOR: | |
208 | case IA64_MCA_WAKEUP_VECTOR: | |
209 | case IA64_SPURIOUS_INT_VECTOR: | |
210 | /* No need to complain, these aren't supported. */ | |
211 | break; | |
212 | default: | |
213 | printk(KERN_WARNING "Percpu irq %d is unsupported " | |
214 | "by xen!\n", vec); | |
215 | break; | |
216 | } | |
217 | BUG_ON(irq < 0); | |
218 | ||
219 | if (irq > 0) { | |
220 | /* | |
221 | * Mark percpu. Without this, migrate_irqs() will | |
222 | * mark the interrupt for migrations and trigger it | |
223 | * on cpu hotplug. | |
224 | */ | |
41ef0203 | 225 | irq_set_status_flags(irq, IRQ_PER_CPU); |
7477de98 IY |
226 | } |
227 | } | |
228 | ||
229 | /* For BSP, we cache registered percpu irqs, and then re-walk | |
230 | * them when initializing APs | |
231 | */ | |
232 | if (!cpu && save) { | |
233 | BUG_ON(saved_irq_cnt == MAX_LATE_IRQ); | |
234 | saved_percpu_irqs[saved_irq_cnt].irq = vec; | |
235 | saved_percpu_irqs[saved_irq_cnt].action = action; | |
236 | saved_irq_cnt++; | |
237 | if (!xen_slab_ready) | |
238 | late_irq_cnt++; | |
239 | } | |
240 | } | |
241 | ||
242 | static void | |
243 | xen_register_percpu_irq(ia64_vector vec, struct irqaction *action) | |
244 | { | |
245 | __xen_register_percpu_irq(smp_processor_id(), vec, action, 1); | |
246 | } | |
247 | ||
248 | static void | |
249 | xen_bind_early_percpu_irq(void) | |
250 | { | |
251 | int i; | |
252 | ||
253 | xen_slab_ready = 1; | |
254 | /* There's no race when accessing this cached array, since only | |
255 | * BSP will face with such step shortly | |
256 | */ | |
257 | for (i = 0; i < late_irq_cnt; i++) | |
258 | __xen_register_percpu_irq(smp_processor_id(), | |
259 | saved_percpu_irqs[i].irq, | |
260 | saved_percpu_irqs[i].action, 0); | |
261 | } | |
262 | ||
263 | /* FIXME: There's no obvious point to check whether slab is ready. So | |
264 | * a hack is used here by utilizing a late time hook. | |
265 | */ | |
266 | ||
267 | #ifdef CONFIG_HOTPLUG_CPU | |
268 | static int __devinit | |
269 | unbind_evtchn_callback(struct notifier_block *nfb, | |
270 | unsigned long action, void *hcpu) | |
271 | { | |
272 | unsigned int cpu = (unsigned long)hcpu; | |
273 | ||
274 | if (action == CPU_DEAD) { | |
275 | /* Unregister evtchn. */ | |
c6e22f9e TH |
276 | if (per_cpu(xen_cpep_irq, cpu) >= 0) { |
277 | unbind_from_irqhandler(per_cpu(xen_cpep_irq, cpu), | |
278 | NULL); | |
279 | per_cpu(xen_cpep_irq, cpu) = -1; | |
7477de98 | 280 | } |
c6e22f9e TH |
281 | if (per_cpu(xen_cmcp_irq, cpu) >= 0) { |
282 | unbind_from_irqhandler(per_cpu(xen_cmcp_irq, cpu), | |
283 | NULL); | |
284 | per_cpu(xen_cmcp_irq, cpu) = -1; | |
7477de98 | 285 | } |
c6e22f9e TH |
286 | if (per_cpu(xen_cmc_irq, cpu) >= 0) { |
287 | unbind_from_irqhandler(per_cpu(xen_cmc_irq, cpu), NULL); | |
288 | per_cpu(xen_cmc_irq, cpu) = -1; | |
7477de98 | 289 | } |
c6e22f9e TH |
290 | if (per_cpu(xen_ipi_irq, cpu) >= 0) { |
291 | unbind_from_irqhandler(per_cpu(xen_ipi_irq, cpu), NULL); | |
292 | per_cpu(xen_ipi_irq, cpu) = -1; | |
7477de98 | 293 | } |
c6e22f9e TH |
294 | if (per_cpu(xen_resched_irq, cpu) >= 0) { |
295 | unbind_from_irqhandler(per_cpu(xen_resched_irq, cpu), | |
296 | NULL); | |
297 | per_cpu(xen_resched_irq, cpu) = -1; | |
7477de98 | 298 | } |
c6e22f9e TH |
299 | if (per_cpu(xen_timer_irq, cpu) >= 0) { |
300 | unbind_from_irqhandler(per_cpu(xen_timer_irq, cpu), | |
301 | NULL); | |
302 | per_cpu(xen_timer_irq, cpu) = -1; | |
7477de98 IY |
303 | } |
304 | } | |
305 | return NOTIFY_OK; | |
306 | } | |
307 | ||
308 | static struct notifier_block unbind_evtchn_notifier = { | |
309 | .notifier_call = unbind_evtchn_callback, | |
310 | .priority = 0 | |
311 | }; | |
312 | #endif | |
313 | ||
314 | void xen_smp_intr_init_early(unsigned int cpu) | |
315 | { | |
316 | #ifdef CONFIG_SMP | |
317 | unsigned int i; | |
318 | ||
319 | for (i = 0; i < saved_irq_cnt; i++) | |
320 | __xen_register_percpu_irq(cpu, saved_percpu_irqs[i].irq, | |
321 | saved_percpu_irqs[i].action, 0); | |
322 | #endif | |
323 | } | |
324 | ||
325 | void xen_smp_intr_init(void) | |
326 | { | |
327 | #ifdef CONFIG_SMP | |
328 | unsigned int cpu = smp_processor_id(); | |
329 | struct callback_register event = { | |
330 | .type = CALLBACKTYPE_event, | |
331 | .address = { .ip = (unsigned long)&xen_event_callback }, | |
332 | }; | |
333 | ||
334 | if (cpu == 0) { | |
335 | /* Initialization was already done for boot cpu. */ | |
336 | #ifdef CONFIG_HOTPLUG_CPU | |
337 | /* Register the notifier only once. */ | |
338 | register_cpu_notifier(&unbind_evtchn_notifier); | |
339 | #endif | |
340 | return; | |
341 | } | |
342 | ||
343 | /* This should be piggyback when setup vcpu guest context */ | |
344 | BUG_ON(HYPERVISOR_callback_op(CALLBACKOP_register, &event)); | |
345 | #endif /* CONFIG_SMP */ | |
346 | } | |
347 | ||
348 | void __init | |
349 | xen_irq_init(void) | |
350 | { | |
351 | struct callback_register event = { | |
352 | .type = CALLBACKTYPE_event, | |
353 | .address = { .ip = (unsigned long)&xen_event_callback }, | |
354 | }; | |
355 | ||
356 | xen_init_IRQ(); | |
357 | BUG_ON(HYPERVISOR_callback_op(CALLBACKOP_register, &event)); | |
358 | late_time_init = xen_bind_early_percpu_irq; | |
359 | } | |
360 | ||
361 | void | |
362 | xen_platform_send_ipi(int cpu, int vector, int delivery_mode, int redirect) | |
363 | { | |
364 | #ifdef CONFIG_SMP | |
365 | /* TODO: we need to call vcpu_up here */ | |
366 | if (unlikely(vector == ap_wakeup_vector)) { | |
367 | /* XXX | |
368 | * This should be in __cpu_up(cpu) in ia64 smpboot.c | |
369 | * like x86. But don't want to modify it, | |
370 | * keep it untouched. | |
371 | */ | |
372 | xen_smp_intr_init_early(cpu); | |
373 | ||
374 | xen_send_ipi(cpu, vector); | |
375 | /* vcpu_prepare_and_up(cpu); */ | |
376 | return; | |
377 | } | |
378 | #endif | |
379 | ||
380 | switch (vector) { | |
381 | case IA64_IPI_VECTOR: | |
382 | xen_send_IPI_one(cpu, XEN_IPI_VECTOR); | |
383 | break; | |
384 | case IA64_IPI_RESCHEDULE: | |
385 | xen_send_IPI_one(cpu, XEN_RESCHEDULE_VECTOR); | |
386 | break; | |
387 | case IA64_CMCP_VECTOR: | |
388 | xen_send_IPI_one(cpu, XEN_CMCP_VECTOR); | |
389 | break; | |
390 | case IA64_CPEP_VECTOR: | |
391 | xen_send_IPI_one(cpu, XEN_CPEP_VECTOR); | |
392 | break; | |
393 | case IA64_TIMER_VECTOR: { | |
394 | /* this is used only once by check_sal_cache_flush() | |
395 | at boot time */ | |
396 | static int used = 0; | |
397 | if (!used) { | |
398 | xen_send_ipi(cpu, IA64_TIMER_VECTOR); | |
399 | used = 1; | |
400 | break; | |
401 | } | |
402 | /* fallthrough */ | |
403 | } | |
404 | default: | |
405 | printk(KERN_WARNING "Unsupported IPI type 0x%x\n", | |
406 | vector); | |
407 | notify_remote_via_irq(0); /* defaults to 0 irq */ | |
408 | break; | |
409 | } | |
410 | } | |
411 | ||
412 | static void __init | |
413 | xen_register_ipi(void) | |
414 | { | |
415 | #ifdef CONFIG_SMP | |
416 | register_percpu_irq(IA64_IPI_VECTOR, &xen_ipi_irqaction); | |
417 | register_percpu_irq(IA64_IPI_RESCHEDULE, &xen_resched_irqaction); | |
418 | register_percpu_irq(IA64_IPI_LOCAL_TLB_FLUSH, &xen_tlb_irqaction); | |
419 | #endif | |
420 | } | |
421 | ||
422 | static void | |
423 | xen_resend_irq(unsigned int vector) | |
424 | { | |
425 | (void)resend_irq_on_evtchn(vector); | |
426 | } | |
427 | ||
428 | const struct pv_irq_ops xen_irq_ops __initdata = { | |
429 | .register_ipi = xen_register_ipi, | |
430 | ||
431 | .assign_irq_vector = xen_assign_irq_vector, | |
432 | .free_irq_vector = xen_free_irq_vector, | |
433 | .register_percpu_irq = xen_register_percpu_irq, | |
434 | ||
435 | .resend_irq = xen_resend_irq, | |
436 | }; |