[GitHub/mt8127/android_kernel_alcatel_ttab.git] / arch / ia64 / kernel / vmlinux.lds.S

#include <linux/config.h>

#include <asm/cache.h>
#include <asm/ptrace.h>
#include <asm/system.h>
#include <asm/pgtable.h>

#define LOAD_OFFSET	(KERNEL_START - KERNEL_TR_PAGE_SIZE)
#include <asm-generic/vmlinux.lds.h>

#define IVT_TEXT							\
		VMLINUX_SYMBOL(__start_ivt_text) = .;			\
		*(.text.ivt)						\
		VMLINUX_SYMBOL(__end_ivt_text) = .;

OUTPUT_FORMAT("elf64-ia64-little")
OUTPUT_ARCH(ia64)
ENTRY(phys_start)
jiffies = jiffies_64;
PHDRS {
  code   PT_LOAD;
  percpu PT_LOAD;
  data   PT_LOAD;
}
SECTIONS
{
  /* Sections to be discarded */
  /DISCARD/ : {
	*(.exit.text)
	*(.exit.data)
	*(.exitcall.exit)
	*(.IA_64.unwind.exit.text)
	*(.IA_64.unwind_info.exit.text)
	}

  v = PAGE_OFFSET;	/* this symbol is here to make debugging easier... */
  phys_start = _start - LOAD_OFFSET;

  code : { } :code
  . = KERNEL_START;

  _text = .;
  _stext = .;

  .text : AT(ADDR(.text) - LOAD_OFFSET)
    {
	IVT_TEXT
	*(.text)
	SCHED_TEXT
	LOCK_TEXT
	KPROBES_TEXT
	*(.gnu.linkonce.t*)
    }
  .text2 : AT(ADDR(.text2) - LOAD_OFFSET)
	{ *(.text2) }
#ifdef CONFIG_SMP
  .text.lock : AT(ADDR(.text.lock) - LOAD_OFFSET)
	{ *(.text.lock) }
#endif
  _etext = .;

  /* Read-only data */

  /* Exception table */
  . = ALIGN(16);
  __ex_table : AT(ADDR(__ex_table) - LOAD_OFFSET)
	{
	  __start___ex_table = .;
	  *(__ex_table)
	  __stop___ex_table = .;
	}

  /* Global data */
  _data = .;

  /* Unwind info & table: */
  . = ALIGN(8);
  .IA_64.unwind_info : AT(ADDR(.IA_64.unwind_info) - LOAD_OFFSET)
	{ *(.IA_64.unwind_info*) }
  .IA_64.unwind : AT(ADDR(.IA_64.unwind) - LOAD_OFFSET)
	{
	  __start_unwind = .;
	  *(.IA_64.unwind*)
	  __end_unwind = .;
	}

  RODATA

  .opd : AT(ADDR(.opd) - LOAD_OFFSET)
	{ *(.opd) }

  /* Initialization code and data: */

  . = ALIGN(PAGE_SIZE);
  __init_begin = .;
  .init.text : AT(ADDR(.init.text) - LOAD_OFFSET)
	{
	  _sinittext = .;
	  *(.init.text)
	  _einittext = .;
	}

  .init.data : AT(ADDR(.init.data) - LOAD_OFFSET)
	{ *(.init.data) }

  .init.ramfs : AT(ADDR(.init.ramfs) - LOAD_OFFSET)
	{
	  __initramfs_start = .;
	  *(.init.ramfs)
	  __initramfs_end = .;
	}

   . = ALIGN(16);
  .init.setup : AT(ADDR(.init.setup) - LOAD_OFFSET)
        {
	  __setup_start = .;
	  *(.init.setup)
	  __setup_end = .;
	}
  .initcall.init : AT(ADDR(.initcall.init) - LOAD_OFFSET)
	{
	  __initcall_start = .;
	  *(.initcall1.init)
	  *(.initcall2.init)
	  *(.initcall3.init)
	  *(.initcall4.init)
	  *(.initcall5.init)
	  *(.initcall6.init)
	  *(.initcall7.init)
	  __initcall_end = .;
	}

  /* MCA table */
  . = ALIGN(16);
  __mca_table : AT(ADDR(__mca_table) - LOAD_OFFSET)
	{
	  __start___mca_table = .;
	  *(__mca_table)
	  __stop___mca_table = .;
	}

  .data.patch.vtop : AT(ADDR(.data.patch.vtop) - LOAD_OFFSET)
	{
	  __start___vtop_patchlist = .;
	  *(.data.patch.vtop)
	  __end___vtop_patchlist = .;
	}

  .data.patch.mckinley_e9 : AT(ADDR(.data.patch.mckinley_e9) - LOAD_OFFSET)
	{
	  __start___mckinley_e9_bundles = .;
	  *(.data.patch.mckinley_e9)
	  __end___mckinley_e9_bundles = .;
	}

#if defined(CONFIG_IA64_GENERIC)
  /* Machine Vector */
  . = ALIGN(16);
  .machvec : AT(ADDR(.machvec) - LOAD_OFFSET)
	{
	  machvec_start = .;
	  *(.machvec)
	  machvec_end = .;
	}
#endif

   __con_initcall_start = .;
  .con_initcall.init : AT(ADDR(.con_initcall.init) - LOAD_OFFSET)
	{ *(.con_initcall.init) }
  __con_initcall_end = .;
  __security_initcall_start = .;
  .security_initcall.init : AT(ADDR(.security_initcall.init) - LOAD_OFFSET)
	{ *(.security_initcall.init) }
  __security_initcall_end = .;
  . = ALIGN(PAGE_SIZE);
  __init_end = .;

  /* The initial task and kernel stack */
  .data.init_task : AT(ADDR(.data.init_task) - LOAD_OFFSET)
	{ *(.data.init_task) }

  .data.page_aligned : AT(ADDR(.data.page_aligned) - LOAD_OFFSET)
        { *(__special_page_section)
	  __start_gate_section = .;
	  *(.data.gate)
	  __stop_gate_section = .;
	}
  . = ALIGN(PAGE_SIZE);		/* make sure the gate page doesn't expose kernel data */

  .data.read_mostly : AT(ADDR(.data.read_mostly) - LOAD_OFFSET)
        { *(.data.read_mostly) }

  .data.cacheline_aligned : AT(ADDR(.data.cacheline_aligned) - LOAD_OFFSET)
        { *(.data.cacheline_aligned) }

  /* Per-cpu data: */
  percpu : { } :percpu
  . = ALIGN(PERCPU_PAGE_SIZE);
  __phys_per_cpu_start = .;
  .data.percpu PERCPU_ADDR : AT(__phys_per_cpu_start - LOAD_OFFSET)
	{
		__per_cpu_start = .;
		*(.data.percpu)
		__per_cpu_end = .;
	}
  . = __phys_per_cpu_start + PERCPU_PAGE_SIZE;	/* ensure percpu data fits into percpu page size */

  data : { } :data
  .data : AT(ADDR(.data) - LOAD_OFFSET)
	{ *(.data) *(.data1) *(.gnu.linkonce.d*) CONSTRUCTORS }

  . = ALIGN(16);	/* gp must be 16-byte aligned for exc. table */
  .got : AT(ADDR(.got) - LOAD_OFFSET)
	{ *(.got.plt) *(.got) }
  __gp = ADDR(.got) + 0x200000;
  /* We want the small data sections together, so single-instruction offsets
     can access them all, and initialized data all before uninitialized, so
     we can shorten the on-disk segment size.  */
  .sdata : AT(ADDR(.sdata) - LOAD_OFFSET)
	{ *(.sdata) *(.sdata1) *(.srdata) }
  _edata  =  .;
  _bss = .;
  .sbss : AT(ADDR(.sbss) - LOAD_OFFSET)
	{ *(.sbss) *(.scommon) }
  .bss : AT(ADDR(.bss) - LOAD_OFFSET)
	{ *(.bss) *(COMMON) }

  _end = .;

  code : { } :code
  /* Stabs debugging sections.  */
  .stab 0 : { *(.stab) }
  .stabstr 0 : { *(.stabstr) }
  .stab.excl 0 : { *(.stab.excl) }
  .stab.exclstr 0 : { *(.stab.exclstr) }
  .stab.index 0 : { *(.stab.index) }
  .stab.indexstr 0 : { *(.stab.indexstr) }
  /* DWARF debug sections.
     Symbols in the DWARF debugging sections are relative to the beginning
     of the section so we begin them at 0.  */
  /* DWARF 1 */
  .debug          0 : { *(.debug) }
  .line           0 : { *(.line) }
  /* GNU DWARF 1 extensions */
  .debug_srcinfo  0 : { *(.debug_srcinfo) }
  .debug_sfnames  0 : { *(.debug_sfnames) }
  /* DWARF 1.1 and DWARF 2 */
  .debug_aranges  0 : { *(.debug_aranges) }
  .debug_pubnames 0 : { *(.debug_pubnames) }
  /* DWARF 2 */
  .debug_info     0 : { *(.debug_info) }
  .debug_abbrev   0 : { *(.debug_abbrev) }
  .debug_line     0 : { *(.debug_line) }
  .debug_frame    0 : { *(.debug_frame) }
  .debug_str      0 : { *(.debug_str) }
  .debug_loc      0 : { *(.debug_loc) }
  .debug_macinfo  0 : { *(.debug_macinfo) }
  /* SGI/MIPS DWARF 2 extensions */
  .debug_weaknames 0 : { *(.debug_weaknames) }
  .debug_funcnames 0 : { *(.debug_funcnames) }
  .debug_typenames 0 : { *(.debug_typenames) }
  .debug_varnames  0 : { *(.debug_varnames) }
  /* These must appear regardless of  .  */
  /* Discard them for now since Intel SoftSDV cannot handle them.
  .comment 0 : { *(.comment) }
  .note 0 : { *(.note) }
  */
  /DISCARD/ : { *(.comment) }
  /DISCARD/ : { *(.note) }
}
Commit	Line	Data
1da177e4 LT	1	#include <linux/config.h>
	2
	3	#include <asm/cache.h>
	4	#include <asm/ptrace.h>
	5	#include <asm/system.h>
	6	#include <asm/pgtable.h>
	7
	8	#define LOAD_OFFSET (KERNEL_START - KERNEL_TR_PAGE_SIZE)
	9	#include <asm-generic/vmlinux.lds.h>
	10
c7b645f9 KA	11	#define IVT_TEXT \
	12	VMLINUX_SYMBOL(__start_ivt_text) = .; \
	13	*(.text.ivt) \
	14	VMLINUX_SYMBOL(__end_ivt_text) = .;
	15
1da177e4 LT	16	OUTPUT_FORMAT("elf64-ia64-little")
	17	OUTPUT_ARCH(ia64)
	18	ENTRY(phys_start)
	19	jiffies = jiffies_64;
	20	PHDRS {
	21	code PT_LOAD;
	22	percpu PT_LOAD;
	23	data PT_LOAD;
	24	}
	25	SECTIONS
	26	{
	27	/* Sections to be discarded */
	28	/DISCARD/ : {
	29	*(.exit.text)
	30	*(.exit.data)
	31	*(.exitcall.exit)
	32	*(.IA_64.unwind.exit.text)
	33	*(.IA_64.unwind_info.exit.text)
	34	}
	35
	36	v = PAGE_OFFSET; /* this symbol is here to make debugging easier... */
	37	phys_start = _start - LOAD_OFFSET;
	38
	39	code : { } :code
	40	. = KERNEL_START;
	41
	42	_text = .;
	43	_stext = .;
	44
	45	.text : AT(ADDR(.text) - LOAD_OFFSET)
	46	{
c7b645f9	47	IVT_TEXT
1da177e4 LT	48	*(.text)
	49	SCHED_TEXT
	50	LOCK_TEXT
1f7ad57b	51	KPROBES_TEXT
1da177e4 LT	52	(.gnu.linkonce.t)
	53	}
	54	.text2 : AT(ADDR(.text2) - LOAD_OFFSET)
	55	{ *(.text2) }
	56	#ifdef CONFIG_SMP
	57	.text.lock : AT(ADDR(.text.lock) - LOAD_OFFSET)
	58	{ *(.text.lock) }
	59	#endif
	60	_etext = .;
	61
	62	/* Read-only data */
	63
	64	/* Exception table */
	65	. = ALIGN(16);
	66	__ex_table : AT(ADDR(__ex_table) - LOAD_OFFSET)
	67	{
	68	__start___ex_table = .;
	69	*(__ex_table)
	70	__stop___ex_table = .;
	71	}
	72
1da177e4 LT	73	/* Global data */
	74	_data = .;
	75
1da177e4 LT	76	/* Unwind info & table: */
	77	. = ALIGN(8);
	78	.IA_64.unwind_info : AT(ADDR(.IA_64.unwind_info) - LOAD_OFFSET)
	79	{ (.IA_64.unwind_info) }
	80	.IA_64.unwind : AT(ADDR(.IA_64.unwind) - LOAD_OFFSET)
	81	{
	82	__start_unwind = .;
	83	(.IA_64.unwind)
	84	__end_unwind = .;
	85	}
	86
	87	RODATA
	88
	89	.opd : AT(ADDR(.opd) - LOAD_OFFSET)
	90	{ *(.opd) }
	91
	92	/* Initialization code and data: */
	93
	94	. = ALIGN(PAGE_SIZE);
	95	__init_begin = .;
	96	.init.text : AT(ADDR(.init.text) - LOAD_OFFSET)
	97	{
	98	_sinittext = .;
	99	*(.init.text)
	100	_einittext = .;
	101	}
	102
	103	.init.data : AT(ADDR(.init.data) - LOAD_OFFSET)
	104	{ *(.init.data) }
	105
	106	.init.ramfs : AT(ADDR(.init.ramfs) - LOAD_OFFSET)
	107	{
	108	__initramfs_start = .;
	109	*(.init.ramfs)
	110	__initramfs_end = .;
	111	}
	112
	113	. = ALIGN(16);
	114	.init.setup : AT(ADDR(.init.setup) - LOAD_OFFSET)
	115	{
	116	__setup_start = .;
	117	*(.init.setup)
	118	__setup_end = .;
	119	}
	120	.initcall.init : AT(ADDR(.initcall.init) - LOAD_OFFSET)
	121	{
	122	__initcall_start = .;
	123	*(.initcall1.init)
	124	*(.initcall2.init)
	125	*(.initcall3.init)
	126	*(.initcall4.init)
	127	*(.initcall5.init)
	128	*(.initcall6.init)
	129	*(.initcall7.init)
	130	__initcall_end = .;
	131	}
39e18de8	132
d2a28ad9 RA	133	/* MCA table */
	134	. = ALIGN(16);
	135	__mca_table : AT(ADDR(__mca_table) - LOAD_OFFSET)
	136	{
	137	__start___mca_table = .;
	138	*(__mca_table)
	139	__stop___mca_table = .;
	140	}
	141
39e18de8 KC	142	.data.patch.vtop : AT(ADDR(.data.patch.vtop) - LOAD_OFFSET)
	143	{
	144	__start___vtop_patchlist = .;
	145	*(.data.patch.vtop)
	146	__end___vtop_patchlist = .;
	147	}
	148
	149	.data.patch.mckinley_e9 : AT(ADDR(.data.patch.mckinley_e9) - LOAD_OFFSET)
	150	{
	151	__start___mckinley_e9_bundles = .;
	152	*(.data.patch.mckinley_e9)
	153	__end___mckinley_e9_bundles = .;
	154	}
	155
	156	#if defined(CONFIG_IA64_GENERIC)
	157	/* Machine Vector */
	158	. = ALIGN(16);
	159	.machvec : AT(ADDR(.machvec) - LOAD_OFFSET)
	160	{
	161	machvec_start = .;
	162	*(.machvec)
	163	machvec_end = .;
	164	}
	165	#endif
	166
1da177e4 LT	167	__con_initcall_start = .;
	168	.con_initcall.init : AT(ADDR(.con_initcall.init) - LOAD_OFFSET)
	169	{ *(.con_initcall.init) }
	170	__con_initcall_end = .;
	171	__security_initcall_start = .;
	172	.security_initcall.init : AT(ADDR(.security_initcall.init) - LOAD_OFFSET)
	173	{ *(.security_initcall.init) }
	174	__security_initcall_end = .;
	175	. = ALIGN(PAGE_SIZE);
	176	__init_end = .;
	177
	178	/* The initial task and kernel stack */
	179	.data.init_task : AT(ADDR(.data.init_task) - LOAD_OFFSET)
	180	{ *(.data.init_task) }
	181
	182	.data.page_aligned : AT(ADDR(.data.page_aligned) - LOAD_OFFSET)
	183	{ *(__special_page_section)
	184	__start_gate_section = .;
	185	*(.data.gate)
	186	__stop_gate_section = .;
	187	}
	188	. = ALIGN(PAGE_SIZE); /* make sure the gate page doesn't expose kernel data */
	189
dc86e88c CL	190	.data.read_mostly : AT(ADDR(.data.read_mostly) - LOAD_OFFSET)
	191	{ *(.data.read_mostly) }
	192
1da177e4 LT	193	.data.cacheline_aligned : AT(ADDR(.data.cacheline_aligned) - LOAD_OFFSET)
	194	{ *(.data.cacheline_aligned) }
	195
	196	/* Per-cpu data: */
	197	percpu : { } :percpu
	198	. = ALIGN(PERCPU_PAGE_SIZE);
	199	__phys_per_cpu_start = .;
	200	.data.percpu PERCPU_ADDR : AT(__phys_per_cpu_start - LOAD_OFFSET)
	201	{
	202	__per_cpu_start = .;
	203	*(.data.percpu)
	204	__per_cpu_end = .;
	205	}
	206	. = __phys_per_cpu_start + PERCPU_PAGE_SIZE; /* ensure percpu data fits into percpu page size */
	207
	208	data : { } :data
	209	.data : AT(ADDR(.data) - LOAD_OFFSET)
	210	{ (.data) (.data1) (.gnu.linkonce.d) CONSTRUCTORS }
	211
	212	. = ALIGN(16); /* gp must be 16-byte aligned for exc. table */
	213	.got : AT(ADDR(.got) - LOAD_OFFSET)
	214	{ (.got.plt) (.got) }
	215	__gp = ADDR(.got) + 0x200000;
	216	/* We want the small data sections together, so single-instruction offsets
	217	can access them all, and initialized data all before uninitialized, so
	218	we can shorten the on-disk segment size. */
	219	.sdata : AT(ADDR(.sdata) - LOAD_OFFSET)
	220	{ (.sdata) (.sdata1) *(.srdata) }
	221	_edata = .;
	222	_bss = .;
	223	.sbss : AT(ADDR(.sbss) - LOAD_OFFSET)
	224	{ (.sbss) (.scommon) }
	225	.bss : AT(ADDR(.bss) - LOAD_OFFSET)
	226	{ (.bss) (COMMON) }
	227
	228	_end = .;
	229
	230	code : { } :code
	231	/* Stabs debugging sections. */
	232	.stab 0 : { *(.stab) }
	233	.stabstr 0 : { *(.stabstr) }
	234	.stab.excl 0 : { *(.stab.excl) }
	235	.stab.exclstr 0 : { *(.stab.exclstr) }
	236	.stab.index 0 : { *(.stab.index) }
	237	.stab.indexstr 0 : { *(.stab.indexstr) }
	238	/* DWARF debug sections.
	239	Symbols in the DWARF debugging sections are relative to the beginning
	240	of the section so we begin them at 0. */
	241	/* DWARF 1 */
	242	.debug 0 : { *(.debug) }
	243	.line 0 : { *(.line) }
	244	/* GNU DWARF 1 extensions */
	245	.debug_srcinfo 0 : { *(.debug_srcinfo) }
	246	.debug_sfnames 0 : { *(.debug_sfnames) }
	247	/* DWARF 1.1 and DWARF 2 */
	248	.debug_aranges 0 : { *(.debug_aranges) }
	249	.debug_pubnames 0 : { *(.debug_pubnames) }
	250	/* DWARF 2 */
	251	.debug_info 0 : { *(.debug_info) }
	252	.debug_abbrev 0 : { *(.debug_abbrev) }
	253	.debug_line 0 : { *(.debug_line) }
	254	.debug_frame 0 : { *(.debug_frame) }
	255	.debug_str 0 : { *(.debug_str) }
	256	.debug_loc 0 : { *(.debug_loc) }
257	.debug_macinfo 0 : { *(.debug_macinfo) }
258	/* SGI/MIPS DWARF 2 extensions */
259	.debug_weaknames 0 : { *(.debug_weaknames) }
260	.debug_funcnames 0 : { *(.debug_funcnames) }
261	.debug_typenames 0 : { *(.debug_typenames) }
262	.debug_varnames 0 : { *(.debug_varnames) }
263	/* These must appear regardless of . */
264	/* Discard them for now since Intel SoftSDV cannot handle them.
265	.comment 0 : { *(.comment) }
266	.note 0 : { *(.note) }
267	*/
268	/DISCARD/ : { *(.comment) }
269	/DISCARD/ : { *(.note) }
270	}