[GitHub/mt8127/android_kernel_alcatel_ttab.git] / arch / ia64 / kernel / vmlinux.lds.S


#include <asm/cache.h>
#include <asm/ptrace.h>
#include <asm/system.h>
#include <asm/pgtable.h>

#define LOAD_OFFSET	(KERNEL_START - KERNEL_TR_PAGE_SIZE)
#include <asm-generic/vmlinux.lds.h>

#define IVT_TEXT							\
		VMLINUX_SYMBOL(__start_ivt_text) = .;			\
		*(.text.ivt)						\
		VMLINUX_SYMBOL(__end_ivt_text) = .;

OUTPUT_FORMAT("elf64-ia64-little")
OUTPUT_ARCH(ia64)
ENTRY(phys_start)
jiffies = jiffies_64;
PHDRS {
  code   PT_LOAD;
  percpu PT_LOAD;
  data   PT_LOAD;
}
SECTIONS
{
  /* Sections to be discarded */
  /DISCARD/ : {
	*(.exit.text)
	*(.exit.data)
	*(.exitcall.exit)
	*(.IA_64.unwind.exit.text)
	*(.IA_64.unwind_info.exit.text)
	}

  v = PAGE_OFFSET;	/* this symbol is here to make debugging easier... */
  phys_start = _start - LOAD_OFFSET;

  code : { } :code
  . = KERNEL_START;

  _text = .;
  _stext = .;

  .text : AT(ADDR(.text) - LOAD_OFFSET)
    {
	IVT_TEXT
	*(.text)
	SCHED_TEXT
	LOCK_TEXT
	KPROBES_TEXT
	*(.gnu.linkonce.t*)
    }
  .text2 : AT(ADDR(.text2) - LOAD_OFFSET)
	{ *(.text2) }
#ifdef CONFIG_SMP
  .text.lock : AT(ADDR(.text.lock) - LOAD_OFFSET)
	{ *(.text.lock) }
#endif
  _etext = .;

  /* Read-only data */

  /* Exception table */
  . = ALIGN(16);
  __ex_table : AT(ADDR(__ex_table) - LOAD_OFFSET)
	{
	  __start___ex_table = .;
	  *(__ex_table)
	  __stop___ex_table = .;
	}

  /* MCA table */
  . = ALIGN(16);
  __mca_table : AT(ADDR(__mca_table) - LOAD_OFFSET)
	{
	  __start___mca_table = .;
	  *(__mca_table)
	  __stop___mca_table = .;
	}

  .data.patch.phys_stack_reg : AT(ADDR(.data.patch.phys_stack_reg) - LOAD_OFFSET)
	{
	  __start___phys_stack_reg_patchlist = .;
	  *(.data.patch.phys_stack_reg)
	  __end___phys_stack_reg_patchlist = .;
	}

  /* Global data */
  _data = .;

  /* Unwind info & table: */
  . = ALIGN(8);
  .IA_64.unwind_info : AT(ADDR(.IA_64.unwind_info) - LOAD_OFFSET)
	{ *(.IA_64.unwind_info*) }
  .IA_64.unwind : AT(ADDR(.IA_64.unwind) - LOAD_OFFSET)
	{
	  __start_unwind = .;
	  *(.IA_64.unwind*)
	  __end_unwind = .;
	}

  RODATA

  .opd : AT(ADDR(.opd) - LOAD_OFFSET)
	{ *(.opd) }

  /* Initialization code and data: */

  . = ALIGN(PAGE_SIZE);
  __init_begin = .;
  .init.text : AT(ADDR(.init.text) - LOAD_OFFSET)
	{
	  _sinittext = .;
	  *(.init.text)
	  _einittext = .;
	}

  .init.data : AT(ADDR(.init.data) - LOAD_OFFSET)
	{ *(.init.data) }

#ifdef CONFIG_BLK_DEV_INITRD
  .init.ramfs : AT(ADDR(.init.ramfs) - LOAD_OFFSET)
	{
	  __initramfs_start = .;
	  *(.init.ramfs)
	  __initramfs_end = .;
	}
#endif

   . = ALIGN(16);
  .init.setup : AT(ADDR(.init.setup) - LOAD_OFFSET)
        {
	  __setup_start = .;
	  *(.init.setup)
	  __setup_end = .;
	}
  .initcall.init : AT(ADDR(.initcall.init) - LOAD_OFFSET)
	{
	  __initcall_start = .;
	INITCALLS
	  __initcall_end = .;
	}

  .data.patch.vtop : AT(ADDR(.data.patch.vtop) - LOAD_OFFSET)
	{
	  __start___vtop_patchlist = .;
	  *(.data.patch.vtop)
	  __end___vtop_patchlist = .;
	}

  .data.patch.mckinley_e9 : AT(ADDR(.data.patch.mckinley_e9) - LOAD_OFFSET)
	{
	  __start___mckinley_e9_bundles = .;
	  *(.data.patch.mckinley_e9)
	  __end___mckinley_e9_bundles = .;
	}

#if defined(CONFIG_IA64_GENERIC)
  /* Machine Vector */
  . = ALIGN(16);
  .machvec : AT(ADDR(.machvec) - LOAD_OFFSET)
	{
	  machvec_start = .;
	  *(.machvec)
	  machvec_end = .;
	}
#endif

  . = ALIGN(8);
   __con_initcall_start = .;
  .con_initcall.init : AT(ADDR(.con_initcall.init) - LOAD_OFFSET)
	{ *(.con_initcall.init) }
  __con_initcall_end = .;
  __security_initcall_start = .;
  .security_initcall.init : AT(ADDR(.security_initcall.init) - LOAD_OFFSET)
	{ *(.security_initcall.init) }
  __security_initcall_end = .;
  . = ALIGN(PAGE_SIZE);
  __init_end = .;

  /* The initial task and kernel stack */
  .data.init_task : AT(ADDR(.data.init_task) - LOAD_OFFSET)
	{ *(.data.init_task) }

  .data.page_aligned : AT(ADDR(.data.page_aligned) - LOAD_OFFSET)
        { *(__special_page_section)
	  __start_gate_section = .;
	  *(.data.gate)
	  __stop_gate_section = .;
	}
  . = ALIGN(PAGE_SIZE);		/* make sure the gate page doesn't expose
  				 * kernel data
				 */

  .data.read_mostly : AT(ADDR(.data.read_mostly) - LOAD_OFFSET)
        { *(.data.read_mostly) }

  .data.cacheline_aligned : AT(ADDR(.data.cacheline_aligned) - LOAD_OFFSET)
        { *(.data.cacheline_aligned) }

  /* Per-cpu data: */
  percpu : { } :percpu
  . = ALIGN(PERCPU_PAGE_SIZE);
  __phys_per_cpu_start = .;
  .data.percpu PERCPU_ADDR : AT(__phys_per_cpu_start - LOAD_OFFSET)
	{
		__per_cpu_start = .;
		*(.data.percpu)
		__per_cpu_end = .;
	}
  . = __phys_per_cpu_start + PERCPU_PAGE_SIZE;	/* ensure percpu data fits
  						 * into percpu page size
						 */

  data : { } :data
  .data : AT(ADDR(.data) - LOAD_OFFSET)
	{ *(.data) *(.data1) *(.gnu.linkonce.d*) CONSTRUCTORS }

  . = ALIGN(16);	/* gp must be 16-byte aligned for exc. table */
  .got : AT(ADDR(.got) - LOAD_OFFSET)
	{ *(.got.plt) *(.got) }
  __gp = ADDR(.got) + 0x200000;
  /* We want the small data sections together, so single-instruction offsets
     can access them all, and initialized data all before uninitialized, so
     we can shorten the on-disk segment size.  */
  .sdata : AT(ADDR(.sdata) - LOAD_OFFSET)
	{ *(.sdata) *(.sdata1) *(.srdata) }
  _edata  =  .;
  _bss = .;
  .sbss : AT(ADDR(.sbss) - LOAD_OFFSET)
	{ *(.sbss) *(.scommon) }
  .bss : AT(ADDR(.bss) - LOAD_OFFSET)
	{ *(.bss) *(COMMON) }

  _end = .;

  code : { } :code
  /* Stabs debugging sections.  */
  .stab 0 : { *(.stab) }
  .stabstr 0 : { *(.stabstr) }
  .stab.excl 0 : { *(.stab.excl) }
  .stab.exclstr 0 : { *(.stab.exclstr) }
  .stab.index 0 : { *(.stab.index) }
  .stab.indexstr 0 : { *(.stab.indexstr) }
  /* DWARF debug sections.
     Symbols in the DWARF debugging sections are relative to the beginning
     of the section so we begin them at 0.  */
  /* DWARF 1 */
  .debug          0 : { *(.debug) }
  .line           0 : { *(.line) }
  /* GNU DWARF 1 extensions */
  .debug_srcinfo  0 : { *(.debug_srcinfo) }
  .debug_sfnames  0 : { *(.debug_sfnames) }
  /* DWARF 1.1 and DWARF 2 */
  .debug_aranges  0 : { *(.debug_aranges) }
  .debug_pubnames 0 : { *(.debug_pubnames) }
  /* DWARF 2 */
  .debug_info     0 : { *(.debug_info) }
  .debug_abbrev   0 : { *(.debug_abbrev) }
  .debug_line     0 : { *(.debug_line) }
  .debug_frame    0 : { *(.debug_frame) }
  .debug_str      0 : { *(.debug_str) }
  .debug_loc      0 : { *(.debug_loc) }
  .debug_macinfo  0 : { *(.debug_macinfo) }
  /* SGI/MIPS DWARF 2 extensions */
  .debug_weaknames 0 : { *(.debug_weaknames) }
  .debug_funcnames 0 : { *(.debug_funcnames) }
  .debug_typenames 0 : { *(.debug_typenames) }
  .debug_varnames  0 : { *(.debug_varnames) }
  /* These must appear regardless of  .  */
  /* Discard them for now since Intel SoftSDV cannot handle them.
  .comment 0 : { *(.comment) }
  .note 0 : { *(.note) }
  */
  /DISCARD/ : { *(.comment) }
  /DISCARD/ : { *(.note) }
}
Commit	Line	Data
1da177e4 LT	1
	2	#include <asm/cache.h>
	3	#include <asm/ptrace.h>
	4	#include <asm/system.h>
	5	#include <asm/pgtable.h>
	6
	7	#define LOAD_OFFSET (KERNEL_START - KERNEL_TR_PAGE_SIZE)
	8	#include <asm-generic/vmlinux.lds.h>
	9
c7b645f9 KA	10	#define IVT_TEXT \
	11	VMLINUX_SYMBOL(__start_ivt_text) = .; \
	12	*(.text.ivt) \
	13	VMLINUX_SYMBOL(__end_ivt_text) = .;
	14
1da177e4 LT	15	OUTPUT_FORMAT("elf64-ia64-little")
	16	OUTPUT_ARCH(ia64)
	17	ENTRY(phys_start)
	18	jiffies = jiffies_64;
	19	PHDRS {
	20	code PT_LOAD;
	21	percpu PT_LOAD;
	22	data PT_LOAD;
	23	}
	24	SECTIONS
	25	{
	26	/* Sections to be discarded */
	27	/DISCARD/ : {
	28	*(.exit.text)
	29	*(.exit.data)
	30	*(.exitcall.exit)
	31	*(.IA_64.unwind.exit.text)
	32	*(.IA_64.unwind_info.exit.text)
	33	}
	34
	35	v = PAGE_OFFSET; /* this symbol is here to make debugging easier... */
	36	phys_start = _start - LOAD_OFFSET;
	37
	38	code : { } :code
	39	. = KERNEL_START;
	40
	41	_text = .;
	42	_stext = .;
	43
	44	.text : AT(ADDR(.text) - LOAD_OFFSET)
	45	{
c7b645f9	46	IVT_TEXT
1da177e4 LT	47	*(.text)
	48	SCHED_TEXT
	49	LOCK_TEXT
1f7ad57b	50	KPROBES_TEXT
1da177e4 LT	51	(.gnu.linkonce.t)
	52	}
	53	.text2 : AT(ADDR(.text2) - LOAD_OFFSET)
	54	{ *(.text2) }
	55	#ifdef CONFIG_SMP
	56	.text.lock : AT(ADDR(.text.lock) - LOAD_OFFSET)
	57	{ *(.text.lock) }
	58	#endif
	59	_etext = .;
	60
	61	/* Read-only data */
	62
	63	/* Exception table */
	64	. = ALIGN(16);
	65	__ex_table : AT(ADDR(__ex_table) - LOAD_OFFSET)
	66	{
	67	__start___ex_table = .;
	68	*(__ex_table)
	69	__stop___ex_table = .;
	70	}
	71
d89cfe7f RA	72	/* MCA table */
	73	. = ALIGN(16);
	74	__mca_table : AT(ADDR(__mca_table) - LOAD_OFFSET)
	75	{
	76	__start___mca_table = .;
	77	*(__mca_table)
	78	__stop___mca_table = .;
	79	}
	80
a0776ec8 KC	81	.data.patch.phys_stack_reg : AT(ADDR(.data.patch.phys_stack_reg) - LOAD_OFFSET)
	82	{
	83	__start___phys_stack_reg_patchlist = .;
	84	*(.data.patch.phys_stack_reg)
	85	__end___phys_stack_reg_patchlist = .;
	86	}
	87
1da177e4 LT	88	/* Global data */
	89	_data = .;
	90
1da177e4 LT	91	/* Unwind info & table: */
	92	. = ALIGN(8);
	93	.IA_64.unwind_info : AT(ADDR(.IA_64.unwind_info) - LOAD_OFFSET)
	94	{ (.IA_64.unwind_info) }
	95	.IA_64.unwind : AT(ADDR(.IA_64.unwind) - LOAD_OFFSET)
	96	{
	97	__start_unwind = .;
	98	(.IA_64.unwind)
	99	__end_unwind = .;
	100	}
	101
	102	RODATA
	103
	104	.opd : AT(ADDR(.opd) - LOAD_OFFSET)
	105	{ *(.opd) }
	106
	107	/* Initialization code and data: */
	108
	109	. = ALIGN(PAGE_SIZE);
	110	__init_begin = .;
	111	.init.text : AT(ADDR(.init.text) - LOAD_OFFSET)
	112	{
	113	_sinittext = .;
	114	*(.init.text)
	115	_einittext = .;
	116	}
	117
	118	.init.data : AT(ADDR(.init.data) - LOAD_OFFSET)
	119	{ *(.init.data) }
	120
67d38229	121	#ifdef CONFIG_BLK_DEV_INITRD
1da177e4 LT	122	.init.ramfs : AT(ADDR(.init.ramfs) - LOAD_OFFSET)
	123	{
	124	__initramfs_start = .;
	125	*(.init.ramfs)
	126	__initramfs_end = .;
	127	}
67d38229	128	#endif
1da177e4 LT	129
	130	. = ALIGN(16);
	131	.init.setup : AT(ADDR(.init.setup) - LOAD_OFFSET)
	132	{
	133	__setup_start = .;
	134	*(.init.setup)
	135	__setup_end = .;
	136	}
	137	.initcall.init : AT(ADDR(.initcall.init) - LOAD_OFFSET)
	138	{
	139	__initcall_start = .;
61ce1efe	140	INITCALLS
1da177e4 LT	141	__initcall_end = .;
1da177e4 LT	142	}
39e18de8 KC	143
	144	.data.patch.vtop : AT(ADDR(.data.patch.vtop) - LOAD_OFFSET)
	145	{
	146	__start___vtop_patchlist = .;
	147	*(.data.patch.vtop)
	148	__end___vtop_patchlist = .;
	149	}
	150
	151	.data.patch.mckinley_e9 : AT(ADDR(.data.patch.mckinley_e9) - LOAD_OFFSET)
	152	{
	153	__start___mckinley_e9_bundles = .;
	154	*(.data.patch.mckinley_e9)
	155	__end___mckinley_e9_bundles = .;
	156	}
	157
	158	#if defined(CONFIG_IA64_GENERIC)
	159	/* Machine Vector */
	160	. = ALIGN(16);
	161	.machvec : AT(ADDR(.machvec) - LOAD_OFFSET)
	162	{
	163	machvec_start = .;
	164	*(.machvec)
	165	machvec_end = .;
	166	}
	167	#endif
	168
d00195eb	169	. = ALIGN(8);
1da177e4 LT	170	__con_initcall_start = .;
	171	.con_initcall.init : AT(ADDR(.con_initcall.init) - LOAD_OFFSET)
	172	{ *(.con_initcall.init) }
	173	__con_initcall_end = .;
	174	__security_initcall_start = .;
	175	.security_initcall.init : AT(ADDR(.security_initcall.init) - LOAD_OFFSET)
	176	{ *(.security_initcall.init) }
	177	__security_initcall_end = .;
	178	. = ALIGN(PAGE_SIZE);
	179	__init_end = .;
	180
	181	/* The initial task and kernel stack */
	182	.data.init_task : AT(ADDR(.data.init_task) - LOAD_OFFSET)
	183	{ *(.data.init_task) }
	184
	185	.data.page_aligned : AT(ADDR(.data.page_aligned) - LOAD_OFFSET)
	186	{ *(__special_page_section)
	187	__start_gate_section = .;
	188	*(.data.gate)
	189	__stop_gate_section = .;
	190	}
df8f0ec1 AS	191	. = ALIGN(PAGE_SIZE); /* make sure the gate page doesn't expose
	192	* kernel data
	193	*/
1da177e4	194
dc86e88c CL	195	.data.read_mostly : AT(ADDR(.data.read_mostly) - LOAD_OFFSET)
	196	{ *(.data.read_mostly) }
	197
1da177e4 LT	198	.data.cacheline_aligned : AT(ADDR(.data.cacheline_aligned) - LOAD_OFFSET)
	199	{ *(.data.cacheline_aligned) }
	200
	201	/* Per-cpu data: */
	202	percpu : { } :percpu
	203	. = ALIGN(PERCPU_PAGE_SIZE);
	204	__phys_per_cpu_start = .;
	205	.data.percpu PERCPU_ADDR : AT(__phys_per_cpu_start - LOAD_OFFSET)
	206	{
	207	__per_cpu_start = .;
	208	*(.data.percpu)
	209	__per_cpu_end = .;
	210	}
df8f0ec1 AS	211	. = __phys_per_cpu_start + PERCPU_PAGE_SIZE; /* ensure percpu data fits
	212	* into percpu page size
	213	*/
1da177e4 LT	214
	215	data : { } :data
	216	.data : AT(ADDR(.data) - LOAD_OFFSET)
	217	{ (.data) (.data1) (.gnu.linkonce.d) CONSTRUCTORS }
	218
	219	. = ALIGN(16); /* gp must be 16-byte aligned for exc. table */
	220	.got : AT(ADDR(.got) - LOAD_OFFSET)
	221	{ (.got.plt) (.got) }
	222	__gp = ADDR(.got) + 0x200000;
	223	/* We want the small data sections together, so single-instruction offsets
	224	can access them all, and initialized data all before uninitialized, so
	225	we can shorten the on-disk segment size. */
	226	.sdata : AT(ADDR(.sdata) - LOAD_OFFSET)
	227	{ (.sdata) (.sdata1) *(.srdata) }
	228	_edata = .;
	229	_bss = .;
	230	.sbss : AT(ADDR(.sbss) - LOAD_OFFSET)
	231	{ (.sbss) (.scommon) }
	232	.bss : AT(ADDR(.bss) - LOAD_OFFSET)
	233	{ (.bss) (COMMON) }
	234
	235	_end = .;
	236
	237	code : { } :code
	238	/* Stabs debugging sections. */
	239	.stab 0 : { *(.stab) }
	240	.stabstr 0 : { *(.stabstr) }
	241	.stab.excl 0 : { *(.stab.excl) }
	242	.stab.exclstr 0 : { *(.stab.exclstr) }
	243	.stab.index 0 : { *(.stab.index) }
	244	.stab.indexstr 0 : { *(.stab.indexstr) }
	245	/* DWARF debug sections.
	246	Symbols in the DWARF debugging sections are relative to the beginning
	247	of the section so we begin them at 0. */
	248	/* DWARF 1 */
	249	.debug 0 : { *(.debug) }
	250	.line 0 : { *(.line) }
	251	/* GNU DWARF 1 extensions */
	252	.debug_srcinfo 0 : { *(.debug_srcinfo) }
	253	.debug_sfnames 0 : { *(.debug_sfnames) }
	254	/* DWARF 1.1 and DWARF 2 */
	255	.debug_aranges 0 : { *(.debug_aranges) }
	256	.debug_pubnames 0 : { *(.debug_pubnames) }
	257	/* DWARF 2 */
	258	.debug_info 0 : { *(.debug_info) }
	259	.debug_abbrev 0 : { *(.debug_abbrev) }
	260	.debug_line 0 : { *(.debug_line) }
	261	.debug_frame 0 : { *(.debug_frame) }
	262	.debug_str 0 : { *(.debug_str) }
	263	.debug_loc 0 : { *(.debug_loc) }
	264	.debug_macinfo 0 : { *(.debug_macinfo) }
	265	/* SGI/MIPS DWARF 2 extensions */
	266	.debug_weaknames 0 : { *(.debug_weaknames) }
	267	.debug_funcnames 0 : { *(.debug_funcnames) }
	268	.debug_typenames 0 : { *(.debug_typenames) }
	269	.debug_varnames 0 : { *(.debug_varnames) }
	270	/* These must appear regardless of . */
	271	/* Discard them for now since Intel SoftSDV cannot handle them.
	272	.comment 0 : { *(.comment) }
	273	.note 0 : { *(.note) }
	274	*/
	275	/DISCARD/ : { *(.comment) }
	276	/DISCARD/ : { *(.note) }
	277	}