Commit | Line | Data |
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1da177e4 LT |
1 | |
2 | #include <asm/cache.h> | |
3 | #include <asm/ptrace.h> | |
4 | #include <asm/system.h> | |
5 | #include <asm/pgtable.h> | |
6 | ||
7 | #define LOAD_OFFSET (KERNEL_START - KERNEL_TR_PAGE_SIZE) | |
8 | #include <asm-generic/vmlinux.lds.h> | |
9 | ||
c7b645f9 KA |
10 | #define IVT_TEXT \ |
11 | VMLINUX_SYMBOL(__start_ivt_text) = .; \ | |
12 | *(.text.ivt) \ | |
13 | VMLINUX_SYMBOL(__end_ivt_text) = .; | |
14 | ||
1da177e4 LT |
15 | OUTPUT_FORMAT("elf64-ia64-little") |
16 | OUTPUT_ARCH(ia64) | |
17 | ENTRY(phys_start) | |
18 | jiffies = jiffies_64; | |
19 | PHDRS { | |
20 | code PT_LOAD; | |
21 | percpu PT_LOAD; | |
22 | data PT_LOAD; | |
23 | } | |
24 | SECTIONS | |
25 | { | |
26 | /* Sections to be discarded */ | |
27 | /DISCARD/ : { | |
28 | *(.exit.text) | |
29 | *(.exit.data) | |
30 | *(.exitcall.exit) | |
31 | *(.IA_64.unwind.exit.text) | |
32 | *(.IA_64.unwind_info.exit.text) | |
33 | } | |
34 | ||
35 | v = PAGE_OFFSET; /* this symbol is here to make debugging easier... */ | |
36 | phys_start = _start - LOAD_OFFSET; | |
37 | ||
38 | code : { } :code | |
39 | . = KERNEL_START; | |
40 | ||
41 | _text = .; | |
42 | _stext = .; | |
43 | ||
44 | .text : AT(ADDR(.text) - LOAD_OFFSET) | |
45 | { | |
c7b645f9 | 46 | IVT_TEXT |
1da177e4 LT |
47 | *(.text) |
48 | SCHED_TEXT | |
49 | LOCK_TEXT | |
1f7ad57b | 50 | KPROBES_TEXT |
1da177e4 LT |
51 | *(.gnu.linkonce.t*) |
52 | } | |
53 | .text2 : AT(ADDR(.text2) - LOAD_OFFSET) | |
54 | { *(.text2) } | |
55 | #ifdef CONFIG_SMP | |
56 | .text.lock : AT(ADDR(.text.lock) - LOAD_OFFSET) | |
57 | { *(.text.lock) } | |
58 | #endif | |
59 | _etext = .; | |
60 | ||
61 | /* Read-only data */ | |
62 | ||
63 | /* Exception table */ | |
64 | . = ALIGN(16); | |
65 | __ex_table : AT(ADDR(__ex_table) - LOAD_OFFSET) | |
66 | { | |
67 | __start___ex_table = .; | |
68 | *(__ex_table) | |
69 | __stop___ex_table = .; | |
70 | } | |
71 | ||
d89cfe7f RA |
72 | /* MCA table */ |
73 | . = ALIGN(16); | |
74 | __mca_table : AT(ADDR(__mca_table) - LOAD_OFFSET) | |
75 | { | |
76 | __start___mca_table = .; | |
77 | *(__mca_table) | |
78 | __stop___mca_table = .; | |
79 | } | |
80 | ||
1da177e4 LT |
81 | /* Global data */ |
82 | _data = .; | |
83 | ||
1da177e4 LT |
84 | /* Unwind info & table: */ |
85 | . = ALIGN(8); | |
86 | .IA_64.unwind_info : AT(ADDR(.IA_64.unwind_info) - LOAD_OFFSET) | |
87 | { *(.IA_64.unwind_info*) } | |
88 | .IA_64.unwind : AT(ADDR(.IA_64.unwind) - LOAD_OFFSET) | |
89 | { | |
90 | __start_unwind = .; | |
91 | *(.IA_64.unwind*) | |
92 | __end_unwind = .; | |
93 | } | |
94 | ||
95 | RODATA | |
96 | ||
97 | .opd : AT(ADDR(.opd) - LOAD_OFFSET) | |
98 | { *(.opd) } | |
99 | ||
100 | /* Initialization code and data: */ | |
101 | ||
102 | . = ALIGN(PAGE_SIZE); | |
103 | __init_begin = .; | |
104 | .init.text : AT(ADDR(.init.text) - LOAD_OFFSET) | |
105 | { | |
106 | _sinittext = .; | |
107 | *(.init.text) | |
108 | _einittext = .; | |
109 | } | |
110 | ||
111 | .init.data : AT(ADDR(.init.data) - LOAD_OFFSET) | |
112 | { *(.init.data) } | |
113 | ||
114 | .init.ramfs : AT(ADDR(.init.ramfs) - LOAD_OFFSET) | |
115 | { | |
116 | __initramfs_start = .; | |
117 | *(.init.ramfs) | |
118 | __initramfs_end = .; | |
119 | } | |
120 | ||
121 | . = ALIGN(16); | |
122 | .init.setup : AT(ADDR(.init.setup) - LOAD_OFFSET) | |
123 | { | |
124 | __setup_start = .; | |
125 | *(.init.setup) | |
126 | __setup_end = .; | |
127 | } | |
128 | .initcall.init : AT(ADDR(.initcall.init) - LOAD_OFFSET) | |
129 | { | |
130 | __initcall_start = .; | |
61ce1efe | 131 | INITCALLS |
1da177e4 LT |
132 | __initcall_end = .; |
133 | } | |
39e18de8 KC |
134 | |
135 | .data.patch.vtop : AT(ADDR(.data.patch.vtop) - LOAD_OFFSET) | |
136 | { | |
137 | __start___vtop_patchlist = .; | |
138 | *(.data.patch.vtop) | |
139 | __end___vtop_patchlist = .; | |
140 | } | |
141 | ||
142 | .data.patch.mckinley_e9 : AT(ADDR(.data.patch.mckinley_e9) - LOAD_OFFSET) | |
143 | { | |
144 | __start___mckinley_e9_bundles = .; | |
145 | *(.data.patch.mckinley_e9) | |
146 | __end___mckinley_e9_bundles = .; | |
147 | } | |
148 | ||
149 | #if defined(CONFIG_IA64_GENERIC) | |
150 | /* Machine Vector */ | |
151 | . = ALIGN(16); | |
152 | .machvec : AT(ADDR(.machvec) - LOAD_OFFSET) | |
153 | { | |
154 | machvec_start = .; | |
155 | *(.machvec) | |
156 | machvec_end = .; | |
157 | } | |
158 | #endif | |
159 | ||
1da177e4 LT |
160 | __con_initcall_start = .; |
161 | .con_initcall.init : AT(ADDR(.con_initcall.init) - LOAD_OFFSET) | |
162 | { *(.con_initcall.init) } | |
163 | __con_initcall_end = .; | |
164 | __security_initcall_start = .; | |
165 | .security_initcall.init : AT(ADDR(.security_initcall.init) - LOAD_OFFSET) | |
166 | { *(.security_initcall.init) } | |
167 | __security_initcall_end = .; | |
168 | . = ALIGN(PAGE_SIZE); | |
169 | __init_end = .; | |
170 | ||
171 | /* The initial task and kernel stack */ | |
172 | .data.init_task : AT(ADDR(.data.init_task) - LOAD_OFFSET) | |
173 | { *(.data.init_task) } | |
174 | ||
175 | .data.page_aligned : AT(ADDR(.data.page_aligned) - LOAD_OFFSET) | |
176 | { *(__special_page_section) | |
177 | __start_gate_section = .; | |
178 | *(.data.gate) | |
179 | __stop_gate_section = .; | |
180 | } | |
df8f0ec1 AS |
181 | . = ALIGN(PAGE_SIZE); /* make sure the gate page doesn't expose |
182 | * kernel data | |
183 | */ | |
1da177e4 | 184 | |
dc86e88c CL |
185 | .data.read_mostly : AT(ADDR(.data.read_mostly) - LOAD_OFFSET) |
186 | { *(.data.read_mostly) } | |
187 | ||
1da177e4 LT |
188 | .data.cacheline_aligned : AT(ADDR(.data.cacheline_aligned) - LOAD_OFFSET) |
189 | { *(.data.cacheline_aligned) } | |
190 | ||
191 | /* Per-cpu data: */ | |
192 | percpu : { } :percpu | |
193 | . = ALIGN(PERCPU_PAGE_SIZE); | |
194 | __phys_per_cpu_start = .; | |
195 | .data.percpu PERCPU_ADDR : AT(__phys_per_cpu_start - LOAD_OFFSET) | |
196 | { | |
197 | __per_cpu_start = .; | |
198 | *(.data.percpu) | |
199 | __per_cpu_end = .; | |
200 | } | |
df8f0ec1 AS |
201 | . = __phys_per_cpu_start + PERCPU_PAGE_SIZE; /* ensure percpu data fits |
202 | * into percpu page size | |
203 | */ | |
1da177e4 LT |
204 | |
205 | data : { } :data | |
206 | .data : AT(ADDR(.data) - LOAD_OFFSET) | |
207 | { *(.data) *(.data1) *(.gnu.linkonce.d*) CONSTRUCTORS } | |
208 | ||
209 | . = ALIGN(16); /* gp must be 16-byte aligned for exc. table */ | |
210 | .got : AT(ADDR(.got) - LOAD_OFFSET) | |
211 | { *(.got.plt) *(.got) } | |
212 | __gp = ADDR(.got) + 0x200000; | |
213 | /* We want the small data sections together, so single-instruction offsets | |
214 | can access them all, and initialized data all before uninitialized, so | |
215 | we can shorten the on-disk segment size. */ | |
216 | .sdata : AT(ADDR(.sdata) - LOAD_OFFSET) | |
217 | { *(.sdata) *(.sdata1) *(.srdata) } | |
218 | _edata = .; | |
219 | _bss = .; | |
220 | .sbss : AT(ADDR(.sbss) - LOAD_OFFSET) | |
221 | { *(.sbss) *(.scommon) } | |
222 | .bss : AT(ADDR(.bss) - LOAD_OFFSET) | |
223 | { *(.bss) *(COMMON) } | |
224 | ||
225 | _end = .; | |
226 | ||
227 | code : { } :code | |
228 | /* Stabs debugging sections. */ | |
229 | .stab 0 : { *(.stab) } | |
230 | .stabstr 0 : { *(.stabstr) } | |
231 | .stab.excl 0 : { *(.stab.excl) } | |
232 | .stab.exclstr 0 : { *(.stab.exclstr) } | |
233 | .stab.index 0 : { *(.stab.index) } | |
234 | .stab.indexstr 0 : { *(.stab.indexstr) } | |
235 | /* DWARF debug sections. | |
236 | Symbols in the DWARF debugging sections are relative to the beginning | |
237 | of the section so we begin them at 0. */ | |
238 | /* DWARF 1 */ | |
239 | .debug 0 : { *(.debug) } | |
240 | .line 0 : { *(.line) } | |
241 | /* GNU DWARF 1 extensions */ | |
242 | .debug_srcinfo 0 : { *(.debug_srcinfo) } | |
243 | .debug_sfnames 0 : { *(.debug_sfnames) } | |
244 | /* DWARF 1.1 and DWARF 2 */ | |
245 | .debug_aranges 0 : { *(.debug_aranges) } | |
246 | .debug_pubnames 0 : { *(.debug_pubnames) } | |
247 | /* DWARF 2 */ | |
248 | .debug_info 0 : { *(.debug_info) } | |
249 | .debug_abbrev 0 : { *(.debug_abbrev) } | |
250 | .debug_line 0 : { *(.debug_line) } | |
251 | .debug_frame 0 : { *(.debug_frame) } | |
252 | .debug_str 0 : { *(.debug_str) } | |
253 | .debug_loc 0 : { *(.debug_loc) } | |
254 | .debug_macinfo 0 : { *(.debug_macinfo) } | |
255 | /* SGI/MIPS DWARF 2 extensions */ | |
256 | .debug_weaknames 0 : { *(.debug_weaknames) } | |
257 | .debug_funcnames 0 : { *(.debug_funcnames) } | |
258 | .debug_typenames 0 : { *(.debug_typenames) } | |
259 | .debug_varnames 0 : { *(.debug_varnames) } | |
260 | /* These must appear regardless of . */ | |
261 | /* Discard them for now since Intel SoftSDV cannot handle them. | |
262 | .comment 0 : { *(.comment) } | |
263 | .note 0 : { *(.note) } | |
264 | */ | |
265 | /DISCARD/ : { *(.comment) } | |
266 | /DISCARD/ : { *(.note) } | |
267 | } |