[GitHub/mt8127/android_kernel_alcatel_ttab.git] / arch / ia64 / kernel / vmlinux.lds.S


#include <asm/cache.h>
#include <asm/ptrace.h>
#include <asm/system.h>
#include <asm/pgtable.h>

#define LOAD_OFFSET	(KERNEL_START - KERNEL_TR_PAGE_SIZE)
#include <asm-generic/vmlinux.lds.h>

#define IVT_TEXT							\
		VMLINUX_SYMBOL(__start_ivt_text) = .;			\
		*(.text.ivt)						\
		VMLINUX_SYMBOL(__end_ivt_text) = .;

OUTPUT_FORMAT("elf64-ia64-little")
OUTPUT_ARCH(ia64)
ENTRY(phys_start)
jiffies = jiffies_64;
PHDRS {
  code   PT_LOAD;
  percpu PT_LOAD;
  data   PT_LOAD;
  note   PT_NOTE;
}
SECTIONS
{
  /* Sections to be discarded */
  /DISCARD/ : {
	*(.exit.text)
	*(.exit.data)
	*(.exitcall.exit)
	*(.IA_64.unwind.exit.text)
	*(.IA_64.unwind_info.exit.text)
	}

  v = PAGE_OFFSET;	/* this symbol is here to make debugging easier... */
  phys_start = _start - LOAD_OFFSET;

  code : { } :code
  . = KERNEL_START;

  _text = .;
  _stext = .;

  .text : AT(ADDR(.text) - LOAD_OFFSET)
    {
	IVT_TEXT
	TEXT_TEXT
	SCHED_TEXT
	LOCK_TEXT
	KPROBES_TEXT
	*(.gnu.linkonce.t*)
    }
  .text.head : AT(ADDR(.text.head) - LOAD_OFFSET)
	{ *(.text.head) }
  .text2 : AT(ADDR(.text2) - LOAD_OFFSET)
	{ *(.text2) }
#ifdef CONFIG_SMP
  .text.lock : AT(ADDR(.text.lock) - LOAD_OFFSET)
	{ *(.text.lock) }
#endif
  _etext = .;

  /* Read-only data */

  NOTES :code :note		/* put .notes in text and mark in PT_NOTE  */
  code_continues : {} :code	/* switch back to regular program...  */

  /* Exception table */
  . = ALIGN(16);
  __ex_table : AT(ADDR(__ex_table) - LOAD_OFFSET)
	{
	  __start___ex_table = .;
	  *(__ex_table)
	  __stop___ex_table = .;
	}

  /* MCA table */
  . = ALIGN(16);
  __mca_table : AT(ADDR(__mca_table) - LOAD_OFFSET)
	{
	  __start___mca_table = .;
	  *(__mca_table)
	  __stop___mca_table = .;
	}

  .data.patch.phys_stack_reg : AT(ADDR(.data.patch.phys_stack_reg) - LOAD_OFFSET)
	{
	  __start___phys_stack_reg_patchlist = .;
	  *(.data.patch.phys_stack_reg)
	  __end___phys_stack_reg_patchlist = .;
	}

  /* Global data */
  _data = .;

  /* Unwind info & table: */
  . = ALIGN(8);
  .IA_64.unwind_info : AT(ADDR(.IA_64.unwind_info) - LOAD_OFFSET)
	{ *(.IA_64.unwind_info*) }
  .IA_64.unwind : AT(ADDR(.IA_64.unwind) - LOAD_OFFSET)
	{
	  __start_unwind = .;
	  *(.IA_64.unwind*)
	  __end_unwind = .;
	}

  RODATA

  .opd : AT(ADDR(.opd) - LOAD_OFFSET)
	{ *(.opd) }

  /* Initialization code and data: */

  . = ALIGN(PAGE_SIZE);
  __init_begin = .;
  .init.text : AT(ADDR(.init.text) - LOAD_OFFSET)
	{
	  _sinittext = .;
	  *(.init.text)
	  _einittext = .;
	}

  .init.data : AT(ADDR(.init.data) - LOAD_OFFSET)
	{ *(.init.data) }

#ifdef CONFIG_BLK_DEV_INITRD
  .init.ramfs : AT(ADDR(.init.ramfs) - LOAD_OFFSET)
	{
	  __initramfs_start = .;
	  *(.init.ramfs)
	  __initramfs_end = .;
	}
#endif

   . = ALIGN(16);
  .init.setup : AT(ADDR(.init.setup) - LOAD_OFFSET)
        {
	  __setup_start = .;
	  *(.init.setup)
	  __setup_end = .;
	}
  .initcall.init : AT(ADDR(.initcall.init) - LOAD_OFFSET)
	{
	  __initcall_start = .;
	INITCALLS
	  __initcall_end = .;
	}

  .data.patch.vtop : AT(ADDR(.data.patch.vtop) - LOAD_OFFSET)
	{
	  __start___vtop_patchlist = .;
	  *(.data.patch.vtop)
	  __end___vtop_patchlist = .;
	}

  .data.patch.mckinley_e9 : AT(ADDR(.data.patch.mckinley_e9) - LOAD_OFFSET)
	{
	  __start___mckinley_e9_bundles = .;
	  *(.data.patch.mckinley_e9)
	  __end___mckinley_e9_bundles = .;
	}

#if defined(CONFIG_IA64_GENERIC)
  /* Machine Vector */
  . = ALIGN(16);
  .machvec : AT(ADDR(.machvec) - LOAD_OFFSET)
	{
	  machvec_start = .;
	  *(.machvec)
	  machvec_end = .;
	}
#endif

  . = ALIGN(8);
   __con_initcall_start = .;
  .con_initcall.init : AT(ADDR(.con_initcall.init) - LOAD_OFFSET)
	{ *(.con_initcall.init) }
  __con_initcall_end = .;
  __security_initcall_start = .;
  .security_initcall.init : AT(ADDR(.security_initcall.init) - LOAD_OFFSET)
	{ *(.security_initcall.init) }
  __security_initcall_end = .;
  . = ALIGN(PAGE_SIZE);
  __init_end = .;

  /* The initial task and kernel stack */
  .data.init_task : AT(ADDR(.data.init_task) - LOAD_OFFSET)
	{ *(.data.init_task) }

  .data.page_aligned : AT(ADDR(.data.page_aligned) - LOAD_OFFSET)
        { *(__special_page_section)
	  __start_gate_section = .;
	  *(.data.gate)
	  __stop_gate_section = .;
	}
  . = ALIGN(PAGE_SIZE);		/* make sure the gate page doesn't expose
  				 * kernel data
				 */

  .data.read_mostly : AT(ADDR(.data.read_mostly) - LOAD_OFFSET)
        { *(.data.read_mostly) }

  .data.cacheline_aligned : AT(ADDR(.data.cacheline_aligned) - LOAD_OFFSET)
        { *(.data.cacheline_aligned) }

  /* Per-cpu data: */
  percpu : { } :percpu
  . = ALIGN(PERCPU_PAGE_SIZE);
  __phys_per_cpu_start = .;
  .data.percpu PERCPU_ADDR : AT(__phys_per_cpu_start - LOAD_OFFSET)
	{
		__per_cpu_start = .;
		*(.data.percpu)
		*(.data.percpu.shared_aligned)
		__per_cpu_end = .;
	}
  . = __phys_per_cpu_start + PERCPU_PAGE_SIZE;	/* ensure percpu data fits
  						 * into percpu page size
						 */

  data : { } :data
  .data : AT(ADDR(.data) - LOAD_OFFSET)
	{
		DATA_DATA
		*(.data1)
		*(.gnu.linkonce.d*)
		CONSTRUCTORS
	}

  . = ALIGN(16);	/* gp must be 16-byte aligned for exc. table */
  .got : AT(ADDR(.got) - LOAD_OFFSET)
	{ *(.got.plt) *(.got) }
  __gp = ADDR(.got) + 0x200000;
  /* We want the small data sections together, so single-instruction offsets
     can access them all, and initialized data all before uninitialized, so
     we can shorten the on-disk segment size.  */
  .sdata : AT(ADDR(.sdata) - LOAD_OFFSET)
	{ *(.sdata) *(.sdata1) *(.srdata) }
  _edata  =  .;
  _bss = .;
  .sbss : AT(ADDR(.sbss) - LOAD_OFFSET)
	{ *(.sbss) *(.scommon) }
  .bss : AT(ADDR(.bss) - LOAD_OFFSET)
	{ *(.bss) *(COMMON) }

  _end = .;

  code : { } :code
  /* Stabs debugging sections.  */
  .stab 0 : { *(.stab) }
  .stabstr 0 : { *(.stabstr) }
  .stab.excl 0 : { *(.stab.excl) }
  .stab.exclstr 0 : { *(.stab.exclstr) }
  .stab.index 0 : { *(.stab.index) }
  .stab.indexstr 0 : { *(.stab.indexstr) }
  /* DWARF debug sections.
     Symbols in the DWARF debugging sections are relative to the beginning
     of the section so we begin them at 0.  */
  /* DWARF 1 */
  .debug          0 : { *(.debug) }
  .line           0 : { *(.line) }
  /* GNU DWARF 1 extensions */
  .debug_srcinfo  0 : { *(.debug_srcinfo) }
  .debug_sfnames  0 : { *(.debug_sfnames) }
  /* DWARF 1.1 and DWARF 2 */
  .debug_aranges  0 : { *(.debug_aranges) }
  .debug_pubnames 0 : { *(.debug_pubnames) }
  /* DWARF 2 */
  .debug_info     0 : { *(.debug_info) }
  .debug_abbrev   0 : { *(.debug_abbrev) }
  .debug_line     0 : { *(.debug_line) }
  .debug_frame    0 : { *(.debug_frame) }
  .debug_str      0 : { *(.debug_str) }
  .debug_loc      0 : { *(.debug_loc) }
  .debug_macinfo  0 : { *(.debug_macinfo) }
  /* SGI/MIPS DWARF 2 extensions */
  .debug_weaknames 0 : { *(.debug_weaknames) }
  .debug_funcnames 0 : { *(.debug_funcnames) }
  .debug_typenames 0 : { *(.debug_typenames) }
  .debug_varnames  0 : { *(.debug_varnames) }
  /* These must appear regardless of  .  */
  /DISCARD/ : { *(.comment) }
  /DISCARD/ : { *(.note) }
}
Commit	Line	Data
1da177e4 LT	1
	2	#include <asm/cache.h>
	3	#include <asm/ptrace.h>
	4	#include <asm/system.h>
	5	#include <asm/pgtable.h>
	6
	7	#define LOAD_OFFSET (KERNEL_START - KERNEL_TR_PAGE_SIZE)
	8	#include <asm-generic/vmlinux.lds.h>
	9
c7b645f9 KA	10	#define IVT_TEXT \
	11	VMLINUX_SYMBOL(__start_ivt_text) = .; \
	12	*(.text.ivt) \
	13	VMLINUX_SYMBOL(__end_ivt_text) = .;
	14
1da177e4 LT	15	OUTPUT_FORMAT("elf64-ia64-little")
	16	OUTPUT_ARCH(ia64)
	17	ENTRY(phys_start)
	18	jiffies = jiffies_64;
	19	PHDRS {
	20	code PT_LOAD;
	21	percpu PT_LOAD;
	22	data PT_LOAD;
336cdba8	23	note PT_NOTE;
1da177e4 LT	24	}
	25	SECTIONS
	26	{
	27	/* Sections to be discarded */
	28	/DISCARD/ : {
	29	*(.exit.text)
	30	*(.exit.data)
	31	*(.exitcall.exit)
	32	*(.IA_64.unwind.exit.text)
	33	*(.IA_64.unwind_info.exit.text)
	34	}
	35
	36	v = PAGE_OFFSET; /* this symbol is here to make debugging easier... */
	37	phys_start = _start - LOAD_OFFSET;
	38
	39	code : { } :code
	40	. = KERNEL_START;
	41
	42	_text = .;
	43	_stext = .;
	44
	45	.text : AT(ADDR(.text) - LOAD_OFFSET)
	46	{
c7b645f9	47	IVT_TEXT
7664709b	48	TEXT_TEXT
1da177e4 LT	49	SCHED_TEXT
1da177e4 LT	50	LOCK_TEXT
1f7ad57b	51	KPROBES_TEXT
1da177e4 LT	52	(.gnu.linkonce.t)
1da177e4 LT	53	}
9d6f40b8 TL	54	.text.head : AT(ADDR(.text.head) - LOAD_OFFSET)
9d6f40b8 TL	55	{ *(.text.head) }
1da177e4 LT	56	.text2 : AT(ADDR(.text2) - LOAD_OFFSET)
	57	{ *(.text2) }
	58	#ifdef CONFIG_SMP
	59	.text.lock : AT(ADDR(.text.lock) - LOAD_OFFSET)
	60	{ *(.text.lock) }
	61	#endif
	62	_etext = .;
	63
	64	/* Read-only data */
	65
336cdba8 DMT	66	NOTES :code :note /* put .notes in text and mark in PT_NOTE */
	67	code_continues : {} :code /* switch back to regular program... */
	68
1da177e4 LT	69	/* Exception table */
	70	. = ALIGN(16);
	71	__ex_table : AT(ADDR(__ex_table) - LOAD_OFFSET)
	72	{
	73	__start___ex_table = .;
	74	*(__ex_table)
	75	__stop___ex_table = .;
	76	}
	77
d89cfe7f RA	78	/* MCA table */
	79	. = ALIGN(16);
	80	__mca_table : AT(ADDR(__mca_table) - LOAD_OFFSET)
	81	{
	82	__start___mca_table = .;
	83	*(__mca_table)
	84	__stop___mca_table = .;
	85	}
	86
a0776ec8 KC	87	.data.patch.phys_stack_reg : AT(ADDR(.data.patch.phys_stack_reg) - LOAD_OFFSET)
	88	{
	89	__start___phys_stack_reg_patchlist = .;
	90	*(.data.patch.phys_stack_reg)
	91	__end___phys_stack_reg_patchlist = .;
	92	}
	93
1da177e4 LT	94	/* Global data */
	95	_data = .;
	96
1da177e4 LT	97	/* Unwind info & table: */
	98	. = ALIGN(8);
	99	.IA_64.unwind_info : AT(ADDR(.IA_64.unwind_info) - LOAD_OFFSET)
	100	{ (.IA_64.unwind_info) }
	101	.IA_64.unwind : AT(ADDR(.IA_64.unwind) - LOAD_OFFSET)
	102	{
	103	__start_unwind = .;
	104	(.IA_64.unwind)
	105	__end_unwind = .;
	106	}
	107
	108	RODATA
	109
	110	.opd : AT(ADDR(.opd) - LOAD_OFFSET)
	111	{ *(.opd) }
	112
	113	/* Initialization code and data: */
	114
	115	. = ALIGN(PAGE_SIZE);
	116	__init_begin = .;
	117	.init.text : AT(ADDR(.init.text) - LOAD_OFFSET)
	118	{
	119	_sinittext = .;
	120	*(.init.text)
	121	_einittext = .;
	122	}
	123
	124	.init.data : AT(ADDR(.init.data) - LOAD_OFFSET)
	125	{ *(.init.data) }
	126
67d38229	127	#ifdef CONFIG_BLK_DEV_INITRD
1da177e4 LT	128	.init.ramfs : AT(ADDR(.init.ramfs) - LOAD_OFFSET)
	129	{
	130	__initramfs_start = .;
	131	*(.init.ramfs)
	132	__initramfs_end = .;
	133	}
67d38229	134	#endif
1da177e4 LT	135
	136	. = ALIGN(16);
	137	.init.setup : AT(ADDR(.init.setup) - LOAD_OFFSET)
	138	{
	139	__setup_start = .;
	140	*(.init.setup)
	141	__setup_end = .;
	142	}
	143	.initcall.init : AT(ADDR(.initcall.init) - LOAD_OFFSET)
	144	{
	145	__initcall_start = .;
61ce1efe	146	INITCALLS
1da177e4 LT	147	__initcall_end = .;
1da177e4 LT	148	}
39e18de8 KC	149
	150	.data.patch.vtop : AT(ADDR(.data.patch.vtop) - LOAD_OFFSET)
	151	{
	152	__start___vtop_patchlist = .;
	153	*(.data.patch.vtop)
	154	__end___vtop_patchlist = .;
	155	}
	156
	157	.data.patch.mckinley_e9 : AT(ADDR(.data.patch.mckinley_e9) - LOAD_OFFSET)
	158	{
	159	__start___mckinley_e9_bundles = .;
	160	*(.data.patch.mckinley_e9)
	161	__end___mckinley_e9_bundles = .;
	162	}
	163
	164	#if defined(CONFIG_IA64_GENERIC)
	165	/* Machine Vector */
	166	. = ALIGN(16);
	167	.machvec : AT(ADDR(.machvec) - LOAD_OFFSET)
	168	{
	169	machvec_start = .;
	170	*(.machvec)
	171	machvec_end = .;
	172	}
	173	#endif
	174
d00195eb	175	. = ALIGN(8);
1da177e4 LT	176	__con_initcall_start = .;
	177	.con_initcall.init : AT(ADDR(.con_initcall.init) - LOAD_OFFSET)
	178	{ *(.con_initcall.init) }
	179	__con_initcall_end = .;
	180	__security_initcall_start = .;
	181	.security_initcall.init : AT(ADDR(.security_initcall.init) - LOAD_OFFSET)
	182	{ *(.security_initcall.init) }
	183	__security_initcall_end = .;
	184	. = ALIGN(PAGE_SIZE);
	185	__init_end = .;
	186
	187	/* The initial task and kernel stack */
	188	.data.init_task : AT(ADDR(.data.init_task) - LOAD_OFFSET)
	189	{ *(.data.init_task) }
	190
	191	.data.page_aligned : AT(ADDR(.data.page_aligned) - LOAD_OFFSET)
	192	{ *(__special_page_section)
	193	__start_gate_section = .;
	194	*(.data.gate)
	195	__stop_gate_section = .;
	196	}
df8f0ec1 AS	197	. = ALIGN(PAGE_SIZE); /* make sure the gate page doesn't expose
	198	* kernel data
	199	*/
1da177e4	200
dc86e88c CL	201	.data.read_mostly : AT(ADDR(.data.read_mostly) - LOAD_OFFSET)
	202	{ *(.data.read_mostly) }
	203
1da177e4 LT	204	.data.cacheline_aligned : AT(ADDR(.data.cacheline_aligned) - LOAD_OFFSET)
	205	{ *(.data.cacheline_aligned) }
	206
	207	/* Per-cpu data: */
	208	percpu : { } :percpu
	209	. = ALIGN(PERCPU_PAGE_SIZE);
	210	__phys_per_cpu_start = .;
	211	.data.percpu PERCPU_ADDR : AT(__phys_per_cpu_start - LOAD_OFFSET)
	212	{
	213	__per_cpu_start = .;
	214	*(.data.percpu)
5fb7dc37	215	*(.data.percpu.shared_aligned)
1da177e4 LT	216	__per_cpu_end = .;
1da177e4 LT	217	}
df8f0ec1 AS	218	. = __phys_per_cpu_start + PERCPU_PAGE_SIZE; /* ensure percpu data fits
	219	* into percpu page size
	220	*/
1da177e4 LT	221
	222	data : { } :data
	223	.data : AT(ADDR(.data) - LOAD_OFFSET)
ca967258 SR	224	{
	225	DATA_DATA
	226	*(.data1)
	227	(.gnu.linkonce.d)
	228	CONSTRUCTORS
	229	}
1da177e4 LT	230
	231	. = ALIGN(16); /* gp must be 16-byte aligned for exc. table */
	232	.got : AT(ADDR(.got) - LOAD_OFFSET)
	233	{ (.got.plt) (.got) }
	234	__gp = ADDR(.got) + 0x200000;
	235	/* We want the small data sections together, so single-instruction offsets
	236	can access them all, and initialized data all before uninitialized, so
	237	we can shorten the on-disk segment size. */
	238	.sdata : AT(ADDR(.sdata) - LOAD_OFFSET)
	239	{ (.sdata) (.sdata1) *(.srdata) }
	240	_edata = .;
	241	_bss = .;
	242	.sbss : AT(ADDR(.sbss) - LOAD_OFFSET)
	243	{ (.sbss) (.scommon) }
	244	.bss : AT(ADDR(.bss) - LOAD_OFFSET)
	245	{ (.bss) (COMMON) }
	246
	247	_end = .;
	248
	249	code : { } :code
	250	/* Stabs debugging sections. */
	251	.stab 0 : { *(.stab) }
	252	.stabstr 0 : { *(.stabstr) }
	253	.stab.excl 0 : { *(.stab.excl) }
	254	.stab.exclstr 0 : { *(.stab.exclstr) }
	255	.stab.index 0 : { *(.stab.index) }
	256	.stab.indexstr 0 : { *(.stab.indexstr) }
	257	/* DWARF debug sections.
	258	Symbols in the DWARF debugging sections are relative to the beginning
	259	of the section so we begin them at 0. */
	260	/* DWARF 1 */
	261	.debug 0 : { *(.debug) }
	262	.line 0 : { *(.line) }
	263	/* GNU DWARF 1 extensions */
	264	.debug_srcinfo 0 : { *(.debug_srcinfo) }
	265	.debug_sfnames 0 : { *(.debug_sfnames) }
	266	/* DWARF 1.1 and DWARF 2 */
	267	.debug_aranges 0 : { *(.debug_aranges) }
	268	.debug_pubnames 0 : { *(.debug_pubnames) }
	269	/* DWARF 2 */
	270	.debug_info 0 : { *(.debug_info) }
	271	.debug_abbrev 0 : { *(.debug_abbrev) }
	272	.debug_line 0 : { *(.debug_line) }
	273	.debug_frame 0 : { *(.debug_frame) }
	274	.debug_str 0 : { *(.debug_str) }
	275	.debug_loc 0 : { *(.debug_loc) }
	276	.debug_macinfo 0 : { *(.debug_macinfo) }
	277	/* SGI/MIPS DWARF 2 extensions */
	278	.debug_weaknames 0 : { *(.debug_weaknames) }
	279	.debug_funcnames 0 : { *(.debug_funcnames) }
	280	.debug_typenames 0 : { *(.debug_typenames) }
	281	.debug_varnames 0 : { *(.debug_varnames) }
	282	/* These must appear regardless of . */
1da177e4 LT	283	/DISCARD/ : { *(.comment) }
	284	/DISCARD/ : { *(.note) }
	285	}