[GitHub/mt8127/android_kernel_alcatel_ttab.git] / arch / ia64 / kernel / time.c

/*
 * linux/arch/ia64/kernel/time.c
 *
 * Copyright (C) 1998-2003 Hewlett-Packard Co
 *	Stephane Eranian <eranian@hpl.hp.com>
 *	David Mosberger <davidm@hpl.hp.com>
 * Copyright (C) 1999 Don Dugger <don.dugger@intel.com>
 * Copyright (C) 1999-2000 VA Linux Systems
 * Copyright (C) 1999-2000 Walt Drummond <drummond@valinux.com>
 */

#include <linux/cpu.h>
#include <linux/init.h>
#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/profile.h>
#include <linux/sched.h>
#include <linux/time.h>
#include <linux/interrupt.h>
#include <linux/efi.h>
#include <linux/timex.h>
#include <linux/clocksource.h>

#include <asm/machvec.h>
#include <asm/delay.h>
#include <asm/hw_irq.h>
#include <asm/paravirt.h>
#include <asm/ptrace.h>
#include <asm/sal.h>
#include <asm/sections.h>
#include <asm/system.h>

#include "fsyscall_gtod_data.h"

static cycle_t itc_get_cycles(void);

struct fsyscall_gtod_data_t fsyscall_gtod_data = {
	.lock = SEQLOCK_UNLOCKED,
};

struct itc_jitter_data_t itc_jitter_data;

volatile int time_keeper_id = 0; /* smp_processor_id() of time-keeper */

#ifdef CONFIG_IA64_DEBUG_IRQ

unsigned long last_cli_ip;
EXPORT_SYMBOL(last_cli_ip);

#endif

#ifdef CONFIG_PARAVIRT
static void
paravirt_clocksource_resume(void)
{
	if (pv_time_ops.clocksource_resume)
		pv_time_ops.clocksource_resume();
}
#endif

static struct clocksource clocksource_itc = {
	.name           = "itc",
	.rating         = 350,
	.read           = itc_get_cycles,
	.mask           = CLOCKSOURCE_MASK(64),
	.mult           = 0, /*to be calculated*/
	.shift          = 16,
	.flags          = CLOCK_SOURCE_IS_CONTINUOUS,
#ifdef CONFIG_PARAVIRT
	.resume		= paravirt_clocksource_resume,
#endif
};
static struct clocksource *itc_clocksource;

#ifdef CONFIG_VIRT_CPU_ACCOUNTING

#include <linux/kernel_stat.h>

extern cputime_t cycle_to_cputime(u64 cyc);

/*
 * Called from the context switch with interrupts disabled, to charge all
 * accumulated times to the current process, and to prepare accounting on
 * the next process.
 */
void ia64_account_on_switch(struct task_struct *prev, struct task_struct *next)
{
	struct thread_info *pi = task_thread_info(prev);
	struct thread_info *ni = task_thread_info(next);
	cputime_t delta_stime, delta_utime;
	__u64 now;

	now = ia64_get_itc();

	delta_stime = cycle_to_cputime(pi->ac_stime + (now - pi->ac_stamp));
	if (idle_task(smp_processor_id()) != prev)
		account_system_time(prev, 0, delta_stime, delta_stime);
	else
		account_idle_time(delta_stime);

	if (pi->ac_utime) {
		delta_utime = cycle_to_cputime(pi->ac_utime);
		account_user_time(prev, delta_utime, delta_utime);
	}

	pi->ac_stamp = ni->ac_stamp = now;
	ni->ac_stime = ni->ac_utime = 0;
}

/*
 * Account time for a transition between system, hard irq or soft irq state.
 * Note that this function is called with interrupts enabled.
 */
void account_system_vtime(struct task_struct *tsk)
{
	struct thread_info *ti = task_thread_info(tsk);
	unsigned long flags;
	cputime_t delta_stime;
	__u64 now;

	local_irq_save(flags);

	now = ia64_get_itc();

	delta_stime = cycle_to_cputime(ti->ac_stime + (now - ti->ac_stamp));
	if (irq_count() || idle_task(smp_processor_id()) != tsk)
		account_system_time(tsk, 0, delta_stime, delta_stime);
	else
		account_idle_time(delta_stime);
	ti->ac_stime = 0;

	ti->ac_stamp = now;

	local_irq_restore(flags);
}
EXPORT_SYMBOL_GPL(account_system_vtime);

/*
 * Called from the timer interrupt handler to charge accumulated user time
 * to the current process.  Must be called with interrupts disabled.
 */
void account_process_tick(struct task_struct *p, int user_tick)
{
	struct thread_info *ti = task_thread_info(p);
	cputime_t delta_utime;

	if (ti->ac_utime) {
		delta_utime = cycle_to_cputime(ti->ac_utime);
		account_user_time(p, delta_utime, delta_utime);
		ti->ac_utime = 0;
	}
}

#endif /* CONFIG_VIRT_CPU_ACCOUNTING */

static irqreturn_t
timer_interrupt (int irq, void *dev_id)
{
	unsigned long new_itm;

	if (unlikely(cpu_is_offline(smp_processor_id()))) {
		return IRQ_HANDLED;
	}

	platform_timer_interrupt(irq, dev_id);

	new_itm = local_cpu_data->itm_next;

	if (!time_after(ia64_get_itc(), new_itm))
		printk(KERN_ERR "Oops: timer tick before it's due (itc=%lx,itm=%lx)\n",
		       ia64_get_itc(), new_itm);

	profile_tick(CPU_PROFILING);

	if (paravirt_do_steal_accounting(&new_itm))
		goto skip_process_time_accounting;

	while (1) {
		update_process_times(user_mode(get_irq_regs()));

		new_itm += local_cpu_data->itm_delta;

		if (smp_processor_id() == time_keeper_id) {
			/*
			 * Here we are in the timer irq handler. We have irqs locally
			 * disabled, but we don't know if the timer_bh is running on
			 * another CPU. We need to avoid to SMP race by acquiring the
			 * xtime_lock.
			 */
			write_seqlock(&xtime_lock);
			do_timer(1);
			local_cpu_data->itm_next = new_itm;
			write_sequnlock(&xtime_lock);
		} else
			local_cpu_data->itm_next = new_itm;

		if (time_after(new_itm, ia64_get_itc()))
			break;

		/*
		 * Allow IPIs to interrupt the timer loop.
		 */
		local_irq_enable();
		local_irq_disable();
	}

skip_process_time_accounting:

	do {
		/*
		 * If we're too close to the next clock tick for
		 * comfort, we increase the safety margin by
		 * intentionally dropping the next tick(s).  We do NOT
		 * update itm.next because that would force us to call
		 * do_timer() which in turn would let our clock run
		 * too fast (with the potentially devastating effect
		 * of losing monotony of time).
		 */
		while (!time_after(new_itm, ia64_get_itc() + local_cpu_data->itm_delta/2))
			new_itm += local_cpu_data->itm_delta;
		ia64_set_itm(new_itm);
		/* double check, in case we got hit by a (slow) PMI: */
	} while (time_after_eq(ia64_get_itc(), new_itm));
	return IRQ_HANDLED;
}

/*
 * Encapsulate access to the itm structure for SMP.
 */
void
ia64_cpu_local_tick (void)
{
	int cpu = smp_processor_id();
	unsigned long shift = 0, delta;

	/* arrange for the cycle counter to generate a timer interrupt: */
	ia64_set_itv(IA64_TIMER_VECTOR);

	delta = local_cpu_data->itm_delta;
	/*
	 * Stagger the timer tick for each CPU so they don't occur all at (almost) the
	 * same time:
	 */
	if (cpu) {
		unsigned long hi = 1UL << ia64_fls(cpu);
		shift = (2*(cpu - hi) + 1) * delta/hi/2;
	}
	local_cpu_data->itm_next = ia64_get_itc() + delta + shift;
	ia64_set_itm(local_cpu_data->itm_next);
}

static int nojitter;

static int __init nojitter_setup(char *str)
{
	nojitter = 1;
	printk("Jitter checking for ITC timers disabled\n");
	return 1;
}

__setup("nojitter", nojitter_setup);


void __devinit
ia64_init_itm (void)
{
	unsigned long platform_base_freq, itc_freq;
	struct pal_freq_ratio itc_ratio, proc_ratio;
	long status, platform_base_drift, itc_drift;

	/*
	 * According to SAL v2.6, we need to use a SAL call to determine the platform base
	 * frequency and then a PAL call to determine the frequency ratio between the ITC
	 * and the base frequency.
	 */
	status = ia64_sal_freq_base(SAL_FREQ_BASE_PLATFORM,
				    &platform_base_freq, &platform_base_drift);
	if (status != 0) {
		printk(KERN_ERR "SAL_FREQ_BASE_PLATFORM failed: %s\n", ia64_sal_strerror(status));
	} else {
		status = ia64_pal_freq_ratios(&proc_ratio, NULL, &itc_ratio);
		if (status != 0)
			printk(KERN_ERR "PAL_FREQ_RATIOS failed with status=%ld\n", status);
	}
	if (status != 0) {
		/* invent "random" values */
		printk(KERN_ERR
		       "SAL/PAL failed to obtain frequency info---inventing reasonable values\n");
		platform_base_freq = 100000000;
		platform_base_drift = -1;	/* no drift info */
		itc_ratio.num = 3;
		itc_ratio.den = 1;
	}
	if (platform_base_freq < 40000000) {
		printk(KERN_ERR "Platform base frequency %lu bogus---resetting to 75MHz!\n",
		       platform_base_freq);
		platform_base_freq = 75000000;
		platform_base_drift = -1;
	}
	if (!proc_ratio.den)
		proc_ratio.den = 1;	/* avoid division by zero */
	if (!itc_ratio.den)
		itc_ratio.den = 1;	/* avoid division by zero */

	itc_freq = (platform_base_freq*itc_ratio.num)/itc_ratio.den;

	local_cpu_data->itm_delta = (itc_freq + HZ/2) / HZ;
	printk(KERN_DEBUG "CPU %d: base freq=%lu.%03luMHz, ITC ratio=%u/%u, "
	       "ITC freq=%lu.%03luMHz", smp_processor_id(),
	       platform_base_freq / 1000000, (platform_base_freq / 1000) % 1000,
	       itc_ratio.num, itc_ratio.den, itc_freq / 1000000, (itc_freq / 1000) % 1000);

	if (platform_base_drift != -1) {
		itc_drift = platform_base_drift*itc_ratio.num/itc_ratio.den;
		printk("+/-%ldppm\n", itc_drift);
	} else {
		itc_drift = -1;
		printk("\n");
	}

	local_cpu_data->proc_freq = (platform_base_freq*proc_ratio.num)/proc_ratio.den;
	local_cpu_data->itc_freq = itc_freq;
	local_cpu_data->cyc_per_usec = (itc_freq + USEC_PER_SEC/2) / USEC_PER_SEC;
	local_cpu_data->nsec_per_cyc = ((NSEC_PER_SEC<<IA64_NSEC_PER_CYC_SHIFT)
					+ itc_freq/2)/itc_freq;

	if (!(sal_platform_features & IA64_SAL_PLATFORM_FEATURE_ITC_DRIFT)) {
#ifdef CONFIG_SMP
		/* On IA64 in an SMP configuration ITCs are never accurately synchronized.
		 * Jitter compensation requires a cmpxchg which may limit
		 * the scalability of the syscalls for retrieving time.
		 * The ITC synchronization is usually successful to within a few
		 * ITC ticks but this is not a sure thing. If you need to improve
		 * timer performance in SMP situations then boot the kernel with the
		 * "nojitter" option. However, doing so may result in time fluctuating (maybe
		 * even going backward) if the ITC offsets between the individual CPUs
		 * are too large.
		 */
		if (!nojitter)
			itc_jitter_data.itc_jitter = 1;
#endif
	} else
		/*
		 * ITC is drifty and we have not synchronized the ITCs in smpboot.c.
		 * ITC values may fluctuate significantly between processors.
		 * Clock should not be used for hrtimers. Mark itc as only
		 * useful for boot and testing.
		 *
		 * Note that jitter compensation is off! There is no point of
		 * synchronizing ITCs since they may be large differentials
		 * that change over time.
		 *
		 * The only way to fix this would be to repeatedly sync the
		 * ITCs. Until that time we have to avoid ITC.
		 */
		clocksource_itc.rating = 50;

	paravirt_init_missing_ticks_accounting(smp_processor_id());

	/* avoid softlock up message when cpu is unplug and plugged again. */
	touch_softlockup_watchdog();

	/* Setup the CPU local timer tick */
	ia64_cpu_local_tick();

	if (!itc_clocksource) {
		/* Sort out mult/shift values: */
		clocksource_itc.mult =
			clocksource_hz2mult(local_cpu_data->itc_freq,
						clocksource_itc.shift);
		clocksource_register(&clocksource_itc);
		itc_clocksource = &clocksource_itc;
	}
}

static cycle_t itc_get_cycles(void)
{
	u64 lcycle, now, ret;

	if (!itc_jitter_data.itc_jitter)
		return get_cycles();

	lcycle = itc_jitter_data.itc_lastcycle;
	now = get_cycles();
	if (lcycle && time_after(lcycle, now))
		return lcycle;

	/*
	 * Keep track of the last timer value returned.
	 * In an SMP environment, you could lose out in contention of
	 * cmpxchg. If so, your cmpxchg returns new value which the
	 * winner of contention updated to. Use the new value instead.
	 */
	ret = cmpxchg(&itc_jitter_data.itc_lastcycle, lcycle, now);
	if (unlikely(ret != lcycle))
		return ret;

	return now;
}


static struct irqaction timer_irqaction = {
	.handler =	timer_interrupt,
	.flags =	IRQF_DISABLED | IRQF_IRQPOLL,
	.name =		"timer"
};

void __init
time_init (void)
{
	register_percpu_irq(IA64_TIMER_VECTOR, &timer_irqaction);
	efi_gettimeofday(&xtime);
	ia64_init_itm();

	/*
	 * Initialize wall_to_monotonic such that adding it to xtime will yield zero, the
	 * tv_nsec field must be normalized (i.e., 0 <= nsec < NSEC_PER_SEC).
	 */
	set_normalized_timespec(&wall_to_monotonic, -xtime.tv_sec, -xtime.tv_nsec);
}

/*
 * Generic udelay assumes that if preemption is allowed and the thread
 * migrates to another CPU, that the ITC values are synchronized across
 * all CPUs.
 */
static void
ia64_itc_udelay (unsigned long usecs)
{
	unsigned long start = ia64_get_itc();
	unsigned long end = start + usecs*local_cpu_data->cyc_per_usec;

	while (time_before(ia64_get_itc(), end))
		cpu_relax();
}

void (*ia64_udelay)(unsigned long usecs) = &ia64_itc_udelay;

void
udelay (unsigned long usecs)
{
	(*ia64_udelay)(usecs);
}
EXPORT_SYMBOL(udelay);

/* IA64 doesn't cache the timezone */
void update_vsyscall_tz(void)
{
}

void update_vsyscall(struct timespec *wall, struct clocksource *c)
{
        unsigned long flags;

        write_seqlock_irqsave(&fsyscall_gtod_data.lock, flags);

        /* copy fsyscall clock data */
        fsyscall_gtod_data.clk_mask = c->mask;
        fsyscall_gtod_data.clk_mult = c->mult;
        fsyscall_gtod_data.clk_shift = c->shift;
        fsyscall_gtod_data.clk_fsys_mmio = c->fsys_mmio;
        fsyscall_gtod_data.clk_cycle_last = c->cycle_last;

	/* copy kernel time structures */
        fsyscall_gtod_data.wall_time.tv_sec = wall->tv_sec;
        fsyscall_gtod_data.wall_time.tv_nsec = wall->tv_nsec;
        fsyscall_gtod_data.monotonic_time.tv_sec = wall_to_monotonic.tv_sec
							+ wall->tv_sec;
        fsyscall_gtod_data.monotonic_time.tv_nsec = wall_to_monotonic.tv_nsec
							+ wall->tv_nsec;

	/* normalize */
	while (fsyscall_gtod_data.monotonic_time.tv_nsec >= NSEC_PER_SEC) {
		fsyscall_gtod_data.monotonic_time.tv_nsec -= NSEC_PER_SEC;
		fsyscall_gtod_data.monotonic_time.tv_sec++;
	}

        write_sequnlock_irqrestore(&fsyscall_gtod_data.lock, flags);
}
Commit	Line	Data
1da177e4 LT	1	/*
	2	* linux/arch/ia64/kernel/time.c
	3	*
	4	* Copyright (C) 1998-2003 Hewlett-Packard Co
	5	* Stephane Eranian <eranian@hpl.hp.com>
	6	* David Mosberger <davidm@hpl.hp.com>
	7	* Copyright (C) 1999 Don Dugger <don.dugger@intel.com>
	8	* Copyright (C) 1999-2000 VA Linux Systems
	9	* Copyright (C) 1999-2000 Walt Drummond <drummond@valinux.com>
	10	*/
1da177e4 LT	11
	12	#include <linux/cpu.h>
	13	#include <linux/init.h>
	14	#include <linux/kernel.h>
	15	#include <linux/module.h>
	16	#include <linux/profile.h>
	17	#include <linux/sched.h>
	18	#include <linux/time.h>
	19	#include <linux/interrupt.h>
	20	#include <linux/efi.h>
1da177e4	21	#include <linux/timex.h>
0aa366f3	22	#include <linux/clocksource.h>
1da177e4 LT	23
	24	#include <asm/machvec.h>
	25	#include <asm/delay.h>
	26	#include <asm/hw_irq.h>
00d21d82	27	#include <asm/paravirt.h>
1da177e4 LT	28	#include <asm/ptrace.h>
	29	#include <asm/sal.h>
	30	#include <asm/sections.h>
	31	#include <asm/system.h>
	32
0aa366f3 TL	33	#include "fsyscall_gtod_data.h"
	34
	35	static cycle_t itc_get_cycles(void);
	36
	37	struct fsyscall_gtod_data_t fsyscall_gtod_data = {
	38	.lock = SEQLOCK_UNLOCKED,
	39	};
	40
	41	struct itc_jitter_data_t itc_jitter_data;
	42
ff741906	43	volatile int time_keeper_id = 0; /* smp_processor_id() of time-keeper */
1da177e4 LT	44
	45	#ifdef CONFIG_IA64_DEBUG_IRQ
	46
	47	unsigned long last_cli_ip;
	48	EXPORT_SYMBOL(last_cli_ip);
	49
	50	#endif
	51
00d21d82 IY	52	#ifdef CONFIG_PARAVIRT
	53	static void
	54	paravirt_clocksource_resume(void)
	55	{
	56	if (pv_time_ops.clocksource_resume)
	57	pv_time_ops.clocksource_resume();
	58	}
	59	#endif
	60
0aa366f3	61	static struct clocksource clocksource_itc = {
3eb05676 LZ	62	.name = "itc",
	63	.rating = 350,
	64	.read = itc_get_cycles,
	65	.mask = CLOCKSOURCE_MASK(64),
	66	.mult = 0, /to be calculated/
	67	.shift = 16,
	68	.flags = CLOCK_SOURCE_IS_CONTINUOUS,
00d21d82 IY	69	#ifdef CONFIG_PARAVIRT
	70	.resume = paravirt_clocksource_resume,
	71	#endif
1da177e4	72	};
0aa366f3	73	static struct clocksource *itc_clocksource;
1da177e4	74
b64f34cd HS	75	#ifdef CONFIG_VIRT_CPU_ACCOUNTING
	76
	77	#include <linux/kernel_stat.h>
	78
	79	extern cputime_t cycle_to_cputime(u64 cyc);
	80
	81	/*
	82	* Called from the context switch with interrupts disabled, to charge all
	83	* accumulated times to the current process, and to prepare accounting on
	84	* the next process.
	85	*/
	86	void ia64_account_on_switch(struct task_struct prev, struct task_struct next)
	87	{
	88	struct thread_info *pi = task_thread_info(prev);
	89	struct thread_info *ni = task_thread_info(next);
	90	cputime_t delta_stime, delta_utime;
	91	__u64 now;
	92
	93	now = ia64_get_itc();
	94
	95	delta_stime = cycle_to_cputime(pi->ac_stime + (now - pi->ac_stamp));
79741dd3 MS	96	if (idle_task(smp_processor_id()) != prev)
	97	account_system_time(prev, 0, delta_stime, delta_stime);
	98	else
	99	account_idle_time(delta_stime);
b64f34cd HS	100
	101	if (pi->ac_utime) {
	102	delta_utime = cycle_to_cputime(pi->ac_utime);
457533a7	103	account_user_time(prev, delta_utime, delta_utime);
b64f34cd HS	104	}
	105
	106	pi->ac_stamp = ni->ac_stamp = now;
	107	ni->ac_stime = ni->ac_utime = 0;
	108	}
	109
	110	/*
	111	* Account time for a transition between system, hard irq or soft irq state.
	112	* Note that this function is called with interrupts enabled.
	113	*/
	114	void account_system_vtime(struct task_struct *tsk)
	115	{
	116	struct thread_info *ti = task_thread_info(tsk);
	117	unsigned long flags;
	118	cputime_t delta_stime;
	119	__u64 now;
	120
	121	local_irq_save(flags);
	122
	123	now = ia64_get_itc();
	124
	125	delta_stime = cycle_to_cputime(ti->ac_stime + (now - ti->ac_stamp));
79741dd3 MS	126	if (irq_count() \|\| idle_task(smp_processor_id()) != tsk)
	127	account_system_time(tsk, 0, delta_stime, delta_stime);
	128	else
	129	account_idle_time(delta_stime);
b64f34cd HS	130	ti->ac_stime = 0;
	131
	132	ti->ac_stamp = now;
	133
	134	local_irq_restore(flags);
	135	}
3a677d21	136	EXPORT_SYMBOL_GPL(account_system_vtime);
b64f34cd HS	137
	138	/*
	139	* Called from the timer interrupt handler to charge accumulated user time
	140	* to the current process. Must be called with interrupts disabled.
	141	*/
	142	void account_process_tick(struct task_struct *p, int user_tick)
	143	{
	144	struct thread_info *ti = task_thread_info(p);
	145	cputime_t delta_utime;
	146
	147	if (ti->ac_utime) {
	148	delta_utime = cycle_to_cputime(ti->ac_utime);
457533a7	149	account_user_time(p, delta_utime, delta_utime);
b64f34cd HS	150	ti->ac_utime = 0;
	151	}
	152	}
	153
	154	#endif /* CONFIG_VIRT_CPU_ACCOUNTING */
	155
1da177e4	156	static irqreturn_t
7d12e780	157	timer_interrupt (int irq, void *dev_id)
1da177e4 LT	158	{
	159	unsigned long new_itm;
	160
	161	if (unlikely(cpu_is_offline(smp_processor_id()))) {
	162	return IRQ_HANDLED;
	163	}
	164
7d12e780	165	platform_timer_interrupt(irq, dev_id);
1da177e4 LT	166
	167	new_itm = local_cpu_data->itm_next;
	168
	169	if (!time_after(ia64_get_itc(), new_itm))
	170	printk(KERN_ERR "Oops: timer tick before it's due (itc=%lx,itm=%lx)\n",
	171	ia64_get_itc(), new_itm);
	172
7d12e780	173	profile_tick(CPU_PROFILING);
1da177e4	174
00d21d82 IY	175	if (paravirt_do_steal_accounting(&new_itm))
	176	goto skip_process_time_accounting;
	177
1da177e4	178	while (1) {
7d12e780	179	update_process_times(user_mode(get_irq_regs()));
1da177e4 LT	180
	181	new_itm += local_cpu_data->itm_delta;
	182
ff741906	183	if (smp_processor_id() == time_keeper_id) {
1da177e4 LT	184	/*
	185	* Here we are in the timer irq handler. We have irqs locally
	186	* disabled, but we don't know if the timer_bh is running on
	187	* another CPU. We need to avoid to SMP race by acquiring the
	188	* xtime_lock.
	189	*/
	190	write_seqlock(&xtime_lock);
3171a030	191	do_timer(1);
1da177e4 LT	192	local_cpu_data->itm_next = new_itm;
	193	write_sequnlock(&xtime_lock);
	194	} else
	195	local_cpu_data->itm_next = new_itm;
	196
	197	if (time_after(new_itm, ia64_get_itc()))
	198	break;
accaddb2 JS	199
	200	/*
	201	* Allow IPIs to interrupt the timer loop.
	202	*/
	203	local_irq_enable();
	204	local_irq_disable();
1da177e4 LT	205	}
1da177e4 LT	206
00d21d82 IY	207	skip_process_time_accounting:
00d21d82 IY	208
1da177e4 LT	209	do {
	210	/*
	211	* If we're too close to the next clock tick for
	212	* comfort, we increase the safety margin by
	213	* intentionally dropping the next tick(s). We do NOT
	214	* update itm.next because that would force us to call
	215	* do_timer() which in turn would let our clock run
	216	* too fast (with the potentially devastating effect
	217	* of losing monotony of time).
	218	*/
	219	while (!time_after(new_itm, ia64_get_itc() + local_cpu_data->itm_delta/2))
	220	new_itm += local_cpu_data->itm_delta;
	221	ia64_set_itm(new_itm);
	222	/* double check, in case we got hit by a (slow) PMI: */
	223	} while (time_after_eq(ia64_get_itc(), new_itm));
	224	return IRQ_HANDLED;
	225	}
	226
	227	/*
	228	* Encapsulate access to the itm structure for SMP.
	229	*/
	230	void
	231	ia64_cpu_local_tick (void)
	232	{
	233	int cpu = smp_processor_id();
	234	unsigned long shift = 0, delta;
	235
	236	/* arrange for the cycle counter to generate a timer interrupt: */
	237	ia64_set_itv(IA64_TIMER_VECTOR);
	238
	239	delta = local_cpu_data->itm_delta;
	240	/*
	241	* Stagger the timer tick for each CPU so they don't occur all at (almost) the
	242	* same time:
	243	*/
	244	if (cpu) {
	245	unsigned long hi = 1UL << ia64_fls(cpu);
	246	shift = (2(cpu - hi) + 1) delta/hi/2;
	247	}
	248	local_cpu_data->itm_next = ia64_get_itc() + delta + shift;
	249	ia64_set_itm(local_cpu_data->itm_next);
	250	}
	251
	252	static int nojitter;
	253
	254	static int __init nojitter_setup(char *str)
	255	{
	256	nojitter = 1;
	257	printk("Jitter checking for ITC timers disabled\n");
	258	return 1;
	259	}
	260
	261	__setup("nojitter", nojitter_setup);
	262
	263
	264	void __devinit
	265	ia64_init_itm (void)
	266	{
	267	unsigned long platform_base_freq, itc_freq;
	268	struct pal_freq_ratio itc_ratio, proc_ratio;
	269	long status, platform_base_drift, itc_drift;
	270
	271	/*
	272	* According to SAL v2.6, we need to use a SAL call to determine the platform base
273	* frequency and then a PAL call to determine the frequency ratio between the ITC
274	* and the base frequency.
275	*/
276	status = ia64_sal_freq_base(SAL_FREQ_BASE_PLATFORM,
277	&platform_base_freq, &platform_base_drift);
278	if (status != 0) {
279	printk(KERN_ERR "SAL_FREQ_BASE_PLATFORM failed: %s\n", ia64_sal_strerror(status));
280	} else {
281	status = ia64_pal_freq_ratios(&proc_ratio, NULL, &itc_ratio);
282	if (status != 0)
283	printk(KERN_ERR "PAL_FREQ_RATIOS failed with status=%ld\n", status);
284	}
285	if (status != 0) {
286	/* invent "random" values */
287	printk(KERN_ERR
288	"SAL/PAL failed to obtain frequency info---inventing reasonable values\n");
289	platform_base_freq = 100000000;
290	platform_base_drift = -1; /* no drift info */
291	itc_ratio.num = 3;
292	itc_ratio.den = 1;
293	}
294	if (platform_base_freq < 40000000) {
295	printk(KERN_ERR "Platform base frequency %lu bogus---resetting to 75MHz!\n",
296	platform_base_freq);
297	platform_base_freq = 75000000;
298	platform_base_drift = -1;
299	}
300	if (!proc_ratio.den)
301	proc_ratio.den = 1; /* avoid division by zero */
302	if (!itc_ratio.den)
303	itc_ratio.den = 1; /* avoid division by zero */
304
305	itc_freq = (platform_base_freq*itc_ratio.num)/itc_ratio.den;
306
307	local_cpu_data->itm_delta = (itc_freq + HZ/2) / HZ;
2ab9391d	308	printk(KERN_DEBUG "CPU %d: base freq=%lu.%03luMHz, ITC ratio=%u/%u, "
1da177e4 LT	309	"ITC freq=%lu.%03luMHz", smp_processor_id(),
	310	platform_base_freq / 1000000, (platform_base_freq / 1000) % 1000,
	311	itc_ratio.num, itc_ratio.den, itc_freq / 1000000, (itc_freq / 1000) % 1000);
	312
	313	if (platform_base_drift != -1) {
	314	itc_drift = platform_base_drift*itc_ratio.num/itc_ratio.den;
	315	printk("+/-%ldppm\n", itc_drift);
	316	} else {
	317	itc_drift = -1;
	318	printk("\n");
	319	}
	320
	321	local_cpu_data->proc_freq = (platform_base_freq*proc_ratio.num)/proc_ratio.den;
	322	local_cpu_data->itc_freq = itc_freq;
	323	local_cpu_data->cyc_per_usec = (itc_freq + USEC_PER_SEC/2) / USEC_PER_SEC;
	324	local_cpu_data->nsec_per_cyc = ((NSEC_PER_SEC<<IA64_NSEC_PER_CYC_SHIFT)
	325	+ itc_freq/2)/itc_freq;
	326
	327	if (!(sal_platform_features & IA64_SAL_PLATFORM_FEATURE_ITC_DRIFT)) {
1da177e4 LT	328	#ifdef CONFIG_SMP
	329	/* On IA64 in an SMP configuration ITCs are never accurately synchronized.
	330	* Jitter compensation requires a cmpxchg which may limit
	331	* the scalability of the syscalls for retrieving time.
	332	* The ITC synchronization is usually successful to within a few
	333	* ITC ticks but this is not a sure thing. If you need to improve
	334	* timer performance in SMP situations then boot the kernel with the
	335	* "nojitter" option. However, doing so may result in time fluctuating (maybe
	336	* even going backward) if the ITC offsets between the individual CPUs
	337	* are too large.
	338	*/
0aa366f3 TL	339	if (!nojitter)
0aa366f3 TL	340	itc_jitter_data.itc_jitter = 1;
1da177e4	341	#endif
b718f91c CL	342	} else
	343	/*
	344	* ITC is drifty and we have not synchronized the ITCs in smpboot.c.
	345	* ITC values may fluctuate significantly between processors.
	346	* Clock should not be used for hrtimers. Mark itc as only
	347	* useful for boot and testing.
	348	*
	349	* Note that jitter compensation is off! There is no point of
	350	* synchronizing ITCs since they may be large differentials
	351	* that change over time.
	352	*
	353	* The only way to fix this would be to repeatedly sync the
	354	* ITCs. Until that time we have to avoid ITC.
	355	*/
	356	clocksource_itc.rating = 50;
1da177e4	357
00d21d82 IY	358	paravirt_init_missing_ticks_accounting(smp_processor_id());
	359
	360	/* avoid softlock up message when cpu is unplug and plugged again. */
	361	touch_softlockup_watchdog();
	362
1da177e4 LT	363	/* Setup the CPU local timer tick */
1da177e4 LT	364	ia64_cpu_local_tick();
0aa366f3 TL	365
	366	if (!itc_clocksource) {
	367	/* Sort out mult/shift values: */
	368	clocksource_itc.mult =
	369	clocksource_hz2mult(local_cpu_data->itc_freq,
	370	clocksource_itc.shift);
	371	clocksource_register(&clocksource_itc);
	372	itc_clocksource = &clocksource_itc;
	373	}
1da177e4 LT	374	}
1da177e4 LT	375
8dc94630	376	static cycle_t itc_get_cycles(void)
0aa366f3 TL	377	{
	378	u64 lcycle, now, ret;
	379
	380	if (!itc_jitter_data.itc_jitter)
	381	return get_cycles();
	382
	383	lcycle = itc_jitter_data.itc_lastcycle;
	384	now = get_cycles();
	385	if (lcycle && time_after(lcycle, now))
	386	return lcycle;
	387
	388	/*
	389	* Keep track of the last timer value returned.
	390	* In an SMP environment, you could lose out in contention of
	391	* cmpxchg. If so, your cmpxchg returns new value which the
	392	* winner of contention updated to. Use the new value instead.
	393	*/
	394	ret = cmpxchg(&itc_jitter_data.itc_lastcycle, lcycle, now);
	395	if (unlikely(ret != lcycle))
	396	return ret;
	397
	398	return now;
	399	}
	400
	401
1da177e4 LT	402	static struct irqaction timer_irqaction = {
1da177e4 LT	403	.handler = timer_interrupt,
d217c265	404	.flags = IRQF_DISABLED \| IRQF_IRQPOLL,
1da177e4 LT	405	.name = "timer"
	406	};
	407
	408	void __init
	409	time_init (void)
	410	{
	411	register_percpu_irq(IA64_TIMER_VECTOR, &timer_irqaction);
	412	efi_gettimeofday(&xtime);
	413	ia64_init_itm();
	414
	415	/*
	416	* Initialize wall_to_monotonic such that adding it to xtime will yield zero, the
	417	* tv_nsec field must be normalized (i.e., 0 <= nsec < NSEC_PER_SEC).
	418	*/
	419	set_normalized_timespec(&wall_to_monotonic, -xtime.tv_sec, -xtime.tv_nsec);
	420	}
f5899b5d	421
defbb2c9	422	/*
	423	* Generic udelay assumes that if preemption is allowed and the thread
	424	* migrates to another CPU, that the ITC values are synchronized across
	425	* all CPUs.
	426	*/
	427	static void
	428	ia64_itc_udelay (unsigned long usecs)
f5899b5d	429	{
defbb2c9	430	unsigned long start = ia64_get_itc();
defbb2c9	431	unsigned long end = start + usecs*local_cpu_data->cyc_per_usec;
f5899b5d	432
defbb2c9	433	while (time_before(ia64_get_itc(), end))
	434	cpu_relax();
	435	}
f5899b5d	436
defbb2c9	437	void (*ia64_udelay)(unsigned long usecs) = &ia64_itc_udelay;
f5899b5d	438
defbb2c9	439	void
	440	udelay (unsigned long usecs)
	441	{
	442	(*ia64_udelay)(usecs);
f5899b5d JH	443	}
f5899b5d JH	444	EXPORT_SYMBOL(udelay);
d6e56a2a	445
2c622148 TB	446	/* IA64 doesn't cache the timezone */
	447	void update_vsyscall_tz(void)
	448	{
	449	}
	450
0aa366f3 TL	451	void update_vsyscall(struct timespec wall, struct clocksource c)
	452	{
	453	unsigned long flags;
	454
	455	write_seqlock_irqsave(&fsyscall_gtod_data.lock, flags);
	456
	457	/* copy fsyscall clock data */
	458	fsyscall_gtod_data.clk_mask = c->mask;
	459	fsyscall_gtod_data.clk_mult = c->mult;
	460	fsyscall_gtod_data.clk_shift = c->shift;
	461	fsyscall_gtod_data.clk_fsys_mmio = c->fsys_mmio;
	462	fsyscall_gtod_data.clk_cycle_last = c->cycle_last;
	463
	464	/* copy kernel time structures */
	465	fsyscall_gtod_data.wall_time.tv_sec = wall->tv_sec;
	466	fsyscall_gtod_data.wall_time.tv_nsec = wall->tv_nsec;
	467	fsyscall_gtod_data.monotonic_time.tv_sec = wall_to_monotonic.tv_sec
	468	+ wall->tv_sec;
	469	fsyscall_gtod_data.monotonic_time.tv_nsec = wall_to_monotonic.tv_nsec
	470	+ wall->tv_nsec;
	471
	472	/* normalize */
	473	while (fsyscall_gtod_data.monotonic_time.tv_nsec >= NSEC_PER_SEC) {
	474	fsyscall_gtod_data.monotonic_time.tv_nsec -= NSEC_PER_SEC;
	475	fsyscall_gtod_data.monotonic_time.tv_sec++;
	476	}
	477
	478	write_sequnlock_irqrestore(&fsyscall_gtod_data.lock, flags);
	479	}
	480